1 | /* |
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2 | * Cirrus EP7312 Intererrupt handler |
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3 | * |
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4 | * Copyright (c) 2002 by Jay Monkman <jtm@smoothsmoothie.com> |
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5 | * |
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6 | * Copyright (c) 2002 by Charlie Steader <charlies@poliac.com> |
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7 | * |
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8 | * The license and distribution terms for this file may be |
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9 | * found in the file LICENSE in this distribution or at |
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10 | * |
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11 | * http://www.rtems.com/license/LICENSE. |
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12 | * |
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13 | * |
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14 | * $Id$ |
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15 | */ |
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16 | #include <irq.h> |
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17 | #include <bsp.h> |
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18 | #include <ep7312.h> |
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19 | |
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20 | extern void default_int_handler(); |
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21 | |
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22 | void BSP_rtems_irq_mngt_init() |
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23 | { |
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24 | long int_stat; |
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25 | long *vectorTable; |
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26 | int i; |
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27 | |
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28 | vectorTable = (long *) VECTOR_TABLE; |
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29 | |
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30 | /* Initialize the vector table contents with default handler */ |
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31 | for (i=0; i<BSP_MAX_INT; i++) { |
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32 | *(vectorTable + i) = (long)(default_int_handler); |
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33 | } |
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34 | |
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35 | /* mask all interrupts */ |
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36 | *EP7312_INTMR1 = 0x0; |
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37 | *EP7312_INTMR2 = 0x0; |
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38 | *EP7312_INTMR3 = 0x0; |
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39 | |
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40 | /* clear all pending interrupt status' */ |
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41 | int_stat = *EP7312_INTSR1; |
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42 | if(int_stat & EP7312_INTR1_EXTFIQ) |
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43 | { |
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44 | } |
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45 | if(int_stat & EP7312_INTR1_BLINT) |
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46 | { |
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47 | *EP7312_BLEOI = 0xFFFFFFFF; |
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48 | } |
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49 | if(int_stat & EP7312_INTR1_WEINT) |
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50 | { |
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51 | *EP7312_TEOI = 0xFFFFFFFF; |
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52 | } |
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53 | if(int_stat & EP7312_INTR1_MCINT) |
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54 | { |
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55 | } |
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56 | if(int_stat & EP7312_INTR1_CSINT) |
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57 | { |
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58 | *EP7312_COEOI = 0xFFFFFFFF; |
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59 | } |
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60 | if(int_stat & EP7312_INTR1_EINT1) |
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61 | { |
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62 | } |
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63 | if(int_stat & EP7312_INTR1_EINT2) |
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64 | { |
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65 | } |
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66 | if(int_stat & EP7312_INTR1_EINT3) |
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67 | { |
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68 | } |
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69 | if(int_stat & EP7312_INTR1_TC1OI) |
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70 | { |
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71 | *EP7312_TC1EOI = 0xFFFFFFFF; |
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72 | } |
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73 | if(int_stat & EP7312_INTR1_TC2OI) |
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74 | { |
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75 | *EP7312_TC2EOI = 0xFFFFFFFF; |
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76 | } |
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77 | if(int_stat & EP7312_INTR1_RTCMI) |
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78 | { |
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79 | *EP7312_RTCEOI = 0xFFFFFFFF; |
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80 | } |
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81 | if(int_stat & EP7312_INTR1_TINT) |
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82 | { |
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83 | *EP7312_TEOI = 0xFFFFFFFF; |
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84 | } |
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85 | if(int_stat & EP7312_INTR1_URXINT1) |
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86 | { |
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87 | } |
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88 | if(int_stat & EP7312_INTR1_UTXINT1) |
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89 | { |
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90 | } |
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91 | if(int_stat & EP7312_INTR1_UMSINT) |
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92 | { |
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93 | *EP7312_UMSEOI = 0xFFFFFFFF; |
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94 | } |
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95 | if(int_stat & EP7312_INTR1_SSEOTI) |
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96 | { |
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97 | *EP7312_SYNCIO; |
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98 | } |
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99 | int_stat = *EP7312_INTSR1; |
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100 | |
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101 | int_stat = *EP7312_INTSR2; |
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102 | if(int_stat & EP7312_INTR2_KBDINT) |
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103 | { |
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104 | *EP7312_KBDEOI = 0xFFFFFFFF; |
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105 | } |
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106 | if(int_stat & EP7312_INTR2_SS2RX) |
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107 | { |
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108 | } |
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109 | if(int_stat & EP7312_INTR2_SS2TX) |
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110 | { |
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111 | } |
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112 | if(int_stat & EP7312_INTR2_URXINT2) |
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113 | { |
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114 | } |
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115 | if(int_stat & EP7312_INTR2_UTXINT2) |
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116 | { |
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117 | } |
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118 | int_stat = *EP7312_INTSR2; |
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119 | |
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120 | int_stat = *EP7312_INTSR3; |
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121 | if(int_stat & EP7312_INTR2_DAIINT) |
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122 | { |
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123 | } |
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124 | int_stat = *EP7312_INTSR3; |
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125 | } |
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