source: rtems/c/src/lib/libbsp/arm/edb7312/irq/bsp_irq_asm.S @ c001766

4.104.114.95
Last change on this file since c001766 was 6128a4a, checked in by Ralf Corsepius <ralf.corsepius@…>, on Apr 21, 2004 at 10:43:04 AM

Remove stray white spaces.

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File size: 8.1 KB
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1/*
2 * Cirrus EP7312 Intererrupt handler
3 *
4 * Copyright (c) 2002 by Jay Monkman <jtm@smoothsmoothie.com>
5 *
6 * Copyright (c) 2002 by Charlie Steader <charlies@poliac.com>
7 *
8 *  The license and distribution terms for this file may be
9 *  found in the file LICENSE in this distribution or at
10 *
11 *  http://www.rtems.com/license/LICENSE.
12 *
13 *
14 *  $Id$
15*/
16#define __asm__
17#include "irq.h"
18
19#define VECTOR_TABLE 0x40
20
21/*
22 * Function to obtain, execute an IT handler and acknowledge the IT
23 */
24
25        .globl ExecuteITHandler
26ExecuteITHandler :
27/*
28 * Look at interrupt status register to determine source.
29 * From source, determine offset into expanded vector table
30 * and load handler address into r0.
31 */
32
33  ldr   r1, =0x80000000 /* close to interrupt status/mask registers 1 */
34  ldr   r2, =0x80001000 /* close to interrupt status/mask registers 2 */
35  ldr   r3, =0x80002000 /* close to interrupt status/mask registers 3 */
36
37  stmdb   sp!,{r4, r5, r6}
38
39/*
40 * INTSR3
41 */
42check_dai:
43  ldr   r4, [r3, #0x240]
44  ldr   r5, [r3, #0x280]
45  and   r6, r4, r5 /* only look at interrupts which are enabled */
46  tst   r6, #0x0001
47  beq   check_extfiq
48  ldr   r0, =(VECTOR_TABLE + (4 * 21)) /* load the vector number */
49  b     get_handler
50
51/*
52 * INTSR1
53 */
54check_extfiq:
55  ldr   r4, [r1, #0x240]
56  ldr   r5, [r1, #0x280]
57  and   r6, r4, r5 /* only look at interrupts which are enabled */
58  tst   r6, #0x0001
59  beq   check_bl
60  ldr   r0, =(VECTOR_TABLE + (4 * 0)) /* load the vector number */
61  b     get_handler
62
63check_bl:
64#if 0
65MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
66  ldr   r4, [r1, #0x240]
67  ldr   r5, [r1, #0x280]
68  and   r6, r4, r5 /* only look at interrupts which are enabled */
69#endif
70  tst   r6, #0x0002
71  beq   check_we
72  ldr   r0, =(VECTOR_TABLE + (4 * 1)) /* load the vector number */
73  b     get_handler
74
75check_we:
76#if 0
77MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
78  ldr   r4, [r1, #0x240]
79  ldr   r5, [r1, #0x280]
80  and   r6, r4, r5 /* only look at interrupts which are enabled */
81#endif
82  tst   r6, #0x0004
83  beq   check_mc
84  ldr   r0, =(VECTOR_TABLE + (4 * 2)) /* load the vector number */
85  b     get_handler
86
87check_mc:
88#if 0
89MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
90  ldr   r4, [r1, #0x240]
91  ldr   r5, [r1, #0x280]
92  and   r6, r4, r5 /* only look at interrupts which are enabled */
93#endif
94  tst   r6, #0x0008
95  beq   check_cs
96  ldr   r0, =(VECTOR_TABLE + (4 * 3)) /* load the vector number */
97  b     get_handler
98
99check_cs:
100#if 0
101MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
102  ldr   r4, [r1, #0x240]
103  ldr   r5, [r1, #0x280]
104  and   r6, r4, r5 /* only look at interrupts which are enabled */
105#endif
106  tst   r6, #0x0010
107  beq   check_e1
108  ldr   r0, =(VECTOR_TABLE + (4 * 4)) /* load the vector number */
109  b     get_handler
110
111check_e1:
112#if 0
113MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
114  ldr   r4, [r1, #0x240]
115  ldr   r5, [r1, #0x280]
116  and   r6, r4, r5 /* only look at interrupts which are enabled */
117#endif
118  tst   r6, #0x0020
119  beq   check_e2
120  ldr   r0, =(VECTOR_TABLE + (4 * 5)) /* load the vector number */
121  b     get_handler
122
123check_e2:
124#if 0
125MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
126  ldr   r4, [r1, #0x240]
127  ldr   r5, [r1, #0x280]
128  and   r6, r4, r5 /* only look at interrupts which are enabled */
129#endif
130  tst   r6, #0x0040
131  beq   check_e3
132  ldr   r0, =(VECTOR_TABLE + (4 * 6)) /* load the vector number */
133  b     get_handler
134
135check_e3:
136#if 0
137MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
138  ldr   r4, [r1, #0x240]
139  ldr   r5, [r1, #0x280]
140  and   r6, r4, r5 /* only look at interrupts which are enabled */
141#endif
142  tst   r6, #0x0080
143  beq   check_tc1
144  ldr   r0, =(VECTOR_TABLE + (4 * 7)) /* load the vector number */
145  b     get_handler
146
147check_tc1:
148#if 0
149MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
150  ldr   r4, [r1, #0x240]
151  ldr   r5, [r1, #0x280]
152  and   r6, r4, r5 /* only look at interrupts which are enabled */
153#endif
154  tst   r6, #0x0100
155  beq   check_tc2
156  ldr   r0, =(VECTOR_TABLE + (4 * 8)) /* load the vector number */
157  b     get_handler
158
159check_tc2:
160#if 0
161MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
162  ldr   r4, [r1, #0x240]
163  ldr   r5, [r1, #0x280]
164  and   r6, r4, r5 /* only look at interrupts which are enabled */
165#endif
166  tst   r6, #0x0200
167  beq   check_rtc
168  ldr   r0, =(VECTOR_TABLE + (4 * 9)) /* load the vector number */
169  b     get_handler
170
171check_rtc:
172#if 0
173MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
174  ldr   r4, [r1, #0x240]
175  ldr   r5, [r1, #0x280]
176  and   r6, r4, r5 /* only look at interrupts which are enabled */
177#endif
178  tst   r6, #0x0400
179  beq   check_tick
180  ldr   r0, =(VECTOR_TABLE + (4 * 10)) /* load the vector number */
181  b     get_handler
182
183check_tick:
184#if 0
185MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
186  ldr   r4, [r1, #0x240]
187  ldr   r5, [r1, #0x280]
188  and   r6, r4, r5 /* only look at interrupts which are enabled */
189#endif
190  tst   r6, #0x0800
191  beq   check_utx1
192  ldr   r0, =(VECTOR_TABLE + (4 * 11)) /* load the vector number */
193  b     get_handler
194
195check_utx1:
196#if 0
197MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
198  ldr   r4, [r1, #0x240]
199  ldr   r5, [r1, #0x280]
200  and   r6, r4, r5 /* only look at interrupts which are enabled */
201#endif
202  tst   r6, #0x1000
203  beq   check_urx1
204  ldr   r0, =(VECTOR_TABLE + (4 * 12)) /* load the vector number */
205  b     get_handler
206
207check_urx1:
208#if 0
209MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
210  ldr   r4, [r1, #0x240]
211  ldr   r5, [r1, #0x280]
212  and   r6, r4, r5 /* only look at interrupts which are enabled */
213#endif
214  tst   r6, #0x2000
215  beq   check_ums
216  ldr   r0, =(VECTOR_TABLE + (4 * 13)) /* load the vector number */
217  b     get_handler
218
219check_ums:
220#if 0
221MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
222  ldr   r4, [r1, #0x240]
223  ldr   r5, [r1, #0x280]
224  and   r6, r4, r5 /* only look at interrupts which are enabled */
225#endif
226  tst   r6, #0x4000
227  beq   check_sse
228  ldr   r0, =(VECTOR_TABLE + (4 * 14)) /* load the vector number */
229  b     get_handler
230
231check_sse:
232#if 0
233MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
234  ldr   r4, [r1, #0x240]
235  ldr   r5, [r1, #0x280]
236  and   r6, r4, r5 /* only look at interrupts which are enabled */
237#endif
238  tst   r6, #0x8000
239  beq   check_kbd
240  ldr   r0, =(VECTOR_TABLE + (4 * 15)) /* load the vector number */
241  b     get_handler
242
243/*
244 * INTSR2
245 */
246check_kbd:
247  ldr   r4, [r2, #0x240]
248  ldr   r5, [r2, #0x280]
249  and   r6, r4, r5 /* only look at interrupts which are enabled */
250  tst   r6, #0x0001
251  beq   check_ss2rx
252  ldr   r0, =(VECTOR_TABLE + (4 * 16)) /* load the vector number */
253  b     get_handler
254
255check_ss2rx:
256#if 0
257MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
258  ldr   r4, [r2, #0x240]
259  ldr   r5, [r2, #0x280]
260  and   r6, r4, r5 /* only look at interrupts which are enabled */
261#endif
262  tst   r6, #0x0002
263  beq   check_ss2tx
264  ldr   r0, =(VECTOR_TABLE + (4 * 17)) /* load the vector number */
265  b     get_handler
266
267check_ss2tx:
268#if 0
269MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
270  ldr   r4, [r2, #0x240]
271  ldr   r5, [r2, #0x280]
272  and   r6, r4, r5 /* only look at interrupts which are enabled */
273#endif
274  tst   r6, #0x0004
275  beq   check_utx2
276  ldr   r0, =(VECTOR_TABLE + (4 * 18)) /* load the vector number */
277  b     get_handler
278
279check_utx2:
280#if 0
281MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
282  ldr   r4, [r2, #0x240]
283  ldr   r5, [r2, #0x280]
284  and   r6, r4, r5 /* only look at interrupts which are enabled */
285#endif
286  tst   r6, #0x1000
287  beq   check_urx2
288  ldr   r0, =(VECTOR_TABLE + (4 * 19)) /* load the vector number */
289  b     get_handler
290
291check_urx2:
292#if 0
293MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
294  ldr   r4, [r2, #0x240]
295  ldr   r5, [r2, #0x280]
296  and   r6, r4, r5 /* only look at interrupts which are enabled */
297#endif
298  tst   r6, #0x2000
299  beq   IRQ_NoInterrupt
300  ldr   r0, =(VECTOR_TABLE + (4 * 20)) /* load the vector number */
301  b     get_handler
302
303get_handler:
304
305  ldmia   sp!,{r4, r5, r6}
306
307  ldr   r0, [r0]                /* extract the IT handler @ */
308
309  /*
310   * re-enable interrupts at processor level as the current
311   * interrupt source is now masked via VEGA logic
312   */
313/*
314  mrs   r1, cpsr
315  and   r1, r1, #0xFFFFFF3F
316  msr   cpsr, r1
317*/
318
319  stmdb   sp!,{lr}
320  ldr     lr, =IRQ_return         /* prepare the return from handler  */
321
322  mov     pc, r0                        /* EXECUTE INT HANDLER */
323
324IRQ_return:
325  ldmia sp!,{lr}
326
327IRQ_NoInterrupt:
328  /* return to the "main" interrupt handler */
329  mov pc, lr
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