source: rtems/c/src/lib/libbsp/arm/csb337/startup/linkcmds.csb637 @ cbc433c7

4.115
Last change on this file since cbc433c7 was cbc433c7, checked in by Sebastian Huber <sebastian.huber@…>, on 11/25/14 at 07:40:20

bsps/arm: Add .nocache section

This section can be use to provide a cache coherent memory area via
rtems_cache_coherent_add_area().

  • Property mode set to 100644
File size: 899 bytes
Line 
1MEMORY {
2        SDRAM : ORIGIN = 0x20100000, LENGTH = 63M - 16k
3        SDRAM_MMU : ORIGIN = 0x23ffc000, LENGTH = 16k
4        SRAM : ORIGIN = 0x00200000, LENGTH = 16k
5}
6
7REGION_ALIAS ("REGION_START", SDRAM);
8REGION_ALIAS ("REGION_VECTOR", SRAM);
9REGION_ALIAS ("REGION_TEXT", SDRAM);
10REGION_ALIAS ("REGION_TEXT_LOAD", SDRAM);
11REGION_ALIAS ("REGION_RODATA", SDRAM);
12REGION_ALIAS ("REGION_RODATA_LOAD", SDRAM);
13REGION_ALIAS ("REGION_DATA", SDRAM);
14REGION_ALIAS ("REGION_DATA_LOAD", SDRAM);
15REGION_ALIAS ("REGION_FAST_TEXT", SDRAM);
16REGION_ALIAS ("REGION_FAST_TEXT_LOAD", SDRAM);
17REGION_ALIAS ("REGION_FAST_DATA", SDRAM);
18REGION_ALIAS ("REGION_FAST_DATA_LOAD", SDRAM);
19REGION_ALIAS ("REGION_BSS", SDRAM);
20REGION_ALIAS ("REGION_WORK", SDRAM);
21REGION_ALIAS ("REGION_STACK", SDRAM);
22REGION_ALIAS ("REGION_NOCACHE", SDRAM);
23REGION_ALIAS ("REGION_NOCACHE_LOAD", SDRAM);
24
25_ttbl_base = ORIGIN (SDRAM_MMU);
26
27INCLUDE linkcmds.armv4
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