source: rtems/c/src/lib/libbsp/arm/csb337/startup/bspstart.c @ c499856

4.115
Last change on this file since c499856 was c499856, checked in by Chris Johns <chrisj@…>, on 03/20/14 at 21:10:47

Change all references of rtems.com to rtems.org.
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File size: 5.1 KB
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1/*
2 * Cogent CSB337 - AT91RM9200 Startup Code
3 *
4 *  Copyright (c) 2004 by Cogent Computer Systems
5 *  Written by Jay Monkman <jtm@lopingdog.com>
6 *
7 *  Modified by Joel Sherill
8 *  from OAR Corporation and
9 *  Fernando Nicodemos <fgnicodemos@terra.com.br>
10 *  from NCB - Sistemas Embarcados Ltda. (Brazil)
11 *
12 *  The license and distribution terms for this file may be
13 *  found in the file LICENSE in this distribution or at
14 *  http://www.rtems.org/license/LICENSE.
15 */
16
17#include <bsp.h>
18#include <bsp/irq-generic.h>
19#include <at91rm9200.h>
20#include <at91rm9200_pmc.h>
21#include <at91rm9200_emac.h>
22#include <at91rm9200_gpio.h>
23#include <at91rm9200_usart.h>
24
25/* Function prototypes */
26extern void rtems_exception_init_mngt(void);
27static void fix_mac_addr(void);
28void bsp_usart_init(void);
29
30/*
31 * bsp_start_default - BSP initialization function
32 *
33 * This function is called before RTEMS is initialized and used
34 * adjust the kernel's configuration.
35 *
36 * This function also configures the CPU's memory protection unit.
37 *
38 * RESTRICTIONS/LIMITATIONS:
39 *   Since RTEMS is not configured, no RTEMS functions can be called.
40 */
41void bsp_start_default( void )
42{
43  /* disable interrupts */
44  AIC_CTL_REG(AIC_IDCR) = 0xffffffff;
45
46  /*
47   * Some versions of the bootloader have the MAC address
48   * reversed. This fixes it, if necessary.
49   */
50  fix_mac_addr();
51
52  /*
53   * Init rtems PIO configuration for USARTs
54   */
55  bsp_usart_init();
56
57  /*
58   * Init rtems exceptions management
59   */
60  rtems_exception_init_mngt();
61
62  /*
63   * Init rtems interrupt management
64   */
65  bsp_interrupt_initialize();
66
67} /* bsp_start */
68
69/*
70 * Some versions of the bootloader shipped with the CSB337
71 * reverse the MAC address. This function tests for that,
72 * and fixes the MAC address.
73 */
74static void fix_mac_addr(void)
75{
76  uint8_t addr[6];
77
78  /* Read the MAC address */
79  addr[0] = (EMAC_REG(EMAC_SA1L) >>  0) & 0xff;
80  addr[1] = (EMAC_REG(EMAC_SA1L) >>  8) & 0xff;
81  addr[2] = (EMAC_REG(EMAC_SA1L) >> 16) & 0xff;
82  addr[3] = (EMAC_REG(EMAC_SA1L) >> 24) & 0xff;
83  addr[4] = (EMAC_REG(EMAC_SA1H) >>  0) & 0xff;
84  addr[5] = (EMAC_REG(EMAC_SA1H) >>  8) & 0xff;
85
86  /* Check which 3 bytes have Cogent's OUI */
87  if ((addr[5] == 0x00) && (addr[4] == 0x23) && (addr[3] == 0x31)) {
88      EMAC_REG(EMAC_SA1L) = ((addr[5] <<  0) |
89                             (addr[4] <<  8) |
90                             (addr[3] << 16) |
91                             (addr[2] << 24));
92
93      EMAC_REG(EMAC_SA1H) = ((addr[1] <<  0) |
94                             (addr[0] <<  8));
95  }
96}
97
98/*
99 *
100 * NAME: bsp_usart_init - Function to setup the PIO in USART mode
101 *       before startup
102 *
103 * DESCRIPTION:
104 *   This function is called before usart driver is initialized and is
105 *   used to setup the proper mode of PIO operation for USART.
106 *
107 * NOTES:
108 *   The initialization could be done smarter by programming only the
109 *   bits you need to program for each USART when the port is ENABLED.
110 *
111 */
112void bsp_usart_init(void)
113{
114  /*
115   * Configure shared pins for USARTs.
116   * Disables the PIO from controlling the corresponding pin.
117   */
118  PIOA_REG(PIO_PDR) |= ( BIT5  |   /* USART3 TXD3  */
119                         BIT6  |   /* USART3 RXD3  */
120                         BIT17 |   /* USART0 TXD0  */
121                         BIT18 |   /* USART0 RXD0  */
122                         BIT22 |   /* USART2 RXD2  */
123                         BIT23 );  /* USART2 TXD2  */
124
125  PIOB_REG(PIO_PDR) |= ( BIT20 |   /* USART1 TXD1  */
126                         BIT21 );  /* USART1 RXD1  */
127
128  /**** PIO Controller A - Pins you want in mode B ****/
129  PIOA_REG(PIO_BSR) |=  ( BIT5 |   /* USART3 TXD3  */ /* add */
130                          BIT6 );  /* USART3 RXD3  */
131  PIOA_REG(PIO_ASR) &= ~( BIT5 |   /* USART3 TXD3  */
132                          BIT6 );  /* USART3 RXD3  */
133
134  /**** PIO Controller A - Pins you want in mode A ****/
135  PIOA_REG(PIO_ASR) |=  ( BIT17 |   /* USART0 TXD0  */
136                          BIT18 |   /* USART0 RXD0  */
137                          BIT22 |   /* USART2 RXD2  */
138                          BIT23 );  /* USART2 TXD2  */
139  PIOA_REG(PIO_BSR) &= ~( BIT17 |   /* USART0 TXD0  */ /* add */
140                          BIT18 |   /* USART0 RXD0  */
141                          BIT22 |   /* USART2 RXD2  */
142                          BIT23 );  /* USART2 TXD2  */
143
144  /**** PIO Controller B - Pins you want in mode A ****/
145  PIOB_REG(PIO_ASR) |=  ( BIT20 |   /* USART1 TXD1  */
146                          BIT21 );  /* USART1 RXD1  */
147  PIOB_REG(PIO_BSR) &= ~( BIT20 |   /* USART1 TXD1  */
148                          BIT21 );  /* USART1 RXD1  */
149
150  /**** PIO Controller B - Pins you want in mode B ****/
151  /**** none ****/
152
153  /* Enable the clock to the USARTs */
154  PMC_REG(PMC_PCER) |= ( PMC_PCR_PID_US0 |   /* USART 0 Peripheral Clock */
155                         PMC_PCR_PID_US1 |   /* USART 1 Peripheral Clock */
156                         PMC_PCR_PID_US2 |   /* USART 2 Peripheral Clock */
157                         PMC_PCR_PID_US3 );  /* USART 3 Peripheral Clock */
158}
159
160/*
161 *  By making this a weak alias for bsp_start_default, a brave soul
162 *  can override the actual bsp_start routine used.
163 */
164void bsp_start (void) __attribute__ ((weak, alias("bsp_start_default")));
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