source: rtems/c/src/lib/libbsp/arm/csb337/start/start.S @ b759b04

4.104.114.84.95
Last change on this file since b759b04 was b759b04, checked in by Jay Monkman <jtm@…>, on Jul 15, 2004 at 6:16:16 AM

2004-07-15 Jay Monkman

  • .cvsignore, ChangeLog?, Makefile.am, README, bsp_specs, configure.ac, times, console/uarts.c, include/.cvsignore, include/bsp.h, include/tm27.h, network/.cvsignore, network/network.c, start/.cvsignore, start/start.S, startup/.cvsignore, startup/bspstart.c, startup/exit.c, startup/linkcmds, startup/memmap.c: New files.
  • Property mode set to 100644
File size: 4.2 KB
Line 
1/*
2 * Cogent CSB337 startup code
3 *
4 * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com>
5 *     
6 *  The license and distribution terms for this file may be
7 *  found in the file LICENSE in this distribution or at
8 *
9 *  http://www.OARcorp.com/rtems/license.html.
10 *
11 *
12 *  $Id$
13*/
14
15               
16/* Some standard definitions...*/
17.equ PSR_MODE_USR,       0x10
18.equ PSR_MODE_FIQ,       0x11
19.equ PSR_MODE_IRQ,       0x12
20.equ PSR_MODE_SVC,       0x13
21.equ PSR_MODE_ABT,       0x17
22.equ PSR_MODE_UNDEF,     0x1B
23.equ PSR_MODE_SYS,       0x1F
24
25.equ PSR_I,              0x80
26.equ PSR_F,              0x40
27.equ PSR_T,              0x20
28
29.text
30.globl  _start
31_start:
32        /*
33         * Since I don't plan to return to the bootloader,
34         * I don't have to save the registers.
35         *
36         * I'll just set the CPSR for SVC mode, interrupts
37         * off, and ARM instructions.
38         */
39        mov     r0, #(PSR_MODE_SVC | PSR_I | PSR_F)
40        msr     cpsr, r0
41       
42        /* zero the bss */
43        ldr     r1, =_bss_end_
44        ldr     r0, =_bss_start_
45
46_bss_init:       
47        mov     r2, #0
48        cmp     r0, r1
49        strlot  r2, [r0], #4
50        blo     _bss_init        /* loop while r0 < r1 */
51
52
53        /* --- Initialize stack pointer registers */
54        /* Enter IRQ mode and set up the IRQ stack pointer */
55        mov     r0, #(PSR_MODE_IRQ | PSR_I | PSR_F)     /* No interrupts */
56        msr     cpsr, r0
57        ldr     r1, =_irq_stack_size
58        ldr     sp, =_irq_stack
59        add     sp, sp, r1
60
61        /* Enter FIQ mode and set up the FIQ stack pointer */
62        mov     r0, #(PSR_MODE_FIQ | PSR_I | PSR_F)     /* No interrupts */
63        msr     cpsr, r0
64        ldr     r1, =_fiq_stack_size
65        ldr     sp, =_fiq_stack
66        add     sp, sp, r1
67
68        /* Enter ABT mode and set up the ABT stack pointer */
69        mov     r0, #(PSR_MODE_ABT | PSR_I | PSR_F)     /* No interrupts */
70        msr     cpsr, r0
71        ldr     r1, =_abt_stack_size
72        ldr     sp, =_abt_stack
73        add     sp, sp, r1
74       
75        /* Set up the SVC stack pointer last and stay in SVC mode */
76        mov     r0, #(PSR_MODE_SVC | PSR_I | PSR_F)     /* No interrupts */
77        msr     cpsr, r0
78        ldr     r1, =_svc_stack_size
79        ldr     sp, =_svc_stack
80        add     sp, sp, r1
81        sub     sp, sp, #0x64   
82
83        /*
84         * Initialize the MMU. After we return, the MMU is enabled,
85         * and memory may be remapped. I hope we don't remap this
86         * memory away.
87         */
88        ldr     r0, =mem_map
89        bl      mmu_init               
90
91        /*
92         * Initialize the exception vectors. This includes the
93         * exceptions vectors (0x00000000-0x0000001c), and the
94         * pointers to the exception handlers (0x00000020-0x0000003c).
95         */
96        mov     r0, #0
97        adr     r1, vector_block
98        ldmia   r1!, {r2-r9}
99        stmia   r0!, {r2-r9}
100        ldmia   r1!, {r2-r9}
101        stmia   r0!, {r2-r9}
102
103        /* Now we are prepared to start the BSP's C code */
104        bl      boot_card
105
106        /*
107         * Theoretically, we could return to what started us up,
108         * but we'd have to have saved the registers and stacks.
109         * Instead, we'll just reset.
110         */
111        bl      bsp_reset
112
113        /* We shouldn't get here. If we do, hang */
114_hang:  b       _hang
115
116       
117/*
118 * This is the exception vector table and the pointers to
119 * the functions that handle the exceptions. It's a total
120 * of 16 words (64 bytes)
121 */
122vector_block:   
123        ldr     pc, Reset_Handler
124        ldr     pc, Undefined_Handler
125        ldr     pc, SWI_Handler
126        ldr     pc, Prefetch_Handler
127        ldr     pc, Abort_Handler
128        nop
129        ldr     pc, IRQ_Handler
130        ldr     pc, FIQ_Handler
131
132Reset_Handler:          b       bsp_reset
133Undefined_Handler:      b       Undefined_Handler
134SWI_Handler:            b       SWI_Handler
135Prefetch_Handler:       b       Prefetch_Handler
136Abort_Handler:          b       Abort_Handler
137                        nop
138IRQ_Handler:            b       IRQ_Handler
139FIQ_Handler:            b       FIQ_Handler
140
141.globl Reset_Handler
142.globl Undefined_Handler
143.globl SWI_Handler
144.globl Prefetch_Handler
145.globl Abort_Handler
146.globl IRQ_Handler
147.globl FIQ_Handler
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