source: rtems/c/src/lib/libbsp/arm/csb336/startup/bspstart.c @ d50ba03

4.104.115
Last change on this file since d50ba03 was d50ba03, checked in by Joel Sherrill <joel.sherrill@…>, on 09/22/08 at 21:49:11

2008-09-22 Joel Sherrill <joel.sherrill@…>

  • Makefile.am, configure.ac, console/uart.c, startup/bspclean.c, startup/bspstart.c: Use standardized bsp_cleanup() which can optionally print a message, poll for user to press key, and call bsp_reset(). Using this eliminates the various bsp_cleanup() implementations which had their own implementation and variety of string constants.
  • startup/bspreset.c: New file.
  • Property mode set to 100644
File size: 3.3 KB
RevLine 
[1a3d1f3e]1/*
2 * Cogent CSB336 - MC9328MXL SBC startup code
3 *
4 * Copyright (c) 2004 by Cogent Computer Systems
5 * Written by Jay Monkman <jtm@lopingdog.com>
[b7774253]6 *
[1a3d1f3e]7 * The license and distribution terms for this file may be
8 * found in the file LICENSE in this distribution or at
[0c0ae29]9 * http://www.rtems.com/license/LICENSE.
[1a3d1f3e]10 *
11 *  $Id$
12 */
[b7774253]13
[1a3d1f3e]14#include <bsp.h>
[b1cc4ec9]15#include <rtems/bspIo.h>
[1a3d1f3e]16#include <mc9328mxl.h>
17
18extern void rtems_irq_mngt_init(void);
[b7774253]19extern void mmu_set_cpu_async_mode(void);
20
21/*
22 * bsp_start_default - BSP initialization function
23 *
24 *   This function is called before RTEMS is initialized and used
25 *   adjust the kernel's configuration.
26 *
27 *   This function also configures the CPU's memory protection unit.
28 *
29 * RESTRICTIONS/LIMITATIONS:
30 *   Since RTEMS is not configured, no RTEMS functions can be called.
31 *
32 */
[1a3d1f3e]33void bsp_start_default( void )
34{
[b7774253]35  int i;
36
37  /* Set the MCU prescaler to divide by 1 */
38  MC9328MXL_PLL_CSCR &= ~MC9328MXL_PLL_CSCR_PRESC;
39
40  /* Enable the MCU PLL */
41  MC9328MXL_PLL_CSCR |= MC9328MXL_PLL_CSCR_MPEN;
42
43  /* Delay to allow time for PLL to get going */
44  for (i = 0; i < 100; i++) {
45    asm volatile ("nop\n");
46  }
[1a3d1f3e]47
[b7774253]48  /* Set the CPU to asynchrous clock mode, so it uses its fastest clock */
49  mmu_set_cpu_async_mode();
[1a3d1f3e]50
[b7774253]51  /* disable interrupts */
52  MC9328MXL_AITC_INTENABLEL = 0;
53  MC9328MXL_AITC_INTENABLEH = 0;
54
55  /* Set interrupt priority to -1 (allow all priorities) */
56  MC9328MXL_AITC_NIMASK = 0x1f;
57
58  /*
59   * Init rtems exceptions management
60   */
61  rtems_exception_init_mngt();
62
63  /*
64   * Init rtems interrupt management
65   */
66  rtems_irq_mngt_init();
67} /* bsp_start */
[1a3d1f3e]68
69/* Calcuate the frequency for perclk1 */
70int get_perclk1_freq(void)
71{
[b7774253]72  unsigned int fin;
73  unsigned int fpll;
74  unsigned int pd;
75  unsigned int mfd;
76  unsigned int mfi;
77  unsigned int mfn;
78  uint32_t reg;
79  int perclk1;
80
81  if (MC9328MXL_PLL_CSCR & MC9328MXL_PLL_CSCR_SYSSEL) {
82    /* Use external oscillator */
83    fin = BSP_OSC_FREQ;
84  } else {
85    /* Use scaled xtal freq */
86    fin = BSP_XTAL_FREQ * 512;
87  }
88
89  /* calculate the output of the system PLL */
90  reg = MC9328MXL_PLL_SPCTL0;
91  pd = ((reg & MC9328MXL_PLL_SPCTL_PD_MASK) >>
92        MC9328MXL_PLL_SPCTL_PD_SHIFT);
93  mfd = ((reg & MC9328MXL_PLL_SPCTL_MFD_MASK) >>
94         MC9328MXL_PLL_SPCTL_MFD_SHIFT);
95  mfi = ((reg & MC9328MXL_PLL_SPCTL_MFI_MASK) >>
96         MC9328MXL_PLL_SPCTL_MFI_SHIFT);
97  mfn = ((reg & MC9328MXL_PLL_SPCTL_MFN_MASK) >>
98         MC9328MXL_PLL_SPCTL_MFN_SHIFT);
[1a3d1f3e]99
100#if 0
[b7774253]101  printk("fin = %d\n", fin);
102  printk("pd = %d\n", pd);
103  printk("mfd = %d\n", mfd);
104  printk("mfi = %d\n", mfi);
105  printk("mfn = %d\n", mfn);
106  printk("rounded (fin * mfi) / (pd + 1) = %d\n", (fin * mfi) / (pd + 1));
107  printk("rounded (fin * mfn) / ((pd + 1) * (mfd + 1)) = %d\n",
108         ((long long)fin * mfn) / ((pd + 1) * (mfd + 1)));
[1a3d1f3e]109#endif
110
[b7774253]111  fpll = 2 * ( ((fin * mfi  + (pd + 1) / 2) / (pd + 1)) +
112               (((long long)fin * mfn + ((pd + 1) * (mfd + 1)) / 2) /
113               ((pd + 1) * (mfd + 1))) );
[1a3d1f3e]114
[b7774253]115  /* calculate the output of the PERCLK1 divider */
116  reg = MC9328MXL_PLL_PCDR;
117  perclk1 = fpll / (1 + ((reg & MC9328MXL_PLL_PCDR_PCLK1_MASK) >>
118                         MC9328MXL_PLL_PCDR_PCLK1_SHIFT));
[1a3d1f3e]119
[b7774253]120  return perclk1;
[1a3d1f3e]121}
122
123/*
124 *  By making this a weak alias for bsp_start_default, a brave soul
125 *  can override the actual bsp_start routine used.
126 */
127void bsp_start (void) __attribute__ ((weak, alias("bsp_start_default")));
128
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