source: rtems/c/src/lib/libbsp/arm/csb336/start/start.S @ 9b4422a2

4.115
Last change on this file since 9b4422a2 was 9b4422a2, checked in by Joel Sherrill <joel.sherrill@…>, on 05/03/12 at 15:09:24

Remove All CVS Id Strings Possible Using a Script

Script does what is expected and tries to do it as
smartly as possible.

+ remove occurrences of two blank comment lines

next to each other after Id string line removed.

+ remove entire comment blocks which only exited to

contain CVS Ids

+ If the processing left a blank line at the top of

a file, it was removed.

  • Property mode set to 100644
File size: 4.5 KB
Line 
1/*
2 * Cogent CSB336 startup code
3 *
4 * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com>
5 *
6 * The license and distribution terms for this file may be
7 * found in the file LICENSE in this distribution or at
8 * http://www.rtems.com/license/LICENSE.
9 */
10
11#include <bsp/linker-symbols.h>
12
13/* Some standard definitions...*/
14.equ PSR_MODE_USR,       0x10
15.equ PSR_MODE_FIQ,       0x11
16.equ PSR_MODE_IRQ,       0x12
17.equ PSR_MODE_SVC,       0x13
18.equ PSR_MODE_ABT,       0x17
19.equ PSR_MODE_UNDEF,     0x1B
20.equ PSR_MODE_SYS,       0x1F
21
22.equ PSR_I,              0x80
23.equ PSR_F,              0x40
24.equ PSR_T,              0x20
25
26.text
27.globl  _start
28_start:
29        /*
30         * Since I don't plan to return to the bootloader,
31         * I don't have to save the registers.
32         *
33         * I'll just set the CPSR for SVC mode, interrupts
34         * off, and ARM instructions.
35         */
36        mov     r0, #(PSR_MODE_SVC | PSR_I | PSR_F)
37        msr     cpsr, r0
38
39        /* zero the bss */
40        ldr     r1, =bsp_section_bss_end
41        ldr     r0, =bsp_section_bss_begin
42
43_bss_init:
44        mov     r2, #0
45        cmp     r0, r1
46        strlot  r2, [r0], #4
47        blo     _bss_init        /* loop while r0 < r1 */
48
49
50        /* --- Initialize stack pointer registers */
51        /* Enter IRQ mode and set up the IRQ stack pointer */
52        mov     r0, #(PSR_MODE_IRQ | PSR_I | PSR_F)     /* No interrupts */
53        msr     cpsr, r0
54        ldr     r1, =bsp_stack_irq_size
55        ldr     sp, =bsp_stack_irq_begin
56        add     sp, sp, r1
57
58        /* Enter FIQ mode and set up the FIQ stack pointer */
59        mov     r0, #(PSR_MODE_FIQ | PSR_I | PSR_F)     /* No interrupts */
60        msr     cpsr, r0
61        ldr     r1, =bsp_stack_fiq_size
62        ldr     sp, =bsp_stack_fiq_begin
63        add     sp, sp, r1
64
65        /* Enter ABT mode and set up the ABT stack pointer */
66        mov     r0, #(PSR_MODE_ABT | PSR_I | PSR_F)     /* No interrupts */
67        msr     cpsr, r0
68        ldr     r1, =bsp_stack_abt_size
69        ldr     sp, =bsp_stack_abt_begin
70        add     sp, sp, r1
71
72        /* Enter UNDEF mode and set up the UNDEF stack pointer */
73        mov     r0, #(PSR_MODE_UNDEF | PSR_I | PSR_F)     /* No interrupts */
74        msr     cpsr, r0
75        ldr     r1, =bsp_stack_und_size
76        ldr     sp, =bsp_stack_und_begin
77        add     sp, sp, r1
78
79        /* Set up the SVC stack pointer last and stay in SVC mode */
80        mov     r0, #(PSR_MODE_SVC | PSR_I | PSR_F)     /* No interrupts */
81        msr     cpsr, r0
82        ldr     r1, =bsp_stack_svc_size
83        ldr     sp, =bsp_stack_svc_begin
84        add     sp, sp, r1
85        sub     sp, sp, #0x64
86
87        /*
88         * Initialize the MMU. After we return, the MMU is enabled,
89         * and memory may be remapped. I hope we don't remap this
90         * memory away.
91         */
92        ldr     r0, =mem_map
93        bl      mmu_init
94
95        /*
96         * Initialize the exception vectors. This includes the
97         * exceptions vectors (0x00000000-0x0000001c), and the
98         * pointers to the exception handlers (0x00000020-0x0000003c).
99         */
100        mov     r0, #0
101        adr     r1, vector_block
102        ldmia   r1!, {r2-r9}
103        stmia   r0!, {r2-r9}
104        ldmia   r1!, {r2-r9}
105        stmia   r0!, {r2-r9}
106
107        /* Now we are prepared to start the BSP's C code */
108        mov     r0, #0
109        bl      boot_card
110
111        /*
112         * Theoretically, we could return to what started us up,
113         * but we'd have to have saved the registers and stacks.
114         * Instead, we'll just reset.
115         */
116        bl      bsp_reset
117
118        /* We shouldn't get here. If we do, hang */
119_hang:  b       _hang
120
121
122/*
123 * This is the exception vector table and the pointers to
124 * the functions that handle the exceptions. It's a total
125 * of 16 words (64 bytes)
126 */
127vector_block:
128        ldr     pc, Reset_Handler
129        ldr     pc, Undefined_Handler
130        ldr     pc, SWI_Handler
131        ldr     pc, Prefetch_Handler
132        ldr     pc, Abort_Handler
133        nop
134        ldr     pc, IRQ_Handler
135        ldr     pc, FIQ_Handler
136
137Reset_Handler:          b       bsp_reset
138Undefined_Handler:      b       Undefined_Handler
139SWI_Handler:            b       SWI_Handler
140Prefetch_Handler:       b       Prefetch_Handler
141Abort_Handler:          b       Abort_Handler
142                        nop
143IRQ_Handler:            b       IRQ_Handler
144FIQ_Handler:            b       FIQ_Handler
145
146.globl Reset_Handler
147.globl Undefined_Handler
148.globl SWI_Handler
149.globl Prefetch_Handler
150.globl Abort_Handler
151.globl IRQ_Handler
152.globl FIQ_Handler
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