source: rtems/c/src/lib/libbsp/arm/csb336/start/start.S @ 32b8506

4.104.115
Last change on this file since 32b8506 was 32b8506, checked in by Ralf Corsepius <ralf.corsepius@…>, on 11/29/09 at 14:53:02

Whitespace removal.
  • Property mode set to 100644
File size: 4.6 KB
Line 
1/*
2 * Cogent CSB336 startup code
3 *
4 * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com>
5 *
6 * The license and distribution terms for this file may be
7 * found in the file LICENSE in this distribution or at
8 *
9 * http://www.rtems.com/license/LICENSE.
10 *
11 *
12 * $Id$
13 */
14
15#warning Call to boot_card has changed and needs checking.
16#warning The call is "void boot_card(const char* cmdline);"
17#warning You need to pass a NULL.
18#warning Please check and remove these warnings.
19
20/* Some standard definitions...*/
21.equ PSR_MODE_USR,       0x10
22.equ PSR_MODE_FIQ,       0x11
23.equ PSR_MODE_IRQ,       0x12
24.equ PSR_MODE_SVC,       0x13
25.equ PSR_MODE_ABT,       0x17
26.equ PSR_MODE_UNDEF,     0x1B
27.equ PSR_MODE_SYS,       0x1F
28
29.equ PSR_I,              0x80
30.equ PSR_F,              0x40
31.equ PSR_T,              0x20
32
33.text
34.globl  _start
35_start:
36        /*
37         * Since I don't plan to return to the bootloader,
38         * I don't have to save the registers.
39         *
40         * I'll just set the CPSR for SVC mode, interrupts
41         * off, and ARM instructions.
42         */
43        mov     r0, #(PSR_MODE_SVC | PSR_I | PSR_F)
44        msr     cpsr, r0
45
46        /* zero the bss */
47        ldr     r1, =_bss_end_
48        ldr     r0, =_bss_start_
49
50_bss_init:
51        mov     r2, #0
52        cmp     r0, r1
53        strlot  r2, [r0], #4
54        blo     _bss_init        /* loop while r0 < r1 */
55
56
57        /* --- Initialize stack pointer registers */
58        /* Enter IRQ mode and set up the IRQ stack pointer */
59        mov     r0, #(PSR_MODE_IRQ | PSR_I | PSR_F)     /* No interrupts */
60        msr     cpsr, r0
61        ldr     r1, =_irq_stack_size
62        ldr     sp, =_irq_stack
63        add     sp, sp, r1
64
65        /* Enter FIQ mode and set up the FIQ stack pointer */
66        mov     r0, #(PSR_MODE_FIQ | PSR_I | PSR_F)     /* No interrupts */
67        msr     cpsr, r0
68        ldr     r1, =_fiq_stack_size
69        ldr     sp, =_fiq_stack
70        add     sp, sp, r1
71
72        /* Enter ABT mode and set up the ABT stack pointer */
73        mov     r0, #(PSR_MODE_ABT | PSR_I | PSR_F)     /* No interrupts */
74        msr     cpsr, r0
75        ldr     r1, =_abt_stack_size
76        ldr     sp, =_abt_stack
77        add     sp, sp, r1
78
79        /* Enter UNDEF mode and set up the UNDEF stack pointer */
80        mov     r0, #(PSR_MODE_UNDEF | PSR_I | PSR_F)     /* No interrupts */
81        msr     cpsr, r0
82        ldr     r1, =_undef_stack_size
83        ldr     sp, =_undef_stack
84        add     sp, sp, r1
85
86        /* Set up the SVC stack pointer last and stay in SVC mode */
87        mov     r0, #(PSR_MODE_SVC | PSR_I | PSR_F)     /* No interrupts */
88        msr     cpsr, r0
89        ldr     r1, =_svc_stack_size
90        ldr     sp, =_svc_stack
91        add     sp, sp, r1
92        sub     sp, sp, #0x64
93
94        /*
95         * Initialize the MMU. After we return, the MMU is enabled,
96         * and memory may be remapped. I hope we don't remap this
97         * memory away.
98         */
99        ldr     r0, =mem_map
100        bl      mmu_init
101
102        /*
103         * Initialize the exception vectors. This includes the
104         * exceptions vectors (0x00000000-0x0000001c), and the
105         * pointers to the exception handlers (0x00000020-0x0000003c).
106         */
107        mov     r0, #0
108        adr     r1, vector_block
109        ldmia   r1!, {r2-r9}
110        stmia   r0!, {r2-r9}
111        ldmia   r1!, {r2-r9}
112        stmia   r0!, {r2-r9}
113
114        /* Now we are prepared to start the BSP's C code */
115        bl      boot_card
116
117        /*
118         * Theoretically, we could return to what started us up,
119         * but we'd have to have saved the registers and stacks.
120         * Instead, we'll just reset.
121         */
122        bl      bsp_reset
123
124        /* We shouldn't get here. If we do, hang */
125_hang:  b       _hang
126
127
128/*
129 * This is the exception vector table and the pointers to
130 * the functions that handle the exceptions. It's a total
131 * of 16 words (64 bytes)
132 */
133vector_block:
134        ldr     pc, Reset_Handler
135        ldr     pc, Undefined_Handler
136        ldr     pc, SWI_Handler
137        ldr     pc, Prefetch_Handler
138        ldr     pc, Abort_Handler
139        nop
140        ldr     pc, IRQ_Handler
141        ldr     pc, FIQ_Handler
142
143Reset_Handler:          b       bsp_reset
144Undefined_Handler:      b       Undefined_Handler
145SWI_Handler:            b       SWI_Handler
146Prefetch_Handler:       b       Prefetch_Handler
147Abort_Handler:          b       Abort_Handler
148                        nop
149IRQ_Handler:            b       IRQ_Handler
150FIQ_Handler:            b       FIQ_Handler
151
152.globl Reset_Handler
153.globl Undefined_Handler
154.globl SWI_Handler
155.globl Prefetch_Handler
156.globl Abort_Handler
157.globl IRQ_Handler
158.globl FIQ_Handler
Note: See TracBrowser for help on using the repository browser.