source: rtems/c/src/lib/libbsp/arm/csb336/start/start.S @ 183af89

4.115
Last change on this file since 183af89 was 183af89, checked in by Joel Sherrill <joel.sherrill@…>, on 05/03/12 at 19:17:23

Miscellaneous - Clean up file headers so patterns followed

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  • Property mode set to 100644
File size: 4.5 KB
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1/*
2 * Cogent CSB336 startup code
3 *
4 * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com>
5 *
6 * The license and distribution terms for this file may be
7 * found in the file LICENSE in this distribution or at
8 * http://www.rtems.com/license/LICENSE.
9 *
10 * $Id$
11 */
12
13#include <bsp/linker-symbols.h>
14
15/* Some standard definitions...*/
16.equ PSR_MODE_USR,       0x10
17.equ PSR_MODE_FIQ,       0x11
18.equ PSR_MODE_IRQ,       0x12
19.equ PSR_MODE_SVC,       0x13
20.equ PSR_MODE_ABT,       0x17
21.equ PSR_MODE_UNDEF,     0x1B
22.equ PSR_MODE_SYS,       0x1F
23
24.equ PSR_I,              0x80
25.equ PSR_F,              0x40
26.equ PSR_T,              0x20
27
28.text
29.globl  _start
30_start:
31        /*
32         * Since I don't plan to return to the bootloader,
33         * I don't have to save the registers.
34         *
35         * I'll just set the CPSR for SVC mode, interrupts
36         * off, and ARM instructions.
37         */
38        mov     r0, #(PSR_MODE_SVC | PSR_I | PSR_F)
39        msr     cpsr, r0
40
41        /* zero the bss */
42        ldr     r1, =bsp_section_bss_end
43        ldr     r0, =bsp_section_bss_begin
44
45_bss_init:
46        mov     r2, #0
47        cmp     r0, r1
48        strlot  r2, [r0], #4
49        blo     _bss_init        /* loop while r0 < r1 */
50
51
52        /* --- Initialize stack pointer registers */
53        /* Enter IRQ mode and set up the IRQ stack pointer */
54        mov     r0, #(PSR_MODE_IRQ | PSR_I | PSR_F)     /* No interrupts */
55        msr     cpsr, r0
56        ldr     r1, =bsp_stack_irq_size
57        ldr     sp, =bsp_stack_irq_begin
58        add     sp, sp, r1
59
60        /* Enter FIQ mode and set up the FIQ stack pointer */
61        mov     r0, #(PSR_MODE_FIQ | PSR_I | PSR_F)     /* No interrupts */
62        msr     cpsr, r0
63        ldr     r1, =bsp_stack_fiq_size
64        ldr     sp, =bsp_stack_fiq_begin
65        add     sp, sp, r1
66
67        /* Enter ABT mode and set up the ABT stack pointer */
68        mov     r0, #(PSR_MODE_ABT | PSR_I | PSR_F)     /* No interrupts */
69        msr     cpsr, r0
70        ldr     r1, =bsp_stack_abt_size
71        ldr     sp, =bsp_stack_abt_begin
72        add     sp, sp, r1
73
74        /* Enter UNDEF mode and set up the UNDEF stack pointer */
75        mov     r0, #(PSR_MODE_UNDEF | PSR_I | PSR_F)     /* No interrupts */
76        msr     cpsr, r0
77        ldr     r1, =bsp_stack_und_size
78        ldr     sp, =bsp_stack_und_begin
79        add     sp, sp, r1
80
81        /* Set up the SVC stack pointer last and stay in SVC mode */
82        mov     r0, #(PSR_MODE_SVC | PSR_I | PSR_F)     /* No interrupts */
83        msr     cpsr, r0
84        ldr     r1, =bsp_stack_svc_size
85        ldr     sp, =bsp_stack_svc_begin
86        add     sp, sp, r1
87        sub     sp, sp, #0x64
88
89        /*
90         * Initialize the MMU. After we return, the MMU is enabled,
91         * and memory may be remapped. I hope we don't remap this
92         * memory away.
93         */
94        ldr     r0, =mem_map
95        bl      mmu_init
96
97        /*
98         * Initialize the exception vectors. This includes the
99         * exceptions vectors (0x00000000-0x0000001c), and the
100         * pointers to the exception handlers (0x00000020-0x0000003c).
101         */
102        mov     r0, #0
103        adr     r1, vector_block
104        ldmia   r1!, {r2-r9}
105        stmia   r0!, {r2-r9}
106        ldmia   r1!, {r2-r9}
107        stmia   r0!, {r2-r9}
108
109        /* Now we are prepared to start the BSP's C code */
110        mov     r0, #0
111        bl      boot_card
112
113        /*
114         * Theoretically, we could return to what started us up,
115         * but we'd have to have saved the registers and stacks.
116         * Instead, we'll just reset.
117         */
118        bl      bsp_reset
119
120        /* We shouldn't get here. If we do, hang */
121_hang:  b       _hang
122
123
124/*
125 * This is the exception vector table and the pointers to
126 * the functions that handle the exceptions. It's a total
127 * of 16 words (64 bytes)
128 */
129vector_block:
130        ldr     pc, Reset_Handler
131        ldr     pc, Undefined_Handler
132        ldr     pc, SWI_Handler
133        ldr     pc, Prefetch_Handler
134        ldr     pc, Abort_Handler
135        nop
136        ldr     pc, IRQ_Handler
137        ldr     pc, FIQ_Handler
138
139Reset_Handler:          b       bsp_reset
140Undefined_Handler:      b       Undefined_Handler
141SWI_Handler:            b       SWI_Handler
142Prefetch_Handler:       b       Prefetch_Handler
143Abort_Handler:          b       Abort_Handler
144                        nop
145IRQ_Handler:            b       IRQ_Handler
146FIQ_Handler:            b       FIQ_Handler
147
148.globl Reset_Handler
149.globl Undefined_Handler
150.globl SWI_Handler
151.globl Prefetch_Handler
152.globl Abort_Handler
153.globl IRQ_Handler
154.globl FIQ_Handler
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