[1a3d1f3e] | 1 | /* |
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| 2 | * MC9323MXL Ethernet driver |
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| 3 | * |
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| 4 | * Copyright (c) 2004 by Cogent Computer Systems |
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| 5 | * Written by Jay Monkman <jtm@lopingdog.com> |
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| 6 | * |
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| 7 | * The license and distribution terms for this file may be |
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| 8 | * found in the file LICENSE in this distribution or at |
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| 9 | * |
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[0c0ae29] | 10 | * http://www.rtems.com/license/LICENSE. |
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[1a3d1f3e] | 11 | * |
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| 12 | * $Id$ |
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| 13 | */ |
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| 14 | #include <rtems.h> |
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| 15 | #include <rtems/rtems_bsdnet.h> |
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| 16 | #include <mc9328mxl.h> |
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| 17 | #include "lan91c11x.h" |
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| 18 | |
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| 19 | #include <stdio.h> |
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| 20 | #include <string.h> |
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| 21 | |
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| 22 | #include <errno.h> |
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| 23 | #include <rtems/error.h> |
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[d000bd0] | 24 | #include <rtems/bspIo.h> |
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[1a3d1f3e] | 25 | |
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| 26 | #include <sys/param.h> |
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| 27 | #include <sys/mbuf.h> |
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| 28 | #include <sys/socket.h> |
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| 29 | #include <sys/sockio.h> |
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| 30 | |
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| 31 | #include <net/if.h> |
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| 32 | |
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| 33 | #include <netinet/in.h> |
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| 34 | #include <netinet/if_ether.h> |
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| 35 | |
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| 36 | #include <irq.h> |
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| 37 | |
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| 38 | /* RTEMS event used by interrupt handler to start receive daemon. */ |
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| 39 | #define START_RECEIVE_EVENT RTEMS_EVENT_1 |
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| 40 | |
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| 41 | /* RTEMS event used to start transmit daemon. */ |
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| 42 | #define START_TRANSMIT_EVENT RTEMS_EVENT_2 |
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| 43 | |
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[9c05850c] | 44 | static void enet_isr(rtems_irq_hdl_param); |
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[1a3d1f3e] | 45 | static void enet_isr_on(const rtems_irq_connect_data *unused); |
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| 46 | static void enet_isr_off(const rtems_irq_connect_data *unused); |
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| 47 | static int enet_isr_is_on(const rtems_irq_connect_data *irq); |
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| 48 | |
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| 49 | /* Replace the first value with the clock's interrupt name. */ |
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[9c05850c] | 50 | rtems_irq_connect_data mc9328mxl_enet_isr_data = { |
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| 51 | .name = BSP_INT_GPIO_PORTA, |
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[c193baad] | 52 | .hdl = enet_isr, |
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[9c05850c] | 53 | .handle = (void *)BSP_INT_GPIO_PORTA, |
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| 54 | .on = enet_isr_on, |
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| 55 | .off = enet_isr_off, |
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| 56 | .isOn = enet_isr_is_on, |
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| 57 | }; |
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[1a3d1f3e] | 58 | typedef struct { |
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| 59 | unsigned long rx_packets; /* total packets received */ |
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| 60 | unsigned long tx_packets; /* total packets transmitted */ |
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| 61 | unsigned long rx_bytes; /* total bytes received */ |
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| 62 | unsigned long tx_bytes; /* total bytes transmitted */ |
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| 63 | unsigned long interrupts; /* total number of interrupts */ |
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| 64 | unsigned long rx_interrupts; /* total number of rx interrupts */ |
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| 65 | unsigned long tx_interrupts; /* total number of tx interrupts */ |
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| 66 | unsigned long txerr_interrupts; /* total number of tx error interrupts */ |
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| 67 | |
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| 68 | } eth_stats_t; |
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| 69 | |
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| 70 | /* |
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| 71 | * Hardware-specific storage |
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| 72 | */ |
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| 73 | typedef struct |
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| 74 | { |
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| 75 | /* |
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| 76 | * Connection to networking code |
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| 77 | * This entry *must* be the first in the sonic_softc structure. |
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| 78 | */ |
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| 79 | struct arpcom arpcom; |
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[32b8506] | 80 | |
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[1a3d1f3e] | 81 | int accept_bcast; |
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[32b8506] | 82 | |
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[1a3d1f3e] | 83 | /* Tasks waiting for interrupts */ |
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| 84 | rtems_id rx_task; |
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| 85 | rtems_id tx_task; |
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[32b8506] | 86 | |
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[1a3d1f3e] | 87 | eth_stats_t stats; |
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| 88 | |
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| 89 | } mc9328mxl_enet_softc_t; |
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| 90 | |
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| 91 | static mc9328mxl_enet_softc_t softc; |
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| 92 | |
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| 93 | |
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| 94 | /* function prototypes */ |
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[32b8506] | 95 | int rtems_mc9328mxl_enet_attach(struct rtems_bsdnet_ifconfig *config, |
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[1a3d1f3e] | 96 | void *chip); |
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| 97 | void mc9328mxl_enet_init(void *arg); |
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| 98 | void mc9328mxl_enet_init_hw(mc9328mxl_enet_softc_t *sc); |
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| 99 | void mc9328mxl_enet_start(struct ifnet *ifp); |
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| 100 | void mc9328mxl_enet_stop (mc9328mxl_enet_softc_t *sc); |
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| 101 | void mc9328mxl_enet_tx_task (void *arg); |
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| 102 | void mc9328mxl_enet_sendpacket (struct ifnet *ifp, struct mbuf *m); |
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| 103 | void mc9328mxl_enet_rx_task(void *arg); |
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| 104 | void mc9328mxl_enet_stats(mc9328mxl_enet_softc_t *sc); |
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[32b8506] | 105 | static int mc9328mxl_enet_ioctl(struct ifnet *ifp, |
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[7a5265ff] | 106 | ioctl_command_t command, caddr_t data); |
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[1a3d1f3e] | 107 | |
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| 108 | |
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| 109 | int rtems_mc9328mxl_enet_attach ( |
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| 110 | struct rtems_bsdnet_ifconfig *config, |
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| 111 | void *chip /* only one ethernet, so no chip number */ |
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| 112 | ) |
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| 113 | { |
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| 114 | struct ifnet *ifp; |
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| 115 | int mtu; |
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| 116 | int unitnumber; |
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| 117 | char *unitname; |
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| 118 | int tmp; |
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[32b8506] | 119 | |
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[1a3d1f3e] | 120 | /* |
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| 121 | * Parse driver name |
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| 122 | */ |
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| 123 | unitnumber = rtems_bsdnet_parse_driver_name(config, &unitname); |
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| 124 | if (unitnumber < 0) { |
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| 125 | return 0; |
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| 126 | } |
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[32b8506] | 127 | |
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[1a3d1f3e] | 128 | /* |
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| 129 | * Is driver free? |
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| 130 | */ |
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| 131 | if (unitnumber != 0) { |
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| 132 | printf ("Bad MC9328MXL unit number.\n"); |
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| 133 | return 0; |
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| 134 | } |
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| 135 | |
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| 136 | ifp = &softc.arpcom.ac_if; |
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| 137 | if (ifp->if_softc != NULL) { |
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| 138 | printf ("Driver already in use.\n"); |
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| 139 | return 0; |
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| 140 | } |
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[32b8506] | 141 | |
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[1a3d1f3e] | 142 | /* zero out the control structure */ |
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| 143 | memset( &softc, 0, sizeof(softc) ); |
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[32b8506] | 144 | |
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| 145 | |
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[1a3d1f3e] | 146 | /* set the MAC address */ |
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| 147 | tmp = lan91c11x_read_reg(LAN91C11X_IA0); |
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| 148 | softc.arpcom.ac_enaddr[0] = tmp & 0xff; |
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| 149 | softc.arpcom.ac_enaddr[1] = (tmp >> 8) & 0xff; |
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| 150 | |
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| 151 | tmp = lan91c11x_read_reg(LAN91C11X_IA2); |
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| 152 | softc.arpcom.ac_enaddr[2] = tmp & 0xff; |
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| 153 | softc.arpcom.ac_enaddr[3] = (tmp >> 8) & 0xff; |
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| 154 | |
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| 155 | tmp = lan91c11x_read_reg(LAN91C11X_IA4); |
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| 156 | softc.arpcom.ac_enaddr[4] = tmp & 0xff; |
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| 157 | softc.arpcom.ac_enaddr[5] = (tmp >> 8) & 0xff; |
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| 158 | |
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| 159 | if (config->mtu) { |
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| 160 | mtu = config->mtu; |
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| 161 | } else { |
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| 162 | mtu = ETHERMTU; |
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| 163 | } |
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| 164 | |
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| 165 | softc.accept_bcast = !config->ignore_broadcast; |
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[32b8506] | 166 | |
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[1a3d1f3e] | 167 | /* |
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| 168 | * Set up network interface values |
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| 169 | */ |
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| 170 | ifp->if_softc = &softc; |
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| 171 | ifp->if_unit = unitnumber; |
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| 172 | ifp->if_name = unitname; |
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| 173 | ifp->if_mtu = mtu; |
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| 174 | ifp->if_init = mc9328mxl_enet_init; |
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| 175 | ifp->if_ioctl = mc9328mxl_enet_ioctl; |
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| 176 | ifp->if_start = mc9328mxl_enet_start; |
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| 177 | ifp->if_output = ether_output; |
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| 178 | ifp->if_flags = IFF_BROADCAST; |
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| 179 | if (ifp->if_snd.ifq_maxlen == 0) { |
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| 180 | ifp->if_snd.ifq_maxlen = ifqmaxlen; |
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| 181 | } |
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[32b8506] | 182 | |
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[1a3d1f3e] | 183 | /* Attach the interface */ |
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| 184 | if_attach (ifp); |
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| 185 | ether_ifattach (ifp); |
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| 186 | return 1; |
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| 187 | } |
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| 188 | |
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| 189 | void mc9328mxl_enet_init(void *arg) |
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| 190 | { |
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[32b8506] | 191 | mc9328mxl_enet_softc_t *sc = arg; |
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[1a3d1f3e] | 192 | struct ifnet *ifp = &sc->arpcom.ac_if; |
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[32b8506] | 193 | |
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| 194 | /* |
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| 195 | *This is for stuff that only gets done once (mc9328mxl_enet_init() |
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| 196 | * gets called multiple times |
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[1a3d1f3e] | 197 | */ |
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| 198 | if (sc->tx_task == 0) |
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| 199 | { |
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| 200 | /* Set up ENET hardware */ |
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| 201 | mc9328mxl_enet_init_hw(sc); |
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[32b8506] | 202 | |
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[1a3d1f3e] | 203 | /* Start driver tasks */ |
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[32b8506] | 204 | sc->rx_task = rtems_bsdnet_newproc("ENrx", |
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| 205 | 4096, |
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| 206 | mc9328mxl_enet_rx_task, |
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[1a3d1f3e] | 207 | sc); |
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[32b8506] | 208 | sc->tx_task = rtems_bsdnet_newproc("ENtx", |
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| 209 | 4096, |
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| 210 | mc9328mxl_enet_tx_task, |
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[1a3d1f3e] | 211 | sc); |
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| 212 | } /* if tx_task */ |
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[32b8506] | 213 | |
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[1a3d1f3e] | 214 | |
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| 215 | /* Configure for promiscuous if needed */ |
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| 216 | if (ifp->if_flags & IFF_PROMISC) { |
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[32b8506] | 217 | lan91c11x_write_reg(LAN91C11X_RCR, |
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[1a3d1f3e] | 218 | (lan91c11x_read_reg(LAN91C11X_RCR) | |
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| 219 | LAN91C11X_RCR_PRMS)); |
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| 220 | } |
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[32b8506] | 221 | |
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| 222 | |
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[1a3d1f3e] | 223 | /* |
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| 224 | * Tell the world that we're running. |
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| 225 | */ |
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| 226 | ifp->if_flags |= IFF_RUNNING; |
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[32b8506] | 227 | |
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[1a3d1f3e] | 228 | /* Enable TX/RX */ |
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[32b8506] | 229 | lan91c11x_write_reg(LAN91C11X_TCR, |
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[1a3d1f3e] | 230 | (lan91c11x_read_reg(LAN91C11X_TCR) | |
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| 231 | LAN91C11X_TCR_TXENA)); |
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| 232 | |
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[32b8506] | 233 | lan91c11x_write_reg(LAN91C11X_RCR, |
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[1a3d1f3e] | 234 | (lan91c11x_read_reg(LAN91C11X_RCR) | |
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| 235 | LAN91C11X_RCR_RXEN)); |
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[32b8506] | 236 | |
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[1a3d1f3e] | 237 | |
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| 238 | } /* mc9328mxl_enet_init() */ |
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| 239 | |
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| 240 | void mc9328mxl_enet_init_hw(mc9328mxl_enet_softc_t *sc) |
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| 241 | { |
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| 242 | uint16_t stat; |
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| 243 | uint16_t my = 0; |
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| 244 | |
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| 245 | lan91c11x_write_reg(LAN91C11X_RCR, LAN91C11X_RCR_RST); |
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| 246 | lan91c11x_write_reg(LAN91C11X_RCR, 0); |
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| 247 | rtems_task_wake_after(1); |
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| 248 | |
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| 249 | /* Reset the PHY */ |
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| 250 | lan91c11x_write_phy_reg(PHY_CTRL, PHY_CTRL_RST); |
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| 251 | while(lan91c11x_read_phy_reg(PHY_CTRL) & PHY_CTRL_RST) { |
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| 252 | rtems_task_wake_after(1); |
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| 253 | } |
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| 254 | |
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| 255 | |
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| 256 | stat = lan91c11x_read_phy_reg(PHY_STAT); |
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[32b8506] | 257 | |
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[1a3d1f3e] | 258 | if(stat & PHY_STAT_CAPT4) { |
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| 259 | my |= PHY_ADV_T4; |
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| 260 | } |
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| 261 | /* 100Mbs doesn't work, so we won't advertise it */ |
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| 262 | |
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| 263 | if(stat & PHY_STAT_CAPTXF) { |
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| 264 | my |= PHY_ADV_TXFDX; |
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| 265 | } |
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| 266 | if(stat & PHY_STAT_CAPTXH) { |
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| 267 | my |= PHY_ADV_TXHDX; |
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| 268 | } |
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| 269 | |
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| 270 | if(stat & PHY_STAT_CAPTF) { |
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| 271 | my |= PHY_ADV_10FDX; |
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| 272 | } |
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| 273 | |
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| 274 | if(stat & PHY_STAT_CAPTH) { |
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| 275 | my |= PHY_ADV_10HDX; |
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| 276 | } |
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[32b8506] | 277 | |
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[1a3d1f3e] | 278 | my |= PHY_ADV_CSMA; |
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[32b8506] | 279 | |
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[1a3d1f3e] | 280 | lan91c11x_write_phy_reg(PHY_AD, my); |
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| 281 | |
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| 282 | |
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| 283 | /* Enable Autonegotiation */ |
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| 284 | #if 0 |
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[32b8506] | 285 | lan91c11x_write_phy_reg(PHY_CTRL, |
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[1a3d1f3e] | 286 | (PHY_CTRL_ANEGEN | PHY_CTRL_ANEGRST)); |
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| 287 | #endif |
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| 288 | |
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| 289 | /* Enable full duplex, let MAC take care |
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| 290 | * of padding and CRC. |
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| 291 | */ |
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[32b8506] | 292 | lan91c11x_write_reg(LAN91C11X_TCR, |
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[1a3d1f3e] | 293 | (LAN91C11X_TCR_PADEN | |
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| 294 | LAN91C11X_TCR_SWFDUP)); |
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| 295 | |
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| 296 | /* Disable promisc, don'tstrip CRC */ |
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| 297 | lan91c11x_write_reg(LAN91C11X_RCR, 0); |
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| 298 | |
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| 299 | /* Enable auto-negotiation, LEDA is link, LEDB is traffic */ |
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[32b8506] | 300 | lan91c11x_write_reg(LAN91C11X_RPCR, |
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[1a3d1f3e] | 301 | (LAN91C11X_RPCR_ANEG | |
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| 302 | LAN91C11X_RPCR_LS2B)); |
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| 303 | |
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| 304 | /* Don't add wait states, enable PHY power */ |
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| 305 | lan91c11x_write_reg(LAN91C11X_CONFIG, |
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| 306 | (LAN91C11X_CONFIG_NOWAIT | |
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| 307 | LAN91C11X_CONFIG_PWR)); |
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| 308 | |
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| 309 | /* Disable error interrupts, enable auto release */ |
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| 310 | lan91c11x_write_reg(LAN91C11X_CTRL, LAN91C11X_CTRL_AUTO); |
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[32b8506] | 311 | |
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[1a3d1f3e] | 312 | /* Reset MMU */ |
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[32b8506] | 313 | lan91c11x_write_reg(LAN91C11X_MMUCMD, |
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[1a3d1f3e] | 314 | LAN91C11X_MMUCMD_RESETMMU ); |
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| 315 | |
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| 316 | |
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| 317 | rtems_task_wake_after(100); |
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| 318 | /* Enable Autonegotiation */ |
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| 319 | lan91c11x_write_phy_reg(PHY_CTRL, 0x3000); |
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| 320 | rtems_task_wake_after(100); |
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| 321 | |
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| 322 | /* Enable Interrupts for RX */ |
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| 323 | lan91c11x_write_reg(LAN91C11X_INT, LAN91C11X_INT_RXMASK); |
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| 324 | |
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| 325 | /* Enable interrupts on GPIO Port A3 */ |
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| 326 | /* Make pin 3 an input */ |
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[32b8506] | 327 | MC9328MXL_GPIOA_DDIR &= ~bit(3); |
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[1a3d1f3e] | 328 | |
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| 329 | /* Use GPIO function for pin 3 */ |
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| 330 | MC9328MXL_GPIOA_GIUS |= bit(3); |
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| 331 | |
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| 332 | /* Set for active high, level triggered interupt */ |
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| 333 | MC9328MXL_GPIOA_ICR1 = ((MC9328MXL_GPIOA_ICR1 & ~(3 << 6)) | |
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| 334 | (2 << 6)); |
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| 335 | |
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| 336 | /* Enable GPIO port A3 interrupt */ |
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| 337 | MC9328MXL_GPIOA_IMR |= bit(3); |
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| 338 | |
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| 339 | /* Install the interrupt handler */ |
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| 340 | BSP_install_rtems_irq_handler(&mc9328mxl_enet_isr_data); |
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[32b8506] | 341 | |
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[1a3d1f3e] | 342 | } /* mc9328mxl_enet_init_hw() */ |
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| 343 | |
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| 344 | void mc9328mxl_enet_start(struct ifnet *ifp) |
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| 345 | { |
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| 346 | mc9328mxl_enet_softc_t *sc = ifp->if_softc; |
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[32b8506] | 347 | |
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[1a3d1f3e] | 348 | rtems_event_send(sc->tx_task, START_TRANSMIT_EVENT); |
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| 349 | ifp->if_flags |= IFF_OACTIVE; |
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| 350 | } |
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| 351 | |
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| 352 | void mc9328mxl_enet_stop (mc9328mxl_enet_softc_t *sc) |
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| 353 | { |
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| 354 | struct ifnet *ifp = &sc->arpcom.ac_if; |
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[32b8506] | 355 | |
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[1a3d1f3e] | 356 | ifp->if_flags &= ~IFF_RUNNING; |
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[32b8506] | 357 | |
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[1a3d1f3e] | 358 | |
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| 359 | /* Stop the transmitter and receiver. */ |
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[32b8506] | 360 | lan91c11x_write_reg(LAN91C11X_TCR, |
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| 361 | (lan91c11x_read_reg(LAN91C11X_TCR) & |
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[1a3d1f3e] | 362 | ~LAN91C11X_TCR_TXENA)); |
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| 363 | |
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[32b8506] | 364 | lan91c11x_write_reg(LAN91C11X_RCR, |
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| 365 | (lan91c11x_read_reg(LAN91C11X_RCR) & |
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[1a3d1f3e] | 366 | ~LAN91C11X_RCR_RXEN)); |
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[32b8506] | 367 | |
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[1a3d1f3e] | 368 | } |
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| 369 | |
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| 370 | /* |
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| 371 | * Driver transmit daemon |
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| 372 | */ |
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| 373 | void mc9328mxl_enet_tx_task(void *arg) |
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| 374 | { |
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| 375 | mc9328mxl_enet_softc_t *sc = (mc9328mxl_enet_softc_t *)arg; |
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| 376 | struct ifnet *ifp = &sc->arpcom.ac_if; |
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| 377 | struct mbuf *m; |
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| 378 | rtems_event_set events; |
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[32b8506] | 379 | |
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[1a3d1f3e] | 380 | for (;;) |
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| 381 | { |
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| 382 | rtems_bsdnet_event_receive( |
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| 383 | START_TRANSMIT_EVENT, |
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| 384 | RTEMS_EVENT_ANY | RTEMS_WAIT, |
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| 385 | RTEMS_NO_TIMEOUT, |
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| 386 | &events); |
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[32b8506] | 387 | |
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[1a3d1f3e] | 388 | /* Send packets till queue is empty */ |
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| 389 | for (;;) |
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| 390 | { |
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| 391 | /* Get the next mbuf chain to transmit. */ |
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| 392 | IF_DEQUEUE(&ifp->if_snd, m); |
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| 393 | if (!m) { |
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| 394 | break; |
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| 395 | } |
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| 396 | mc9328mxl_enet_sendpacket (ifp, m); |
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| 397 | softc.stats.tx_packets++; |
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[32b8506] | 398 | |
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[1a3d1f3e] | 399 | } |
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| 400 | ifp->if_flags &= ~IFF_OACTIVE; |
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| 401 | } |
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| 402 | } |
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| 403 | |
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| 404 | /* Send packet */ |
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| 405 | void mc9328mxl_enet_sendpacket (struct ifnet *ifp, struct mbuf *m) |
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| 406 | { |
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| 407 | struct mbuf *l = NULL; |
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| 408 | int size = 0; |
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| 409 | int tmp; |
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| 410 | int i; |
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| 411 | int start; |
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| 412 | uint16_t d; |
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| 413 | |
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| 414 | /* How big is the packet ? */ |
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| 415 | l = m; |
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| 416 | do { |
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| 417 | size += l->m_len; |
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| 418 | l = l->m_next; |
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| 419 | } while (l != NULL); |
---|
| 420 | |
---|
| 421 | /* Allocate a TX buffer */ |
---|
[32b8506] | 422 | lan91c11x_write_reg(LAN91C11X_MMUCMD, |
---|
[1a3d1f3e] | 423 | (LAN91C11X_MMUCMD_ALLOCTX | |
---|
| 424 | (size >> 8))); |
---|
| 425 | |
---|
| 426 | /* Wait for the allocation */ |
---|
| 427 | while ((lan91c11x_read_reg(LAN91C11X_INT) & LAN91C11X_INT_ALLOC) == 0) { |
---|
| 428 | continue; |
---|
| 429 | } |
---|
| 430 | |
---|
| 431 | tmp = lan91c11x_read_reg(LAN91C11X_PNR); |
---|
| 432 | lan91c11x_write_reg(LAN91C11X_PNR, ((tmp >> 8) & 0xff)); |
---|
| 433 | |
---|
| 434 | /* Set the data pointer for auto increment */ |
---|
| 435 | lan91c11x_write_reg(LAN91C11X_PTR, LAN91C11X_PTR_AUTOINC); |
---|
| 436 | |
---|
| 437 | /* A delay is needed between pointer and data access ?!? */ |
---|
| 438 | for (i = 0; i < 10; i++) { |
---|
| 439 | continue; |
---|
| 440 | } |
---|
| 441 | |
---|
| 442 | /* Write status word */ |
---|
| 443 | lan91c11x_write_reg(LAN91C11X_DATA, 0); |
---|
| 444 | |
---|
| 445 | /* Write byte count */ |
---|
| 446 | if (size & 1) { |
---|
| 447 | size++; |
---|
| 448 | } |
---|
[32b8506] | 449 | lan91c11x_write_reg(LAN91C11X_DATA, size + 6); |
---|
[1a3d1f3e] | 450 | |
---|
| 451 | lan91c11x_lock(); |
---|
| 452 | |
---|
| 453 | /* Copy the mbuf */ |
---|
[32b8506] | 454 | l = m; |
---|
[1a3d1f3e] | 455 | start = 0; |
---|
| 456 | d = 0; |
---|
| 457 | while (l != NULL) |
---|
| 458 | { |
---|
| 459 | uint8_t *data; |
---|
[32b8506] | 460 | |
---|
[1a3d1f3e] | 461 | data = mtod(l, uint8_t *); |
---|
| 462 | |
---|
| 463 | for (i = start; i < l->m_len; i++) { |
---|
| 464 | if ((i & 1) == 0) { |
---|
| 465 | d = data[i] << 8; |
---|
| 466 | } else { |
---|
| 467 | d = d | data[i]; |
---|
| 468 | lan91c11x_write_reg_fast(LAN91C11X_DATA, htons(d)); |
---|
| 469 | } |
---|
| 470 | } |
---|
| 471 | |
---|
| 472 | /* If everything is 2 byte aligned, i will be even */ |
---|
| 473 | start = (i & 1); |
---|
| 474 | |
---|
| 475 | l = l->m_next; |
---|
| 476 | } |
---|
[32b8506] | 477 | |
---|
[1a3d1f3e] | 478 | /* write control byte */ |
---|
| 479 | if (i & 1) { |
---|
[32b8506] | 480 | lan91c11x_write_reg_fast(LAN91C11X_DATA, |
---|
[1a3d1f3e] | 481 | htons(LAN91C11X_PKT_CTRL_ODD | d)); |
---|
| 482 | } else { |
---|
| 483 | lan91c11x_write_reg_fast(LAN91C11X_DATA, 0); |
---|
| 484 | } |
---|
| 485 | |
---|
| 486 | lan91c11x_unlock(); |
---|
| 487 | |
---|
| 488 | /* Enable TX interrupts */ |
---|
[32b8506] | 489 | lan91c11x_write_reg(LAN91C11X_INT, |
---|
[1a3d1f3e] | 490 | (lan91c11x_read_reg(LAN91C11X_INT) | |
---|
| 491 | LAN91C11X_INT_TXMASK | |
---|
| 492 | LAN91C11X_INT_TXEMASK)); |
---|
| 493 | |
---|
| 494 | /* Enqueue it */ |
---|
[32b8506] | 495 | lan91c11x_write_reg(LAN91C11X_MMUCMD, |
---|
[1a3d1f3e] | 496 | LAN91C11X_MMUCMD_ENQUEUE); |
---|
[32b8506] | 497 | |
---|
[1a3d1f3e] | 498 | /* free the mbuf chain we just copied */ |
---|
| 499 | m_freem(m); |
---|
[32b8506] | 500 | |
---|
[1a3d1f3e] | 501 | } /* mc9328mxl_enet_sendpacket () */ |
---|
| 502 | |
---|
| 503 | |
---|
| 504 | /* reader task */ |
---|
| 505 | void mc9328mxl_enet_rx_task(void *arg) |
---|
| 506 | { |
---|
| 507 | mc9328mxl_enet_softc_t *sc = (mc9328mxl_enet_softc_t *)arg; |
---|
| 508 | struct ifnet *ifp = &sc->arpcom.ac_if; |
---|
| 509 | struct mbuf *m; |
---|
| 510 | struct ether_header *eh; |
---|
| 511 | rtems_event_set events; |
---|
| 512 | int pktlen; |
---|
| 513 | uint16_t rsw; |
---|
| 514 | uint16_t bc; |
---|
| 515 | uint16_t cbyte; |
---|
| 516 | int i; |
---|
| 517 | uint16_t int_reg; |
---|
| 518 | |
---|
| 519 | /* Input packet handling loop */ |
---|
| 520 | while (1) { |
---|
| 521 | rtems_bsdnet_event_receive( |
---|
| 522 | START_RECEIVE_EVENT, |
---|
| 523 | RTEMS_EVENT_ANY | RTEMS_WAIT, |
---|
| 524 | RTEMS_NO_TIMEOUT, |
---|
| 525 | &events); |
---|
| 526 | |
---|
| 527 | /* Configure for reads from RX data area */ |
---|
[32b8506] | 528 | lan91c11x_write_reg(LAN91C11X_PTR, |
---|
[1a3d1f3e] | 529 | (LAN91C11X_PTR_AUTOINC | |
---|
| 530 | LAN91C11X_PTR_RCV | |
---|
| 531 | LAN91C11X_PTR_READ)); |
---|
| 532 | |
---|
| 533 | /* read the receive status word */ |
---|
| 534 | rsw = lan91c11x_read_reg(LAN91C11X_DATA); |
---|
| 535 | /* TBD: Need to check rsw here */ |
---|
| 536 | |
---|
| 537 | /* read the byte count */ |
---|
| 538 | bc = lan91c11x_read_reg(LAN91C11X_DATA); |
---|
| 539 | pktlen = (bc & 0x7ff) - 6; |
---|
| 540 | |
---|
| 541 | /* get an mbuf for this packet */ |
---|
| 542 | MGETHDR(m, M_WAIT, MT_DATA); |
---|
[32b8506] | 543 | |
---|
[1a3d1f3e] | 544 | /* now get a cluster pointed to by the mbuf */ |
---|
| 545 | /* since an mbuf by itself is too small */ |
---|
| 546 | MCLGET(m, M_WAIT); |
---|
| 547 | |
---|
| 548 | lan91c11x_lock(); |
---|
[32b8506] | 549 | |
---|
[1a3d1f3e] | 550 | /* Copy the received packet into an mbuf */ |
---|
| 551 | for (i = 0; i < (pktlen / 2); i++) { |
---|
[32b8506] | 552 | ((uint16_t*)m->m_ext.ext_buf)[i] = |
---|
[1a3d1f3e] | 553 | lan91c11x_read_reg_fast(LAN91C11X_DATA); |
---|
| 554 | } |
---|
| 555 | |
---|
| 556 | cbyte = lan91c11x_read_reg_fast(LAN91C11X_DATA); |
---|
| 557 | if (cbyte & LAN91C11X_PKT_CTRL_ODD) { |
---|
| 558 | ((uint16_t*)m->m_ext.ext_buf)[i] = cbyte; |
---|
| 559 | pktlen++; |
---|
| 560 | } |
---|
| 561 | lan91c11x_unlock(); |
---|
| 562 | |
---|
| 563 | /* Release the packets memory */ |
---|
[32b8506] | 564 | lan91c11x_write_reg(LAN91C11X_MMUCMD, |
---|
[1a3d1f3e] | 565 | LAN91C11X_MMUCMD_REMTOP); |
---|
| 566 | |
---|
| 567 | /* set the receiving interface */ |
---|
| 568 | m->m_pkthdr.rcvif = ifp; |
---|
| 569 | m->m_nextpkt = 0; |
---|
[32b8506] | 570 | |
---|
[1a3d1f3e] | 571 | /* set the length of the mbuf */ |
---|
| 572 | m->m_len = pktlen - (sizeof(struct ether_header)); |
---|
| 573 | m->m_pkthdr.len = m->m_len; |
---|
[32b8506] | 574 | |
---|
[1a3d1f3e] | 575 | /* strip off the ethernet header from the mbuf */ |
---|
| 576 | /* but save the pointer to it */ |
---|
| 577 | eh = mtod (m, struct ether_header *); |
---|
| 578 | m->m_data += sizeof(struct ether_header); |
---|
[32b8506] | 579 | |
---|
| 580 | |
---|
[1a3d1f3e] | 581 | softc.stats.rx_packets++; |
---|
| 582 | |
---|
| 583 | /* give all this stuff to the stack */ |
---|
| 584 | ether_input(ifp, eh, m); |
---|
| 585 | |
---|
| 586 | /* renable RX interrupts */ |
---|
| 587 | int_reg = lan91c11x_read_reg(LAN91C11X_INT); |
---|
| 588 | int_reg |= LAN91C11X_INT_RXMASK; |
---|
| 589 | lan91c11x_write_reg(LAN91C11X_INT, int_reg); |
---|
| 590 | |
---|
| 591 | } |
---|
[32b8506] | 592 | } /* mc9328mxl_enet_rx_task */ |
---|
[1a3d1f3e] | 593 | |
---|
| 594 | |
---|
| 595 | /* Show interface statistics */ |
---|
| 596 | void mc9328mxl_enet_stats (mc9328mxl_enet_softc_t *sc) |
---|
| 597 | { |
---|
| 598 | printf (" Total Interrupts:%-8lu", sc->stats.interrupts); |
---|
| 599 | printf (" Rx Interrupts:%-8lu", sc->stats.rx_interrupts); |
---|
| 600 | printf (" Tx Interrupts:%-8lu\n", sc->stats.tx_interrupts); |
---|
| 601 | printf (" Tx Error Interrupts:%-8lu\n", sc->stats.txerr_interrupts); |
---|
| 602 | printf (" Rx Packets:%-8lu", sc->stats.rx_packets); |
---|
| 603 | printf (" Tx Packets:%-8lu\n", sc->stats.tx_packets); |
---|
| 604 | } |
---|
| 605 | |
---|
| 606 | |
---|
| 607 | /* Enables mc9328mxl_enet interrupts. */ |
---|
| 608 | static void enet_isr_on(const rtems_irq_connect_data *unused) |
---|
| 609 | { |
---|
| 610 | /* Enable interrupts */ |
---|
| 611 | MC9328MXL_AITC_INTENNUM = MC9328MXL_INT_GPIO_PORTA; |
---|
[32b8506] | 612 | |
---|
[1a3d1f3e] | 613 | return; |
---|
| 614 | } |
---|
| 615 | |
---|
| 616 | /* Disables enet interrupts */ |
---|
| 617 | static void enet_isr_off(const rtems_irq_connect_data *unused) |
---|
| 618 | { |
---|
| 619 | /* disable all various TX/RX interrupts */ |
---|
| 620 | MC9328MXL_AITC_INTDISNUM = MC9328MXL_INT_GPIO_PORTA; |
---|
| 621 | |
---|
| 622 | return; |
---|
| 623 | } |
---|
| 624 | |
---|
| 625 | /* Tests to see if mc9328mxl_enet interrupts are enabled, and returns non-0 if so. |
---|
| 626 | * If interrupt is not enabled, returns 0. |
---|
| 627 | */ |
---|
| 628 | static int enet_isr_is_on(const rtems_irq_connect_data *irq) |
---|
| 629 | { |
---|
| 630 | return MC9328MXL_AITC_INTENABLEL & (1 << MC9328MXL_INT_GPIO_PORTA); |
---|
| 631 | } |
---|
| 632 | |
---|
| 633 | /* Driver ioctl handler */ |
---|
| 634 | static int |
---|
[7a5265ff] | 635 | mc9328mxl_enet_ioctl (struct ifnet *ifp, ioctl_command_t command, caddr_t data) |
---|
[1a3d1f3e] | 636 | { |
---|
| 637 | mc9328mxl_enet_softc_t *sc = ifp->if_softc; |
---|
| 638 | int error = 0; |
---|
[32b8506] | 639 | |
---|
[1a3d1f3e] | 640 | switch (command) { |
---|
| 641 | case SIOCGIFADDR: |
---|
| 642 | case SIOCSIFADDR: |
---|
| 643 | ether_ioctl (ifp, command, data); |
---|
| 644 | break; |
---|
[32b8506] | 645 | |
---|
[1a3d1f3e] | 646 | case SIOCSIFFLAGS: |
---|
| 647 | switch (ifp->if_flags & (IFF_UP | IFF_RUNNING)) |
---|
| 648 | { |
---|
| 649 | case IFF_RUNNING: |
---|
| 650 | mc9328mxl_enet_stop (sc); |
---|
| 651 | break; |
---|
[32b8506] | 652 | |
---|
[1a3d1f3e] | 653 | case IFF_UP: |
---|
| 654 | mc9328mxl_enet_init (sc); |
---|
| 655 | break; |
---|
[32b8506] | 656 | |
---|
[1a3d1f3e] | 657 | case IFF_UP | IFF_RUNNING: |
---|
| 658 | mc9328mxl_enet_stop (sc); |
---|
| 659 | mc9328mxl_enet_init (sc); |
---|
| 660 | break; |
---|
[32b8506] | 661 | |
---|
[1a3d1f3e] | 662 | default: |
---|
| 663 | break; |
---|
| 664 | } /* switch (if_flags) */ |
---|
| 665 | break; |
---|
[32b8506] | 666 | |
---|
[1a3d1f3e] | 667 | case SIO_RTEMS_SHOW_STATS: |
---|
| 668 | mc9328mxl_enet_stats (sc); |
---|
| 669 | break; |
---|
[32b8506] | 670 | |
---|
[1a3d1f3e] | 671 | /* |
---|
| 672 | * FIXME: All sorts of multicast commands need to be added here! |
---|
| 673 | */ |
---|
| 674 | default: |
---|
| 675 | error = EINVAL; |
---|
| 676 | break; |
---|
| 677 | } /* switch (command) */ |
---|
| 678 | return error; |
---|
| 679 | } |
---|
| 680 | |
---|
| 681 | /* interrupt handler */ |
---|
[9c05850c] | 682 | static void enet_isr(rtems_irq_hdl_param unused) |
---|
[1a3d1f3e] | 683 | { |
---|
| 684 | uint16_t int_reg; |
---|
| 685 | |
---|
| 686 | softc.stats.interrupts++; |
---|
| 687 | /* get the ISR status and determine RX or TX */ |
---|
| 688 | int_reg = lan91c11x_read_reg(LAN91C11X_INT); |
---|
[32b8506] | 689 | |
---|
[1a3d1f3e] | 690 | /* Handle RX interrupts */ |
---|
| 691 | if ((int_reg & LAN91C11X_INT_RX) && (int_reg & LAN91C11X_INT_RXMASK)) { |
---|
| 692 | softc.stats.rx_interrupts++; |
---|
| 693 | |
---|
| 694 | /* Disable the interrupt */ |
---|
| 695 | int_reg &= ~LAN91C11X_INT_RXMASK; |
---|
[32b8506] | 696 | |
---|
[1a3d1f3e] | 697 | rtems_event_send (softc.rx_task, START_RECEIVE_EVENT); |
---|
| 698 | } |
---|
| 699 | |
---|
| 700 | /* Handle TX Empty interrupts */ |
---|
| 701 | if ((int_reg & LAN91C11X_INT_TXE) && (int_reg & LAN91C11X_INT_TXEMASK)) { |
---|
| 702 | softc.stats.tx_interrupts++; |
---|
| 703 | |
---|
| 704 | /* Disable the interrupt */ |
---|
| 705 | int_reg &= ~LAN91C11X_INT_TXEMASK; |
---|
| 706 | |
---|
| 707 | /* Acknowledge the interrupt */ |
---|
| 708 | int_reg |= LAN91C11X_INT_TXE; |
---|
| 709 | |
---|
| 710 | rtems_event_send(softc.tx_task, START_TRANSMIT_EVENT); |
---|
| 711 | |
---|
| 712 | } |
---|
| 713 | |
---|
| 714 | /* Handle interrupts for transmit errors */ |
---|
| 715 | if ((int_reg & LAN91C11X_INT_TX) && (int_reg & LAN91C11X_INT_TXMASK)) { |
---|
| 716 | softc.stats.txerr_interrupts++; |
---|
| 717 | printk("Caught TX interrupt - error on transmission\n"); |
---|
| 718 | } |
---|
[32b8506] | 719 | |
---|
[1a3d1f3e] | 720 | /* Update the interrupt register on the 91c11x */ |
---|
| 721 | lan91c11x_write_reg(LAN91C11X_INT, int_reg); |
---|
| 722 | |
---|
| 723 | /* clear GPIO Int. status */ |
---|
| 724 | MC9328MXL_GPIOA_ISR |= bit(3); |
---|
| 725 | } |
---|
| 726 | |
---|