source: rtems/c/src/lib/libbsp/arm/csb336/network/lan91c11x.h @ a0390782

4.115
Last change on this file since a0390782 was a0390782, checked in by Chirayu Desai <cdesai@…>, on 12/08/13 at 04:53:54

arm: csb336: Add doxygen
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1/**
2 * @file
3 *
4 * @ingroup arm_csb336
5 *
6 * @brief SMSC LAN91C11x ethernet devices definitions.
7 */
8
9/*
10 *  Header file for SMSC LAN91C11x ethernet devices
11 *
12 *  Copyright (c) 2004 by Cogent Computer Systems
13 *  Written by Jay Monkman <jtm@lopingdog.com>
14 *
15 *  The license and distribution terms for this file may be
16 *  found in the file LICENSE in this distribution or at
17 *  http://www.rtems.com/license/LICENSE.
18 */
19#ifndef __LAN91C11X_H__
20#define __LAN91C11X_H__
21
22#include <rtems.h>
23#include <bsp.h>
24
25uint16_t lan91c11x_read_reg(int);
26void lan91c11x_write_reg(int, uint16_t);
27uint16_t lan91c11x_read_reg_fast(int);
28void lan91c11x_write_reg_fast(int, uint16_t);
29void lan91c11x_write_phy_reg(int , uint16_t);
30uint16_t lan91c11x_read_phy_reg(int);
31void lan91c11x_unlock(void);
32void lan91c11x_lock(void);
33
34#define LAN91C11X_BASE_ADDR 0x12000000
35
36#define LAN91C11X_REG(_b_, _r_) ((((_b_) & 0xf) << 4) | ((_r_) & 0xf))
37
38
39#define LAN91C11X_TCR             (LAN91C11X_REG(0, 0x0))
40#define LAN91C11X_EPHSTAT         (LAN91C11X_REG(0, 0x2))
41#define LAN91C11X_RCR             (LAN91C11X_REG(0, 0x4))
42#define LAN91C11X_CNTR            (LAN91C11X_REG(0, 0x6))
43#define LAN91C11X_MIR             (LAN91C11X_REG(0, 0x8))
44#define LAN91C11X_RPCR            (LAN91C11X_REG(0, 0xa))
45#define LAN91C11X_BANK            (LAN91C11X_REG(0, 0xe))
46#define LAN91C11X_CONFIG          (LAN91C11X_REG(1, 0x0))
47#define LAN91C11X_BASE            (LAN91C11X_REG(1, 0x2))
48#define LAN91C11X_IA0             (LAN91C11X_REG(1, 0x4))
49#define LAN91C11X_IA2             (LAN91C11X_REG(1, 0x6))
50#define LAN91C11X_IA4             (LAN91C11X_REG(1, 0x8))
51#define LAN91C11X_GNRL            (LAN91C11X_REG(1, 0xa))
52#define LAN91C11X_CTRL            (LAN91C11X_REG(1, 0xc))
53#define LAN91C11X_MMUCMD          (LAN91C11X_REG(2, 0x0))
54#define LAN91C11X_PNR             (LAN91C11X_REG(2, 0x2))
55#define LAN91C11X_FIFO            (LAN91C11X_REG(2, 0x4))
56#define LAN91C11X_PTR             (LAN91C11X_REG(2, 0x6))
57#define LAN91C11X_DATA            (LAN91C11X_REG(2, 0x8))
58#define LAN91C11X_INT             (LAN91C11X_REG(2, 0xc))
59#define LAN91C11X_MT0             (LAN91C11X_REG(3, 0x0))
60#define LAN91C11X_MT2             (LAN91C11X_REG(3, 0x2))
61#define LAN91C11X_MT4             (LAN91C11X_REG(3, 0x4))
62#define LAN91C11X_MT6             (LAN91C11X_REG(3, 0x6))
63#define LAN91C11X_MGMT            (LAN91C11X_REG(3, 0x8))
64#define LAN91C11X_REV             (LAN91C11X_REG(3, 0xa))
65#define LAN91C11X_ERCV            (LAN91C11X_REG(3, 0xc))
66
67
68#define LAN91C11X_TCR_TXENA      (bit(0))
69#define LAN91C11X_TCR_LOOP       (bit(1))
70#define LAN91C11X_TCR_FORCOL     (bit(2))
71#define LAN91C11X_TCR_PADEN      (bit(7))
72#define LAN91C11X_TCR_NOCRC      (bit(8))
73#define LAN91C11X_TCR_MONCSN     (bit(10))
74#define LAN91C11X_TCR_FDUPLX     (bit(11))
75#define LAN91C11X_TCR_STPSQET    (bit(12))
76#define LAN91C11X_TCR_EPHLOOP    (bit(13))
77#define LAN91C11X_TCR_SWFDUP     (bit(15))
78
79#define LAN91C11X_EPHSTAT_TXSUC             (bit(0))
80#define LAN91C11X_EPHSTAT_SNGLCOL           (bit(1))
81#define LAN91C11X_EPHSTAT_MULCOL            (bit(2))
82#define LAN91C11X_EPHSTAT_LTXMUL            (bit(3))
83#define LAN91C11X_EPHSTAT_16COL             (bit(4))
84#define LAN91C11X_EPHSTAT_SQET              (bit(5))
85#define LAN91C11X_EPHSTAT_LTXBRD            (bit(6))
86#define LAN91C11X_EPHSTAT_TXDFR             (bit(7))
87#define LAN91C11X_EPHSTAT_LATCOL            (bit(9))
88#define LAN91C11X_EPHSTAT_LOST              (bit(10))
89#define LAN91C11X_EPHSTAT_EXCDEF            (bit(11))
90#define LAN91C11X_EPHSTAT_CTRROL            (bit(12))
91#define LAN91C11X_EPHSTAT_LINK              (bit(14))
92#define LAN91C11X_EPHSTAT_TXUNRN            (bit(15))
93
94#define LAN91C11X_RCR_RXABT                 (bit(0))
95#define LAN91C11X_RCR_PRMS                  (bit(1))
96#define LAN91C11X_RCR_ALMUL                 (bit(2))
97#define LAN91C11X_RCR_RXEN                  (bit(8))
98#define LAN91C11X_RCR_STRIP                 (bit(9))
99#define LAN91C11X_RCR_ABTENB                (bit(13))
100#define LAN91C11X_RCR_FILT                  (bit(14))
101#define LAN91C11X_RCR_RST                   (bit(15))
102
103#define LAN91C11X_RPCR_LS0B                  (bit(2))
104#define LAN91C11X_RPCR_LS1B                  (bit(3))
105#define LAN91C11X_RPCR_LS2B                  (bit(4))
106#define LAN91C11X_RPCR_LS0A                  (bit(5))
107#define LAN91C11X_RPCR_LS1A                  (bit(6))
108#define LAN91C11X_RPCR_LS2A                  (bit(7))
109#define LAN91C11X_RPCR_ANEG                  (bit(11))
110#define LAN91C11X_RPCR_DPLX                  (bit(12))
111#define LAN91C11X_RPCR_SPEED                 (bit(13))
112
113#define LAN91C11X_CONFIG_EXTPHY              (bit(9))
114#define LAN91C11X_CONFIG_GPCTRL              (bit(10))
115#define LAN91C11X_CONFIG_NOWAIT              (bit(12))
116#define LAN91C11X_CONFIG_PWR                 (bit(15))
117
118#define LAN91C11X_CTRL_STORE                 (bit(0))
119#define LAN91C11X_CTRL_RELOAD                (bit(1))
120#define LAN91C11X_CTRL_EEPROM                (bit(2))
121#define LAN91C11X_CTRL_TEEN                  (bit(5))
122#define LAN91C11X_CTRL_CREN                  (bit(6))
123#define LAN91C11X_CTRL_LEEN                  (bit(7))
124#define LAN91C11X_CTRL_AUTO                  (bit(11))
125#define LAN91C11X_CTRL_RCVBAD                (bit(14))
126
127#define LAN91C11X_MMUCMD_BUSY                (bit(0))
128#define LAN91C11X_MMUCMD_NOOP                (0 << 5)
129#define LAN91C11X_MMUCMD_ALLOCTX             (1 << 5)
130#define LAN91C11X_MMUCMD_RESETMMU            (2 << 5)
131#define LAN91C11X_MMUCMD_REMFRM              (3 << 5)
132#define LAN91C11X_MMUCMD_REMTOP              (4 << 5)
133#define LAN91C11X_MMUCMD_RELEASE             (5 << 5)
134#define LAN91C11X_MMUCMD_ENQUEUE             (6 << 5)
135#define LAN91C11X_MMUCMD_RESETTX             (7 << 5)
136
137#define LAN91C11X_PTR_MASK                   (0x7ff)
138#define LAN91C11X_PTR_NE                     (bit(11))
139#define LAN91C11X_PTR_ETEN                   (bit(12))
140#define LAN91C11X_PTR_READ                   (bit(13))
141#define LAN91C11X_PTR_AUTOINC                (bit(14))
142#define LAN91C11X_PTR_RCV                    (bit(15))
143
144#define LAN91C11X_INT_RX                     (bit(0))
145#define LAN91C11X_INT_TX                     (bit(1))
146#define LAN91C11X_INT_TXE                    (bit(2))
147#define LAN91C11X_INT_ALLOC                  (bit(3))
148#define LAN91C11X_INT_RXOV                   (bit(4))
149#define LAN91C11X_INT_EPH                    (bit(5))
150#define LAN91C11X_INT_ERX                    (bit(6))
151#define LAN91C11X_INT_MD                     (bit(7))
152#define LAN91C11X_INT_RXMASK                 (bit(8))
153#define LAN91C11X_INT_TXMASK                 (bit(9))
154#define LAN91C11X_INT_TXEMASK                (bit(10))
155#define LAN91C11X_INT_ALLOCMASK              (bit(11))
156#define LAN91C11X_INT_RXOVMASK               (bit(12))
157#define LAN91C11X_INT_EPHMASK                (bit(13))
158#define LAN91C11X_INT_ERXMASK                (bit(14))
159#define LAN91C11X_INT_MDMASK                 (bit(15))
160
161#define LAN91C11X_MGMT_MDO                   (bit(0))
162#define LAN91C11X_MGMT_MDI                   (bit(1))
163#define LAN91C11X_MGMT_MCLK                  (bit(2))
164#define LAN91C11X_MGMT_MDOE                  (bit(3))
165#define LAN91C11X_MGMT_MSKCRS100             (bit(14))
166
167
168#define LAN91C11X_PKT_CTRL_CRC               (bit(4))
169#define LAN91C11X_PKT_CTRL_ODD               (bit(5))
170
171
172/* PHY Registers */
173#define PHY_CTRL        0x00    /* PHY Control  */
174#define PHY_STAT        0x01    /* PHY Status */
175#define PHY_ID1         0x02    /* PHY Identifier 1 */
176#define PHY_ID2         0x03    /* PHY Identifier 2 */
177#define PHY_AD          0x04    /* PHY Auto-negotiate Control */
178#define PHY_RMT         0x05    /* PHY Auto-neg Remote End Cap Register */
179#define PHY_CFG1        0x10    /* PHY Configuration 1 */
180#define PHY_CFG2        0x11    /* PHY Configuration 2 */
181#define PHY_INT         0x12    /* Status Output (Interrupt Status) */
182#define PHY_MASK        0x13    /* Interrupt Mask */
183
184/* PHY Control Register Bit Defines */
185#define PHY_CTRL_RST            0x8000  /* PHY Reset */
186#define PHY_CTRL_LPBK           0x4000  /* PHY Loopback */
187#define PHY_CTRL_SPEED          0x2000  /* 100Mbps, 0=10Mpbs */
188#define PHY_CTRL_ANEGEN         0x1000  /* Enable Auto negotiation */
189#define PHY_CTRL_PDN            0x0800  /* PHY Power Down mode */
190#define PHY_CTRL_MIIDIS         0x0400  /* MII 4 bit interface disabled */
191#define PHY_CTRL_ANEGRST        0x0200  /* Reset Auto negotiate */
192#define PHY_CTRL_DPLX           0x0100  /* Full Duplex, 0=Half Duplex */
193#define PHY_CTRL_COLTST         0x0080  /* MII Colision Test */
194
195#define PHY_STAT_CAPT4          0x8000
196#define PHY_STAT_CAPTXF         0x4000
197#define PHY_STAT_CAPTXH         0x2000
198#define PHY_STAT_CAPTF          0x1000
199#define PHY_STAT_CAPTH          0x0800
200#define PHY_STAT_CAPSUPR        0x0040
201#define PHY_STAT_ANEGACK        0x0020
202#define PHY_STAT_REMFLT         0x0010
203#define PHY_STAT_CAPANEG        0x0008
204#define PHY_STAT_LINK           0x0004
205#define PHY_STAT_JAB            0x0002
206#define PHY_STAT_EXREG          0x0001
207
208#define PHY_ADV_NP              0x8000
209#define PHY_ADV_ACK             0x4000
210#define PHY_ADV_RF              0x2000
211#define PHY_ADV_T4              0x0200
212#define PHY_ADV_TXFDX           0x0100
213#define PHY_ADV_TXHDX           0x0080
214#define PHY_ADV_10FDX           0x0040
215#define PHY_ADV_10HDX           0x0020
216#define PHY_ADV_CSMA            0x0001
217
218
219
220
221#endif /* __LAN91C11X_H__ */
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