source: rtems/c/src/lib/libbsp/arm/beagle/startup/bspreset.c @ 0afac6a

4.115
Last change on this file since 0afac6a was 53dd6d61, checked in by Ben Gras <beng@…>, on 11/03/14 at 18:53:40

BSP for several Beagle products

Specifically the beagleboard, beagleboard xM, beaglebone, beaglebone black.

More info on these targets: ​http://www.beagleboard.org/

This commit forms a basic BSP by combining Claas's work with

. new clock and irq code and definitions for

beagle targets (beagleboard and beaglebones), mostly
reused from the Minix codebase, thus making
irqs, ticks and non-polled console mode work too

. new timer code for ns timing with high timer resolution,

24MHz on the AM335X and 13MHz on the DM37XX

. select the console uart based on target at configure time
. removing all the lpc32xx-specific macros and code and

other unused code and definitions that the beagle bsp
was based on

. re-using some standard functions instead of lpc32xx versions
. fixed some whitespace problem in preinstall.am
. fixed some compile warnings
. configure MMU: set 1MB sections directly in the TTBR,

just to show the difference between cacheable RAM and
non-cacheable device memory and invalid ranges; this lets us
turn on caches and not rely on boot loader MMU configuration.
Verified to work when MMU is initially either on or off when
RTEMS gets control.

Thanks for testing, commentary, improvements and fixes to Chris Johns,
Brandon Matthews, Matt Carberry, Romain Bornet, AZ technology and others.

Signed-Off-By: Ben Gras <beng@…>
  • Property mode set to 100644
File size: 1.0 KB
Line 
1/*
2 * Copyright (c) 2014 Ben Gras <beng@shrike-systems.com>. All rights reserved.
3 *
4 * The license and distribution terms for this file may be
5 * found in the file LICENSE in this distribution or at
6 * http://www.rtems.org/license/LICENSE.
7 */
8
9#include <bsp.h>
10#include <bsp/bootcard.h>
11
12#define AM335X_CM_BASE 0x44E00000
13#define AM335X_CM_SIZE 0x1000
14
15#define AM335X_PRM_DEVICE_OFFSET 0xf00
16#define AM335X_PRM_RSTCTRL_REG 0x00
17#define AM335X_RST_GLOBAL_WARM_SW_BIT 0
18
19#define DM37XX_CM_BASE 0x48307000
20#define DM37XX_CM_SIZE 0x1000
21#define DM37XX_PRM_RSTCTRL_REG 0x250
22#define DM37XX_RST_DPLL3_BIT 2
23
24void bsp_reset(void)
25{
26#if IS_DM3730
27  static uint32_t reset_base = DM37XX_CM_BASE;
28  while (true) {
29    mmio_set((reset_base + DM37XX_PRM_RSTCTRL_REG),
30             (1 << DM37XX_RST_DPLL3_BIT));
31  }
32#endif
33
34#if IS_AM335X
35  static uint32_t reset_base = AM335X_CM_BASE;
36  while (true) {
37    mmio_set((reset_base + AM335X_PRM_DEVICE_OFFSET +
38              AM335X_PRM_RSTCTRL_REG),
39             (1 << AM335X_RST_GLOBAL_WARM_SW_BIT));
40  }
41#endif
42}
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