1 | /* ---------------------------------------------------------------------------- */ |
---|
2 | /* Atmel Microcontroller Software Support */ |
---|
3 | /* SAM Software Package License */ |
---|
4 | /* ---------------------------------------------------------------------------- */ |
---|
5 | /* Copyright (c) 2015, Atmel Corporation */ |
---|
6 | /* */ |
---|
7 | /* All rights reserved. */ |
---|
8 | /* */ |
---|
9 | /* Redistribution and use in source and binary forms, with or without */ |
---|
10 | /* modification, are permitted provided that the following condition is met: */ |
---|
11 | /* */ |
---|
12 | /* - Redistributions of source code must retain the above copyright notice, */ |
---|
13 | /* this list of conditions and the disclaimer below. */ |
---|
14 | /* */ |
---|
15 | /* Atmel's name may not be used to endorse or promote products derived from */ |
---|
16 | /* this software without specific prior written permission. */ |
---|
17 | /* */ |
---|
18 | /* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */ |
---|
19 | /* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */ |
---|
20 | /* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */ |
---|
21 | /* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */ |
---|
22 | /* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */ |
---|
23 | /* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */ |
---|
24 | /* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ |
---|
25 | /* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ |
---|
26 | /* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ |
---|
27 | /* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ |
---|
28 | /* ---------------------------------------------------------------------------- */ |
---|
29 | |
---|
30 | /** \addtogroup xdmad_module |
---|
31 | * |
---|
32 | * \section Xdma xDma Configuration Usage |
---|
33 | * |
---|
34 | * To configure a XDMA channel, the user has to follow these few steps : |
---|
35 | * <ul> |
---|
36 | * <li> Initialize a XDMA driver instance by XDMAD_Initialize().</li> |
---|
37 | * <li> choose an available (disabled) channel using XDMAD_AllocateChannel().</li> |
---|
38 | * <li> After the XDMAC selected channel has been programmed, |
---|
39 | * XDMAD_PrepareChannel() is to enable clock and dma peripheral of the DMA, and |
---|
40 | * set Configuration register to set up the transfer type (memory or non-memory |
---|
41 | * peripheral for source and destination) and flow control device.</li> |
---|
42 | * <li> Invoke XDMAD_StartTransfer() to start DMA transfer or |
---|
43 | * XDMAD_StopTransfer() to force stop DMA transfer.</li> |
---|
44 | * <li> Once the buffer of data is transferred, XDMAD_IsTransferDone() |
---|
45 | * checks if DMA transfer is finished.</li> |
---|
46 | * <li> XDMAD_Handler() handles XDMA interrupt, and invoking XDMAD_SetCallback() |
---|
47 | * if provided.</li> |
---|
48 | * </ul> |
---|
49 | * |
---|
50 | * Related files:\n |
---|
51 | * \ref xdmad.h\n |
---|
52 | * \ref xdmad.c.\n |
---|
53 | */ |
---|
54 | |
---|
55 | /** \file */ |
---|
56 | |
---|
57 | /** \addtogroup dmad_functions |
---|
58 | @{*/ |
---|
59 | |
---|
60 | /*---------------------------------------------------------------------------- |
---|
61 | * Includes |
---|
62 | *----------------------------------------------------------------------------*/ |
---|
63 | |
---|
64 | #include "chip.h" |
---|
65 | #include <assert.h> |
---|
66 | static uint8_t xDmad_Initialized = 0; |
---|
67 | |
---|
68 | /*---------------------------------------------------------------------------- |
---|
69 | * Local functions |
---|
70 | *----------------------------------------------------------------------------*/ |
---|
71 | /** |
---|
72 | * \brief Try to allocate a DMA channel for on given controller. |
---|
73 | * \param pDmad Pointer to DMA driver instance. |
---|
74 | * \param bSrcID Source peripheral ID, 0xFF for memory. |
---|
75 | * \param bDstID Destination peripheral ID, 0xFF for memory. |
---|
76 | * \return Channel number if allocation successful, return |
---|
77 | * DMAD_ALLOC_FAILED if allocation failed. |
---|
78 | */ |
---|
79 | static uint32_t XDMAD_AllocateXdmacChannel(sXdmad *pXdmad, |
---|
80 | uint8_t bSrcID, |
---|
81 | uint8_t bDstID) |
---|
82 | { |
---|
83 | uint32_t i; |
---|
84 | |
---|
85 | /* Can't support peripheral to peripheral */ |
---|
86 | if (((bSrcID != XDMAD_TRANSFER_MEMORY) |
---|
87 | && (bDstID != XDMAD_TRANSFER_MEMORY))) |
---|
88 | return XDMAD_ALLOC_FAILED; |
---|
89 | |
---|
90 | /* dma transfer from peripheral to memory */ |
---|
91 | if (bDstID == XDMAD_TRANSFER_MEMORY) { |
---|
92 | if ((!XDMAIF_IsValidatedPeripherOnDma(bSrcID))) { |
---|
93 | TRACE_ERROR("%s:: Allocation failed", __FUNCTION__); |
---|
94 | return XDMAD_ALLOC_FAILED; |
---|
95 | } |
---|
96 | } |
---|
97 | |
---|
98 | /* dma transfer from memory to peripheral */ |
---|
99 | if (bSrcID == XDMAD_TRANSFER_MEMORY) { |
---|
100 | if ((!XDMAIF_IsValidatedPeripherOnDma(bDstID))) { |
---|
101 | TRACE_ERROR("%s:: Allocation failed", __FUNCTION__); |
---|
102 | return XDMAD_ALLOC_FAILED; |
---|
103 | } |
---|
104 | } |
---|
105 | |
---|
106 | for (i = 0; i < pXdmad->numChannels; i ++) { |
---|
107 | if (pXdmad->XdmaChannels[i].state == XDMAD_STATE_FREE) { |
---|
108 | /* Allocate the channel */ |
---|
109 | pXdmad->XdmaChannels[i].state = XDMAD_STATE_ALLOCATED; |
---|
110 | /* Get general informations */ |
---|
111 | pXdmad->XdmaChannels[i].bSrcPeriphID = bSrcID; |
---|
112 | pXdmad->XdmaChannels[i].bDstPeriphID = bDstID; |
---|
113 | pXdmad->XdmaChannels[i].bSrcTxIfID = |
---|
114 | XDMAIF_Get_ChannelNumber(bSrcID, 0); |
---|
115 | pXdmad->XdmaChannels[i].bSrcRxIfID = |
---|
116 | XDMAIF_Get_ChannelNumber(bSrcID, 1); |
---|
117 | pXdmad->XdmaChannels[i].bDstTxIfID = |
---|
118 | XDMAIF_Get_ChannelNumber(bDstID, 0); |
---|
119 | pXdmad->XdmaChannels[i].bDstRxIfID = |
---|
120 | XDMAIF_Get_ChannelNumber(bDstID, 1); |
---|
121 | return ((i) & 0xFF); |
---|
122 | } |
---|
123 | } |
---|
124 | |
---|
125 | TRACE_ERROR("%s:: Allocation failed, all channels are occupied", __FUNCTION__); |
---|
126 | return XDMAD_ALLOC_FAILED; |
---|
127 | } |
---|
128 | |
---|
129 | /*---------------------------------------------------------------------------- |
---|
130 | * Exported functions |
---|
131 | *----------------------------------------------------------------------------*/ |
---|
132 | |
---|
133 | /** |
---|
134 | * \brief Initialize xDMA driver instance. |
---|
135 | * \param pXdmad Pointer to xDMA driver instance. |
---|
136 | * \param bPollingMode Polling DMA transfer: |
---|
137 | * 1. Via XDMAD_IsTransferDone(); or |
---|
138 | * 2. Via XDMAD_Handler(). |
---|
139 | */ |
---|
140 | void XDMAD_Initialize(sXdmad *pXdmad, uint8_t bPollingMode) |
---|
141 | { |
---|
142 | uint32_t j; |
---|
143 | uint32_t volatile timer = 0x7FF; |
---|
144 | |
---|
145 | assert(pXdmad); |
---|
146 | LockMutex(pXdmad->xdmaMutex, timer); |
---|
147 | |
---|
148 | if (xDmad_Initialized) { |
---|
149 | ReleaseMutex(pXdmad->xdmaMutex); |
---|
150 | return; |
---|
151 | } |
---|
152 | |
---|
153 | pXdmad->pXdmacs = XDMAC; |
---|
154 | pXdmad->pollingMode = bPollingMode; |
---|
155 | pXdmad->numControllers = XDMAC_CONTROLLER_NUM; |
---|
156 | pXdmad->numChannels = (XDMAC_GTYPE_NB_CH(XDMAC_GetType(XDMAC)) + 1); |
---|
157 | |
---|
158 | for (j = 0; j < pXdmad->numChannels; j ++) { |
---|
159 | pXdmad->XdmaChannels[j].fCallback = 0; |
---|
160 | pXdmad->XdmaChannels[j].pArg = 0; |
---|
161 | pXdmad->XdmaChannels[j].bIrqOwner = 0; |
---|
162 | pXdmad->XdmaChannels[j].bSrcPeriphID = 0; |
---|
163 | pXdmad->XdmaChannels[j].bDstPeriphID = 0; |
---|
164 | pXdmad->XdmaChannels[j].bSrcTxIfID = 0; |
---|
165 | pXdmad->XdmaChannels[j].bSrcRxIfID = 0; |
---|
166 | pXdmad->XdmaChannels[j].bDstTxIfID = 0; |
---|
167 | pXdmad->XdmaChannels[j].bDstRxIfID = 0; |
---|
168 | pXdmad->XdmaChannels[j].state = XDMAD_STATE_FREE; |
---|
169 | } |
---|
170 | |
---|
171 | xDmad_Initialized = 1; |
---|
172 | ReleaseMutex(pXdmad->xdmaMutex); |
---|
173 | } |
---|
174 | |
---|
175 | |
---|
176 | /** |
---|
177 | * \brief Allocate a XDMA channel for upper layer. |
---|
178 | * \param pXdmad Pointer to xDMA driver instance. |
---|
179 | * \param bSrcID Source peripheral ID, 0xFF for memory. |
---|
180 | * \param bDstID Destination peripheral ID, 0xFF for memory. |
---|
181 | * \return Channel number if allocation successful, return |
---|
182 | * XDMAD_ALLOC_FAILED if allocation failed. |
---|
183 | */ |
---|
184 | uint32_t XDMAD_AllocateChannel(sXdmad *pXdmad, |
---|
185 | uint8_t bSrcID, |
---|
186 | uint8_t bDstID) |
---|
187 | { |
---|
188 | uint32_t dwChannel = XDMAD_ALLOC_FAILED; |
---|
189 | uint32_t volatile timer = 0x7FF; |
---|
190 | |
---|
191 | LockMutex(pXdmad->xdmaMutex, timer); |
---|
192 | dwChannel = XDMAD_AllocateXdmacChannel(pXdmad, bSrcID, bDstID); |
---|
193 | ReleaseMutex(pXdmad->xdmaMutex); |
---|
194 | |
---|
195 | return dwChannel; |
---|
196 | } |
---|
197 | |
---|
198 | /** |
---|
199 | * \brief Free the specified xDMA channel. |
---|
200 | * \param pXdmad Pointer to xDMA driver instance. |
---|
201 | * \param dwChannel ControllerNumber << 8 | ChannelNumber. |
---|
202 | */ |
---|
203 | eXdmadRC XDMAD_FreeChannel(sXdmad *pXdmad, |
---|
204 | uint32_t dwChannel) |
---|
205 | { |
---|
206 | uint8_t iChannel = (dwChannel) & 0xFF; |
---|
207 | assert(pXdmad != NULL); |
---|
208 | |
---|
209 | if (iChannel >= pXdmad->numChannels) return XDMAD_ERROR; |
---|
210 | |
---|
211 | switch (pXdmad->XdmaChannels[iChannel].state) { |
---|
212 | case XDMAD_STATE_ALLOCATED: |
---|
213 | case XDMAD_STATE_START: |
---|
214 | case XDMAD_STATE_IN_XFR: |
---|
215 | return XDMAD_BUSY; |
---|
216 | |
---|
217 | case XDMAD_STATE_DONE: |
---|
218 | case XDMAD_STATE_HALTED: |
---|
219 | pXdmad->XdmaChannels[iChannel].state = XDMAD_STATE_FREE; |
---|
220 | break; |
---|
221 | } |
---|
222 | |
---|
223 | return XDMAD_OK; |
---|
224 | } |
---|
225 | |
---|
226 | /** |
---|
227 | * \brief Set the callback function for xDMA channel transfer. |
---|
228 | * \param pXdmad Pointer to xDMA driver instance. |
---|
229 | * \param dwChannel ControllerNumber << 8 | ChannelNumber. |
---|
230 | * \param fCallback Pointer to callback function. |
---|
231 | * \param pArg Pointer to optional argument for callback. |
---|
232 | */ |
---|
233 | eXdmadRC XDMAD_SetCallback(sXdmad *pXdmad, |
---|
234 | uint32_t dwChannel, |
---|
235 | XdmadTransferCallback fCallback, |
---|
236 | void *pArg) |
---|
237 | { |
---|
238 | |
---|
239 | uint8_t iChannel = (dwChannel) & 0xFF; |
---|
240 | assert(pXdmad != NULL); |
---|
241 | |
---|
242 | if (iChannel >= pXdmad->numChannels) return XDMAD_ERROR; |
---|
243 | |
---|
244 | if (pXdmad->XdmaChannels[iChannel].state == XDMAD_STATE_FREE) |
---|
245 | return XDMAD_ERROR; |
---|
246 | else if (pXdmad->XdmaChannels[iChannel].state == XDMAD_STATE_START) |
---|
247 | return XDMAD_BUSY; |
---|
248 | |
---|
249 | pXdmad->XdmaChannels[iChannel].fCallback = fCallback; |
---|
250 | pXdmad->XdmaChannels[iChannel].pArg = pArg; |
---|
251 | |
---|
252 | return XDMAD_OK; |
---|
253 | } |
---|
254 | |
---|
255 | |
---|
256 | /** |
---|
257 | * \brief Enable clock of the xDMA peripheral, Enable the dma peripheral, |
---|
258 | * configure configuration register for xDMA transfer. |
---|
259 | * \param pXdmad Pointer to xDMA driver instance. |
---|
260 | * \param dwChannel ControllerNumber << 8 | ChannelNumber. |
---|
261 | * \param dwCfg Configuration value. |
---|
262 | */ |
---|
263 | eXdmadRC XDMAD_PrepareChannel(sXdmad *pXdmad, uint32_t dwChannel) |
---|
264 | { |
---|
265 | |
---|
266 | uint8_t iChannel = (dwChannel) & 0xFF; |
---|
267 | Xdmac *pXdmac = pXdmad->pXdmacs; |
---|
268 | |
---|
269 | assert(pXdmad != NULL); |
---|
270 | |
---|
271 | if (iChannel >= pXdmad->numChannels) return XDMAD_ERROR; |
---|
272 | |
---|
273 | if (pXdmad->XdmaChannels[iChannel].state == XDMAD_STATE_FREE) |
---|
274 | return XDMAD_ERROR; |
---|
275 | else if ((pXdmad->XdmaChannels[iChannel].state == XDMAD_STATE_START) |
---|
276 | || (pXdmad->XdmaChannels[iChannel].state == XDMAD_STATE_IN_XFR)) |
---|
277 | return XDMAD_BUSY; |
---|
278 | |
---|
279 | |
---|
280 | /* Enable clock of the DMA peripheral */ |
---|
281 | if (!PMC_IsPeriphEnabled(ID_XDMAC)) |
---|
282 | PMC_EnablePeripheral(ID_XDMAC); |
---|
283 | |
---|
284 | /* Clear dummy status */ |
---|
285 | XDMAC_GetChannelIsr(pXdmac, iChannel); |
---|
286 | /* Disables XDMAC interrupt for the given channel. */ |
---|
287 | XDMAC_DisableGIt (pXdmac, iChannel); |
---|
288 | XDMAC_DisableChannelIt (pXdmac, iChannel, 0xFF); |
---|
289 | /* Disable the given dma channel. */ |
---|
290 | XDMAC_DisableChannel(pXdmac, iChannel); |
---|
291 | XDMAC_SetSourceAddr(pXdmac, iChannel, 0); |
---|
292 | XDMAC_SetDestinationAddr(pXdmac, iChannel, 0); |
---|
293 | XDMAC_SetBlockControl(pXdmac, iChannel, 0); |
---|
294 | XDMAC_SetChannelConfig(pXdmac, iChannel, 0x20); |
---|
295 | XDMAC_SetDescriptorAddr(pXdmac, iChannel, 0, 0); |
---|
296 | XDMAC_SetDescriptorControl(pXdmac, iChannel, 0); |
---|
297 | return XDMAD_OK; |
---|
298 | } |
---|
299 | |
---|
300 | /** |
---|
301 | * \brief xDMA interrupt handler |
---|
302 | * \param pxDmad Pointer to DMA driver instance. |
---|
303 | */ |
---|
304 | void XDMAD_Handler(sXdmad *pDmad) |
---|
305 | { |
---|
306 | Xdmac *pXdmac; |
---|
307 | sXdmadChannel *pCh; |
---|
308 | uint32_t xdmaChannelIntStatus, xdmaGlobaIntStatus, xdmaGlobalChStatus; |
---|
309 | uint8_t bExec = 0; |
---|
310 | uint8_t _iChannel; |
---|
311 | assert(pDmad != NULL); |
---|
312 | |
---|
313 | pXdmac = pDmad->pXdmacs; |
---|
314 | xdmaGlobaIntStatus = XDMAC_GetGIsr(pXdmac); |
---|
315 | |
---|
316 | if ((xdmaGlobaIntStatus & 0xFFFFFF) != 0) { |
---|
317 | xdmaGlobalChStatus = XDMAC_GetGlobalChStatus(pXdmac); |
---|
318 | |
---|
319 | for (_iChannel = 0; _iChannel < pDmad->numChannels; _iChannel ++) { |
---|
320 | if (!(xdmaGlobaIntStatus & (1 << _iChannel))) continue; |
---|
321 | |
---|
322 | pCh = &pDmad->XdmaChannels[_iChannel]; |
---|
323 | |
---|
324 | if (pCh->state == XDMAD_STATE_FREE) return; |
---|
325 | |
---|
326 | if ((xdmaGlobalChStatus & (XDMAC_GS_ST0 << _iChannel)) == 0) { |
---|
327 | bExec = 0; |
---|
328 | xdmaChannelIntStatus = XDMAC_GetMaskChannelIsr(pXdmac, _iChannel); |
---|
329 | |
---|
330 | if (xdmaChannelIntStatus & XDMAC_CIS_BIS) { |
---|
331 | if ((XDMAC_GetChannelItMask(pXdmac, _iChannel) & XDMAC_CIM_LIM) |
---|
332 | == 0) { |
---|
333 | pCh->state = XDMAD_STATE_DONE; |
---|
334 | bExec = 1; |
---|
335 | } |
---|
336 | |
---|
337 | TRACE_DEBUG("XDMAC_CIS_BIS\n\r"); |
---|
338 | } |
---|
339 | |
---|
340 | if (xdmaChannelIntStatus & XDMAC_CIS_FIS) |
---|
341 | TRACE_DEBUG("XDMAC_CIS_FIS\n\r"); |
---|
342 | |
---|
343 | if (xdmaChannelIntStatus & XDMAC_CIS_RBEIS) |
---|
344 | TRACE_DEBUG("XDMAC_CIS_RBEIS\n\r"); |
---|
345 | |
---|
346 | if (xdmaChannelIntStatus & XDMAC_CIS_WBEIS) |
---|
347 | TRACE_DEBUG("XDMAC_CIS_WBEIS\n\r"); |
---|
348 | |
---|
349 | if (xdmaChannelIntStatus & XDMAC_CIS_ROIS) |
---|
350 | TRACE_DEBUG("XDMAC_CIS_ROIS\n\r"); |
---|
351 | |
---|
352 | if (xdmaChannelIntStatus & XDMAC_CIS_LIS) { |
---|
353 | TRACE_DEBUG("XDMAC_CIS_LIS\n\r"); |
---|
354 | pCh->state = XDMAD_STATE_DONE; |
---|
355 | bExec = 1; |
---|
356 | } |
---|
357 | |
---|
358 | if (xdmaChannelIntStatus & XDMAC_CIS_DIS) { |
---|
359 | pCh->state = XDMAD_STATE_DONE; |
---|
360 | bExec = 1; |
---|
361 | } |
---|
362 | |
---|
363 | } else { |
---|
364 | /* Block end interrupt for LLI dma mode */ |
---|
365 | if (XDMAC_GetChannelIsr(pXdmac, _iChannel) & XDMAC_CIS_BIS) { |
---|
366 | /* Execute callback */ |
---|
367 | pCh->fCallback(_iChannel, pCh->pArg); |
---|
368 | } |
---|
369 | } |
---|
370 | |
---|
371 | /* Execute callback */ |
---|
372 | if (bExec && pCh->fCallback) |
---|
373 | pCh->fCallback(_iChannel, pCh->pArg); |
---|
374 | } |
---|
375 | } |
---|
376 | } |
---|
377 | |
---|
378 | /** |
---|
379 | * \brief Check if DMA transfer is finished. |
---|
380 | * In polling mode XDMAD_Handler() is polled. |
---|
381 | * \param pDmad Pointer to DMA driver instance. |
---|
382 | * \param dwChannel ControllerNumber << 8 | ChannelNumber. |
---|
383 | */ |
---|
384 | eXdmadRC XDMAD_IsTransferDone(sXdmad *pXdmad, uint32_t dwChannel) |
---|
385 | { |
---|
386 | uint8_t iChannel = (dwChannel) & 0xFF; |
---|
387 | uint8_t state; |
---|
388 | assert(pXdmad != NULL); |
---|
389 | |
---|
390 | if (iChannel >= pXdmad->numChannels) |
---|
391 | return XDMAD_ERROR; |
---|
392 | |
---|
393 | state = pXdmad->XdmaChannels[iChannel].state; |
---|
394 | |
---|
395 | if (state == XDMAD_STATE_ALLOCATED) return XDMAD_OK; |
---|
396 | |
---|
397 | if (state == XDMAD_STATE_FREE) return XDMAD_ERROR; |
---|
398 | else if (state != XDMAD_STATE_DONE) { |
---|
399 | if (pXdmad->pollingMode) XDMAD_Handler(pXdmad); |
---|
400 | |
---|
401 | return XDMAD_BUSY; |
---|
402 | } |
---|
403 | |
---|
404 | return XDMAD_OK; |
---|
405 | } |
---|
406 | |
---|
407 | |
---|
408 | /** |
---|
409 | * \brief Configure DMA for a single transfer. |
---|
410 | * \param pXdmad Pointer to xDMA driver instance. |
---|
411 | * \param dwChannel ControllerNumber << 8 | ChannelNumber. |
---|
412 | */ |
---|
413 | eXdmadRC XDMAD_ConfigureTransfer(sXdmad *pXdmad, |
---|
414 | uint32_t dwChannel, |
---|
415 | sXdmadCfg *pXdmaParam, |
---|
416 | uint32_t dwXdmaDescCfg, |
---|
417 | uint32_t dwXdmaDescAddr, |
---|
418 | uint32_t dwXdmaIntEn) |
---|
419 | { |
---|
420 | uint8_t iChannel = (dwChannel) & 0xFF; |
---|
421 | |
---|
422 | assert(pXdmad != NULL); |
---|
423 | |
---|
424 | if (iChannel >= pXdmad->numChannels) |
---|
425 | return XDMAD_ERROR; |
---|
426 | |
---|
427 | Xdmac *pXdmac = pXdmad->pXdmacs; |
---|
428 | XDMAC_GetChannelIsr(pXdmac, iChannel); |
---|
429 | |
---|
430 | if (pXdmad->XdmaChannels[iChannel].state == XDMAD_STATE_FREE) |
---|
431 | return XDMAD_ERROR; |
---|
432 | |
---|
433 | if (pXdmad->XdmaChannels[iChannel].state == XDMAD_STATE_START) |
---|
434 | return XDMAD_BUSY; |
---|
435 | |
---|
436 | /* Linked List is enabled */ |
---|
437 | if ((dwXdmaDescCfg & XDMAC_CNDC_NDE) == XDMAC_CNDC_NDE_DSCR_FETCH_EN) { |
---|
438 | if ((dwXdmaDescCfg & XDMAC_CNDC_NDVIEW_Msk) == XDMAC_CNDC_NDVIEW_NDV0) { |
---|
439 | XDMAC_SetChannelConfig(pXdmac, iChannel, pXdmaParam->mbr_cfg); |
---|
440 | XDMAC_SetSourceAddr(pXdmac, iChannel, pXdmaParam->mbr_sa); |
---|
441 | XDMAC_SetDestinationAddr(pXdmac, iChannel, pXdmaParam->mbr_da); |
---|
442 | } |
---|
443 | |
---|
444 | if ((dwXdmaDescCfg & XDMAC_CNDC_NDVIEW_Msk) == XDMAC_CNDC_NDVIEW_NDV1) |
---|
445 | XDMAC_SetChannelConfig(pXdmac, iChannel, pXdmaParam->mbr_cfg); |
---|
446 | |
---|
447 | XDMAC_SetDescriptorAddr(pXdmac, iChannel, dwXdmaDescAddr, 0); |
---|
448 | XDMAC_SetDescriptorControl(pXdmac, iChannel, dwXdmaDescCfg); |
---|
449 | XDMAC_DisableChannelIt (pXdmac, iChannel, 0xFF); |
---|
450 | XDMAC_EnableChannelIt (pXdmac, iChannel, dwXdmaIntEn); |
---|
451 | } else { |
---|
452 | /* LLI is disabled. */ |
---|
453 | XDMAC_SetSourceAddr(pXdmac, iChannel, pXdmaParam->mbr_sa); |
---|
454 | XDMAC_SetDestinationAddr(pXdmac, iChannel, pXdmaParam->mbr_da); |
---|
455 | XDMAC_SetMicroblockControl(pXdmac, iChannel, pXdmaParam->mbr_ubc); |
---|
456 | XDMAC_SetBlockControl(pXdmac, iChannel, pXdmaParam->mbr_bc); |
---|
457 | XDMAC_SetDataStride_MemPattern(pXdmac, iChannel, pXdmaParam->mbr_ds); |
---|
458 | XDMAC_SetSourceMicroBlockStride(pXdmac, iChannel, pXdmaParam->mbr_sus); |
---|
459 | XDMAC_SetDestinationMicroBlockStride(pXdmac, iChannel, pXdmaParam->mbr_dus); |
---|
460 | XDMAC_SetChannelConfig(pXdmac, iChannel, pXdmaParam->mbr_cfg); |
---|
461 | XDMAC_SetDescriptorAddr(pXdmac, iChannel, 0, 0); |
---|
462 | XDMAC_SetDescriptorControl(pXdmac, iChannel, 0); |
---|
463 | XDMAC_EnableChannelIt (pXdmac, iChannel, dwXdmaIntEn); |
---|
464 | } |
---|
465 | |
---|
466 | return XDMAD_OK; |
---|
467 | } |
---|
468 | |
---|
469 | /** |
---|
470 | * \brief Start xDMA transfer. |
---|
471 | * \param pXdmad Pointer to XDMA driver instance. |
---|
472 | * \param dwChannel ControllerNumber << 8 | ChannelNumber. |
---|
473 | */ |
---|
474 | eXdmadRC XDMAD_StartTransfer(sXdmad *pXdmad, uint32_t dwChannel) |
---|
475 | { |
---|
476 | uint8_t iChannel = (dwChannel) & 0xFF; |
---|
477 | |
---|
478 | assert(pXdmad != NULL); |
---|
479 | |
---|
480 | if (iChannel >= pXdmad->numChannels) return XDMAD_ERROR; |
---|
481 | |
---|
482 | Xdmac *pXdmac = pXdmad->pXdmacs; |
---|
483 | |
---|
484 | if (pXdmad->XdmaChannels[iChannel].state == XDMAD_STATE_FREE) { |
---|
485 | TRACE_ERROR("%s:: XDMAD_STATE_FREE \n\r", __FUNCTION__); |
---|
486 | return XDMAD_ERROR; |
---|
487 | } else if (pXdmad->XdmaChannels[iChannel].state == XDMAD_STATE_START) { |
---|
488 | TRACE_ERROR("%s:: XDMAD_STATE_START \n\r", __FUNCTION__) |
---|
489 | return XDMAD_BUSY; |
---|
490 | } |
---|
491 | |
---|
492 | /* Change state to transferring */ |
---|
493 | pXdmad->XdmaChannels[iChannel].state = XDMAD_STATE_START; |
---|
494 | XDMAC_EnableChannel(pXdmac, iChannel); |
---|
495 | |
---|
496 | if (pXdmad->pollingMode == 0) |
---|
497 | XDMAC_EnableGIt(pXdmac, iChannel); |
---|
498 | |
---|
499 | return XDMAD_OK; |
---|
500 | } |
---|
501 | |
---|
502 | |
---|
503 | /** |
---|
504 | * \brief Stop DMA transfer. |
---|
505 | * \param pDmad Pointer to DMA driver instance. |
---|
506 | * \param dwChannel ControllerNumber << 8 | ChannelNumber. |
---|
507 | */ |
---|
508 | eXdmadRC XDMAD_StopTransfer(sXdmad *pXdmad, uint32_t dwChannel) |
---|
509 | { |
---|
510 | uint8_t _iChannel = (dwChannel) & 0xFF; |
---|
511 | assert(pXdmad != NULL); |
---|
512 | |
---|
513 | if (_iChannel >= pXdmad->numChannels) return XDMAD_ERROR; |
---|
514 | |
---|
515 | Xdmac *pXdmac = pXdmad->pXdmacs; |
---|
516 | |
---|
517 | pXdmad->XdmaChannels[_iChannel].state = XDMAD_STATE_HALTED; |
---|
518 | /* Disable channel */ |
---|
519 | XDMAC_DisableChannel(pXdmac, _iChannel); |
---|
520 | /* Disable interrupts */ |
---|
521 | XDMAC_DisableChannelIt(pXdmac, _iChannel, 0xFF); |
---|
522 | /* Clear pending status */ |
---|
523 | XDMAC_GetChannelIsr(pXdmac, _iChannel); |
---|
524 | XDMAC_GetGlobalChStatus(pXdmac); |
---|
525 | return XDMAD_OK; |
---|
526 | } |
---|
527 | |
---|
528 | /**@}*/ |
---|
529 | |
---|