1 | /* ---------------------------------------------------------------------------- */ |
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2 | /* Atmel Microcontroller Software Support */ |
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3 | /* SAM Software Package License */ |
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4 | /* ---------------------------------------------------------------------------- */ |
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5 | /* Copyright (c) 2015, Atmel Corporation */ |
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6 | /* */ |
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7 | /* All rights reserved. */ |
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8 | /* */ |
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9 | /* Redistribution and use in source and binary forms, with or without */ |
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10 | /* modification, are permitted provided that the following condition is met: */ |
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11 | /* */ |
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12 | /* - Redistributions of source code must retain the above copyright notice, */ |
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13 | /* this list of conditions and the disclaimer below. */ |
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14 | /* */ |
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15 | /* Atmel's name may not be used to endorse or promote products derived from */ |
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16 | /* this software without specific prior written permission. */ |
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17 | /* */ |
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18 | /* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */ |
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19 | /* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */ |
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20 | /* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */ |
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21 | /* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */ |
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22 | /* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */ |
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23 | /* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */ |
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24 | /* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ |
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25 | /* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ |
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26 | /* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ |
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27 | /* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ |
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28 | /* ---------------------------------------------------------------------------- */ |
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29 | |
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30 | /** \addtogroup dmad_module |
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31 | * |
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32 | * \section DmaHw Dma Hardware Interface Usage |
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33 | * <ul> |
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34 | * <li> The DMA controller can handle the transfer between peripherals and memory |
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35 | * and so receives the triggers from the peripherals. The hardware interface |
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36 | * number are getting from DMAIF_Get_ChannelNumber().</li> |
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37 | |
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38 | * <li> DMAIF_IsValidatedPeripherOnDma() helps to check if the given DMAC has |
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39 | * associated peripheral identifier coded by the given peripheral.</li> |
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40 | * |
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41 | * </ul> |
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42 | */ |
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43 | /*@{*/ |
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44 | /*@}*/ |
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45 | |
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46 | /** \file */ |
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47 | /*---------------------------------------------------------------------------- |
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48 | * Headers |
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49 | *----------------------------------------------------------------------------*/ |
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50 | #include "chip.h" |
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51 | |
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52 | /*---------------------------------------------------------------------------- |
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53 | * Local variables |
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54 | *----------------------------------------------------------------------------*/ |
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55 | /** Array of DMA Channel definition for SAMv7 chip*/ |
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56 | static const XdmaHardwareInterface xdmaHwIf[] = { |
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57 | /* xdmac, peripheral, T/R, HW interface number*/ |
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58 | {0, ID_HSMCI, 0, 0}, |
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59 | {0, ID_HSMCI, 1, 0}, |
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60 | {0, ID_SPI0, 0, 1}, |
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61 | {0, ID_SPI0, 1, 2}, |
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62 | {0, ID_SPI1, 0, 3}, |
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63 | {0, ID_SPI1, 1, 4}, |
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64 | {0, ID_QSPI, 0, 5}, |
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65 | {0, ID_QSPI, 1, 6}, |
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66 | {0, ID_USART0, 0, 7}, |
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67 | {0, ID_USART0, 1, 8}, |
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68 | {0, ID_USART1, 0, 9}, |
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69 | {0, ID_USART1, 1, 10}, |
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70 | {0, ID_USART2, 0, 11}, |
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71 | {0, ID_USART2, 1, 12}, |
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72 | {0, ID_PWM0, 0, 13}, |
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73 | {0, ID_TWIHS0, 0, 14}, |
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74 | {0, ID_TWIHS0, 1, 15}, |
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75 | {0, ID_TWIHS1, 0, 16}, |
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76 | {0, ID_TWIHS1, 1, 17}, |
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77 | {0, ID_TWIHS2, 0, 18}, |
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78 | {0, ID_TWIHS2, 1, 19}, |
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79 | {0, ID_UART0, 0, 20}, |
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80 | {0, ID_UART0, 1, 21}, |
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81 | {0, ID_UART1, 0, 22}, |
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82 | {0, ID_UART1, 1, 23}, |
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83 | {0, ID_UART2, 0, 24}, |
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84 | {0, ID_UART2, 1, 25}, |
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85 | {0, ID_UART3, 0, 26}, |
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86 | {0, ID_UART3, 1, 27}, |
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87 | {0, ID_UART4, 0, 28}, |
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88 | {0, ID_UART4, 1, 29}, |
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89 | {0, ID_DACC, 0, 30}, |
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90 | {0, ID_DACC, 0, 31}, |
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91 | {0, ID_SSC, 0, 32}, |
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92 | {0, ID_SSC, 1, 33}, |
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93 | {0, ID_PIOA, 1, 34}, |
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94 | {0, ID_AFEC0, 1, 35}, |
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95 | {0, ID_AFEC1, 1, 36}, |
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96 | {0, ID_AES, 0, 37}, |
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97 | {0, ID_AES, 1, 38}, |
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98 | {0, ID_PWM1, 0, 39}, |
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99 | {0, ID_TC0, 1, 40}, |
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100 | {0, ID_TC1, 1, 41}, |
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101 | {0, ID_TC2, 1, 42}, |
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102 | {0, ID_TC3, 1, 43}, |
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103 | }; |
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104 | |
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105 | |
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106 | /*---------------------------------------------------------------------------- |
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107 | * Exported functions |
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108 | *----------------------------------------------------------------------------*/ |
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109 | |
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110 | /** |
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111 | * \brief Get peripheral identifier coded for hardware handshaking interface |
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112 | * |
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113 | * \param bDmac DMA Controller number. |
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114 | * \param bPeriphID Peripheral ID. |
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115 | * \param bTransfer Transfer type 0: Tx, 1 :Rx. |
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116 | * \return 0-15 peripheral identifier coded. |
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117 | * 0xff : no associated peripheral identifier coded. |
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118 | */ |
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119 | uint8_t XDMAIF_Get_ChannelNumber (uint8_t bPeriphID, |
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120 | uint8_t bTransfer) |
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121 | { |
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122 | uint8_t i; |
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123 | uint8_t NumOfPeripheral = ((XDMAC_GetType(XDMAC) & 0x00FF0000) >> 16); |
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124 | |
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125 | for (i = 0; i <= NumOfPeripheral; i++) { |
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126 | if ((xdmaHwIf[i].bPeriphID == bPeriphID) && |
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127 | (xdmaHwIf[i].bTransfer == bTransfer)) |
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128 | return xdmaHwIf[i].bIfID; |
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129 | } |
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130 | |
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131 | return 0xff; |
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132 | } |
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133 | |
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134 | /** |
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135 | * \brief Check if the given DMAC has associated peripheral identifier coded by |
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136 | * the given peripheral. |
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137 | * |
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138 | * \param bDmac DMA Controller number. |
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139 | * \param bPeriphID Peripheral ID (0xff : memory only). |
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140 | * \return 1: Is a validated peripheral. 0: no associated peripheral identifier |
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141 | * coded. |
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142 | */ |
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143 | uint8_t XDMAIF_IsValidatedPeripherOnDma(uint8_t bPeriphID) |
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144 | { |
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145 | uint8_t i; |
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146 | uint8_t NumOfPeripheral = ((XDMAC_GetType(XDMAC) & 0x00FF0000) >> 16); |
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147 | |
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148 | /* It is always validated when transfer to memory */ |
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149 | if (bPeriphID == 0xFF) |
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150 | return 1; |
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151 | |
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152 | for (i = 0; i <= NumOfPeripheral; i++) { |
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153 | if ((xdmaHwIf[i].bPeriphID == bPeriphID)) |
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154 | return 1; |
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155 | } |
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156 | |
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157 | return 0; |
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158 | } |
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