1 | /* ---------------------------------------------------------------------------- */ |
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2 | /* Atmel Microcontroller Software Support */ |
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3 | /* SAM Software Package License */ |
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4 | /* ---------------------------------------------------------------------------- */ |
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5 | /* Copyright (c) 2015, Atmel Corporation */ |
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6 | /* */ |
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7 | /* All rights reserved. */ |
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8 | /* */ |
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9 | /* Redistribution and use in source and binary forms, with or without */ |
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10 | /* modification, are permitted provided that the following condition is met: */ |
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11 | /* */ |
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12 | /* - Redistributions of source code must retain the above copyright notice, */ |
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13 | /* this list of conditions and the disclaimer below. */ |
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14 | /* */ |
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15 | /* Atmel's name may not be used to endorse or promote products derived from */ |
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16 | /* this software without specific prior written permission. */ |
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17 | /* */ |
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18 | /* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */ |
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19 | /* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */ |
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20 | /* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */ |
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21 | /* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */ |
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22 | /* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */ |
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23 | /* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */ |
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24 | /* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ |
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25 | /* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ |
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26 | /* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ |
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27 | /* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ |
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28 | /* ---------------------------------------------------------------------------- */ |
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29 | |
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30 | /* |
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31 | * \file |
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32 | */ |
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33 | |
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34 | /*---------------------------------------------------------------------------- |
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35 | * Headers |
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36 | *----------------------------------------------------------------------------*/ |
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37 | |
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38 | #include "chip.h" |
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39 | |
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40 | #include <rtems/irq-extension.h> |
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41 | #include <rtems/sysinit.h> |
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42 | #include <bsp/fatal.h> |
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43 | |
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44 | /*---------------------------------------------------------------------------- |
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45 | * Local definitions |
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46 | *----------------------------------------------------------------------------*/ |
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47 | |
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48 | /* Maximum number of interrupt sources that can be defined. This |
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49 | * constant can be increased, but the current value is the smallest possible |
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50 | * that will be compatible with all existing projects. */ |
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51 | #define MAX_INTERRUPT_SOURCES 7 |
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52 | |
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53 | /*---------------------------------------------------------------------------- |
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54 | * Local types |
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55 | *----------------------------------------------------------------------------*/ |
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56 | |
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57 | /** |
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58 | * Describes a PIO interrupt source, including the PIO instance triggering the |
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59 | * interrupt and the associated interrupt handler. |
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60 | */ |
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61 | typedef struct _InterruptSource { |
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62 | /* Pointer to the source pin instance. */ |
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63 | const Pin *pPin; |
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64 | |
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65 | /* Interrupt handler. */ |
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66 | void (*handler)(const Pin *, void *arg); |
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67 | |
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68 | void *arg; |
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69 | } InterruptSource; |
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70 | |
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71 | /*---------------------------------------------------------------------------- |
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72 | * Local variables |
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73 | *----------------------------------------------------------------------------*/ |
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74 | |
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75 | /* List of interrupt sources. */ |
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76 | static InterruptSource _aIntSources[MAX_INTERRUPT_SOURCES]; |
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77 | |
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78 | /* Number of currently defined interrupt sources. */ |
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79 | static uint32_t _dwNumSources = 0; |
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80 | |
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81 | /*---------------------------------------------------------------------------- |
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82 | * Local Functions |
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83 | *----------------------------------------------------------------------------*/ |
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84 | |
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85 | /** |
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86 | * \brief Handles all interrupts on the given PIO controller. |
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87 | * \param id PIO controller ID. |
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88 | * \param pPio PIO controller base address. |
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89 | */ |
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90 | static void PIO_Interrupt(Pio *pPio, uint32_t id) |
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91 | { |
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92 | uint32_t status; |
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93 | size_t i; |
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94 | |
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95 | status = pPio->PIO_ISR; |
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96 | status &= pPio->PIO_IMR; |
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97 | |
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98 | for (i = 0; status != 0 && i < MAX_INTERRUPT_SOURCES; ++i) { |
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99 | const InterruptSource *is = &_aIntSources[i]; |
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100 | const Pin *pin = is->pPin;; |
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101 | |
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102 | if (pin->id == id) { |
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103 | uint32_t mask = pin->mask; |
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104 | |
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105 | if ((status & mask) != 0) { |
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106 | status &= ~mask; |
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107 | (*is->handler)(pin, is->arg); |
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108 | } |
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109 | } |
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110 | } |
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111 | } |
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112 | |
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113 | /*---------------------------------------------------------------------------- |
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114 | * Global Functions |
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115 | *----------------------------------------------------------------------------*/ |
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116 | |
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117 | /** |
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118 | * \brief Parallel IO Controller A interrupt handler |
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119 | * \Redefined PIOA interrupt handler for NVIC interrupt table. |
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120 | */ |
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121 | static void PIOA_Interrupt(void *arg) |
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122 | { |
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123 | PIO_Interrupt(arg, ID_PIOA); |
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124 | } |
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125 | |
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126 | /** |
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127 | * \brief Parallel IO Controller B interrupt handler |
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128 | * \Redefined PIOB interrupt handler for NVIC interrupt table. |
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129 | */ |
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130 | static void PIOB_Interrupt(void *arg) |
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131 | { |
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132 | PIO_Interrupt(arg, ID_PIOB); |
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133 | } |
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134 | |
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135 | /** |
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136 | * \brief Parallel IO Controller C interrupt handler |
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137 | * \Redefined PIOC interrupt handler for NVIC interrupt table. |
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138 | */ |
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139 | static void PIOC_Interrupt(void *arg) |
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140 | { |
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141 | PIO_Interrupt(arg, ID_PIOC); |
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142 | } |
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143 | |
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144 | |
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145 | /** |
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146 | * \brief Parallel IO Controller D interrupt handler |
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147 | * \Redefined PIOD interrupt handler for NVIC interrupt table. |
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148 | */ |
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149 | static void PIOD_Interrupt(void *arg) |
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150 | { |
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151 | PIO_Interrupt(arg, ID_PIOD); |
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152 | } |
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153 | |
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154 | /** |
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155 | * \brief Parallel IO Controller E interrupt handler |
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156 | * \Redefined PIOE interrupt handler for NVIC interrupt table. |
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157 | */ |
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158 | static void PIOE_Interrupt(void *arg) |
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159 | { |
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160 | PIO_Interrupt(arg, ID_PIOE); |
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161 | } |
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162 | |
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163 | static void PIO_SysInitializeInterrupts(void) |
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164 | { |
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165 | rtems_status_code sc; |
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166 | |
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167 | TRACE_DEBUG("PIO_Initialize()\n\r"); |
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168 | |
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169 | /* Configure PIO interrupt sources */ |
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170 | TRACE_DEBUG("PIO_Initialize: Configuring PIOA\n\r"); |
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171 | PMC_EnablePeripheral(ID_PIOA); |
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172 | PIOA->PIO_ISR; |
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173 | PIOA->PIO_IDR = 0xFFFFFFFF; |
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174 | sc = rtems_interrupt_handler_install( |
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175 | PIOA_IRQn, |
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176 | "PIO A", |
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177 | RTEMS_INTERRUPT_UNIQUE, |
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178 | PIOA_Interrupt, |
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179 | PIOA |
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180 | ); |
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181 | if (sc != RTEMS_SUCCESSFUL) { |
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182 | bsp_fatal(ATSAM_FATAL_PIO_IRQ_A); |
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183 | } |
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184 | |
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185 | TRACE_DEBUG("PIO_Initialize: Configuring PIOB\n\r"); |
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186 | PMC_EnablePeripheral(ID_PIOB); |
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187 | PIOB->PIO_ISR; |
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188 | PIOB->PIO_IDR = 0xFFFFFFFF; |
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189 | sc = rtems_interrupt_handler_install( |
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190 | PIOB_IRQn, |
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191 | "PIO B", |
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192 | RTEMS_INTERRUPT_UNIQUE, |
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193 | PIOB_Interrupt, |
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194 | PIOB |
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195 | ); |
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196 | if (sc != RTEMS_SUCCESSFUL) { |
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197 | bsp_fatal(ATSAM_FATAL_PIO_IRQ_B); |
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198 | } |
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199 | |
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200 | TRACE_DEBUG("PIO_Initialize: Configuring PIOC\n\r"); |
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201 | PMC_EnablePeripheral(ID_PIOC); |
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202 | PIOC->PIO_ISR; |
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203 | PIOC->PIO_IDR = 0xFFFFFFFF; |
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204 | sc = rtems_interrupt_handler_install( |
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205 | PIOC_IRQn, |
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206 | "PIO C", |
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207 | RTEMS_INTERRUPT_UNIQUE, |
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208 | PIOC_Interrupt, |
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209 | PIOC |
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210 | ); |
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211 | if (sc != RTEMS_SUCCESSFUL) { |
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212 | bsp_fatal(ATSAM_FATAL_PIO_IRQ_C); |
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213 | } |
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214 | |
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215 | TRACE_DEBUG("PIO_Initialize: Configuring PIOD\n\r"); |
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216 | PMC_EnablePeripheral(ID_PIOD); |
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217 | PIOD->PIO_ISR; |
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218 | PIOD->PIO_IDR = 0xFFFFFFFF; |
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219 | sc = rtems_interrupt_handler_install( |
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220 | PIOD_IRQn, |
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221 | "PIO D", |
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222 | RTEMS_INTERRUPT_UNIQUE, |
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223 | PIOD_Interrupt, |
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224 | PIOD |
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225 | ); |
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226 | if (sc != RTEMS_SUCCESSFUL) { |
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227 | bsp_fatal(ATSAM_FATAL_PIO_IRQ_D); |
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228 | } |
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229 | |
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230 | TRACE_DEBUG("PIO_Initialize: Configuring PIOE\n\r"); |
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231 | PMC_EnablePeripheral(ID_PIOE); |
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232 | PIOE->PIO_ISR; |
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233 | PIOE->PIO_IDR = 0xFFFFFFFF; |
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234 | sc = rtems_interrupt_handler_install( |
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235 | PIOE_IRQn, |
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236 | "PIO E", |
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237 | RTEMS_INTERRUPT_UNIQUE, |
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238 | PIOE_Interrupt, |
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239 | PIOE |
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240 | ); |
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241 | if (sc != RTEMS_SUCCESSFUL) { |
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242 | bsp_fatal(ATSAM_FATAL_PIO_IRQ_E); |
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243 | } |
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244 | } |
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245 | |
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246 | RTEMS_SYSINIT_ITEM(PIO_SysInitializeInterrupts, RTEMS_SYSINIT_BSP_START, |
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247 | RTEMS_SYSINIT_ORDER_LAST); |
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248 | |
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249 | /** |
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250 | * Configures a PIO or a group of PIO to generate an interrupt on status |
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251 | * change. The provided interrupt handler will be called with the triggering |
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252 | * pin as its parameter (enabling different pin instances to share the same |
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253 | * handler). |
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254 | * \param pPin Pointer to a Pin instance. |
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255 | * \param handler Interrupt handler function pointer. |
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256 | */ |
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257 | void PIO_ConfigureIt(const Pin *pPin, void (*handler)(const Pin *, void *arg), |
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258 | void *arg) |
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259 | { |
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260 | InterruptSource *pSource; |
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261 | rtems_interrupt_level level; |
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262 | |
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263 | TRACE_DEBUG("PIO_ConfigureIt()\n\r"); |
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264 | |
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265 | rtems_interrupt_disable(level); |
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266 | |
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267 | if (_dwNumSources == MAX_INTERRUPT_SOURCES) { |
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268 | bsp_fatal(ATSAM_FATAL_PIO_CONFIGURE_IT); |
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269 | } |
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270 | |
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271 | pSource = &(_aIntSources[_dwNumSources]); |
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272 | pSource->pPin = pPin; |
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273 | pSource->handler = handler; |
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274 | _dwNumSources++; |
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275 | |
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276 | rtems_interrupt_enable(level); |
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277 | |
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278 | /* Define new source */ |
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279 | TRACE_DEBUG("PIO_ConfigureIt: Defining new source #%d.\n\r", _dwNumSources); |
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280 | } |
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