1 | /* ---------------------------------------------------------------------------- */ |
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2 | /* Atmel Microcontroller Software Support */ |
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3 | /* SAM Software Package License */ |
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4 | /* ---------------------------------------------------------------------------- */ |
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5 | /* Copyright (c) 2015, Atmel Corporation */ |
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6 | /* */ |
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7 | /* All rights reserved. */ |
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8 | /* */ |
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9 | /* Redistribution and use in source and binary forms, with or without */ |
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10 | /* modification, are permitted provided that the following condition is met: */ |
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11 | /* */ |
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12 | /* - Redistributions of source code must retain the above copyright notice, */ |
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13 | /* this list of conditions and the disclaimer below. */ |
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14 | /* */ |
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15 | /* Atmel's name may not be used to endorse or promote products derived from */ |
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16 | /* this software without specific prior written permission. */ |
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17 | /* */ |
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18 | /* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */ |
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19 | /* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */ |
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20 | /* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */ |
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21 | /* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */ |
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22 | /* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */ |
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23 | /* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */ |
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24 | /* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ |
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25 | /* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ |
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26 | /* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ |
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27 | /* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ |
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28 | /* ---------------------------------------------------------------------------- */ |
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29 | |
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30 | /** \file */ |
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31 | |
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32 | /*---------------------------------------------------------------------------- |
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33 | * Headers |
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34 | *----------------------------------------------------------------------------*/ |
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35 | #include "chip.h" |
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36 | |
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37 | /*---------------------------------------------------------------------------- |
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38 | * Local functions |
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39 | *----------------------------------------------------------------------------*/ |
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40 | |
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41 | /** |
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42 | * \brief Configures one or more pin(s) of a PIO controller as being controlled by |
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43 | * peripheral A. Optionally, the corresponding internal pull-up(s) can be enabled. |
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44 | * |
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45 | * \param pio Pointer to a PIO controller. |
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46 | * \param mask Bitmask of one or more pin(s) to configure. |
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47 | * \param enablePullUp Indicates if the pin(s) internal pull-up shall be |
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48 | * configured. |
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49 | */ |
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50 | static void PIO_SetPeripheralA( |
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51 | Pio *pio, |
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52 | unsigned int mask, |
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53 | unsigned char enablePullUp) |
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54 | { |
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55 | unsigned int abcdsr; |
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56 | /* Disable interrupts on the pin(s) */ |
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57 | pio->PIO_IDR = mask; |
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58 | |
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59 | /* Enable the pull-up(s) if necessary */ |
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60 | if (enablePullUp) |
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61 | pio->PIO_PUER = mask; |
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62 | else |
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63 | pio->PIO_PUDR = mask; |
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64 | |
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65 | abcdsr = pio->PIO_ABCDSR[0]; |
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66 | pio->PIO_ABCDSR[0] &= (~mask & abcdsr); |
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67 | abcdsr = pio->PIO_ABCDSR[1]; |
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68 | pio->PIO_ABCDSR[1] &= (~mask & abcdsr); |
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69 | pio->PIO_PDR = mask; |
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70 | } |
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71 | |
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72 | /** |
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73 | * \brief Configures one or more pin(s) of a PIO controller as being controlled |
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74 | * by peripheral B. Optionally, the corresponding internal pull-up(s) can be |
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75 | * enabled. |
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76 | * |
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77 | * \param pio Pointer to a PIO controller. |
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78 | * \param mask Bitmask of one or more pin(s) to configure. |
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79 | * \param enablePullUp Indicates if the pin(s) internal pull-up shall be |
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80 | * configured. |
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81 | */ |
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82 | static void PIO_SetPeripheralB( |
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83 | Pio *pio, |
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84 | unsigned int mask, |
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85 | unsigned char enablePullUp) |
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86 | { |
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87 | unsigned int abcdsr; |
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88 | /* Disable interrupts on the pin(s) */ |
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89 | pio->PIO_IDR = mask; |
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90 | |
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91 | /* Enable the pull-up(s) if necessary */ |
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92 | if (enablePullUp) |
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93 | pio->PIO_PUER = mask; |
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94 | else |
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95 | pio->PIO_PUDR = mask; |
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96 | |
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97 | abcdsr = pio->PIO_ABCDSR[0]; |
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98 | pio->PIO_ABCDSR[0] = (mask | abcdsr); |
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99 | abcdsr = pio->PIO_ABCDSR[1]; |
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100 | pio->PIO_ABCDSR[1] &= (~mask & abcdsr); |
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101 | |
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102 | pio->PIO_PDR = mask; |
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103 | } |
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104 | |
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105 | /** |
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106 | * \brief Configures one or more pin(s) of a PIO controller as being controlled |
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107 | * by peripheral C. Optionally, the corresponding internal pull-up(s) can be |
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108 | * enabled. |
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109 | * |
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110 | * \param pio Pointer to a PIO controller. |
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111 | * \param mask Bitmask of one or more pin(s) to configure. |
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112 | * \param enablePullUp Indicates if the pin(s) internal pull-up shall be |
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113 | * configured. |
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114 | */ |
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115 | static void PIO_SetPeripheralC( |
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116 | Pio *pio, |
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117 | unsigned int mask, |
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118 | unsigned char enablePullUp) |
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119 | { |
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120 | unsigned int abcdsr; |
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121 | /* Disable interrupts on the pin(s) */ |
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122 | pio->PIO_IDR = mask; |
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123 | |
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124 | /* Enable the pull-up(s) if necessary */ |
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125 | if (enablePullUp) |
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126 | pio->PIO_PUER = mask; |
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127 | else |
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128 | pio->PIO_PUDR = mask; |
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129 | |
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130 | abcdsr = pio->PIO_ABCDSR[0]; |
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131 | pio->PIO_ABCDSR[0] &= (~mask & abcdsr); |
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132 | abcdsr = pio->PIO_ABCDSR[1]; |
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133 | pio->PIO_ABCDSR[1] = (mask | abcdsr); |
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134 | |
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135 | pio->PIO_PDR = mask; |
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136 | } |
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137 | |
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138 | /** |
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139 | * \brief Configures one or more pin(s) of a PIO controller as being controlled |
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140 | * by peripheral D. Optionally, the corresponding internal pull-up(s) can be |
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141 | * enabled. |
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142 | * |
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143 | * \param pio Pointer to a PIO controller. |
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144 | * \param mask Bitmask of one or more pin(s) to configure. |
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145 | * \param enablePullUp Indicates if the pin(s) internal pull-up shall be |
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146 | * configured. |
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147 | */ |
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148 | static void PIO_SetPeripheralD( |
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149 | Pio *pio, |
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150 | unsigned int mask, |
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151 | unsigned char enablePullUp) |
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152 | { |
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153 | unsigned int abcdsr; |
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154 | /* Disable interrupts on the pin(s) */ |
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155 | pio->PIO_IDR = mask; |
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156 | |
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157 | /* Enable the pull-up(s) if necessary */ |
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158 | if (enablePullUp) |
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159 | pio->PIO_PUER = mask; |
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160 | else |
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161 | pio->PIO_PUDR = mask; |
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162 | |
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163 | abcdsr = pio->PIO_ABCDSR[0]; |
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164 | pio->PIO_ABCDSR[0] = (mask | abcdsr); |
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165 | abcdsr = pio->PIO_ABCDSR[1]; |
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166 | pio->PIO_ABCDSR[1] = (mask | abcdsr); |
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167 | |
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168 | pio->PIO_PDR = mask; |
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169 | } |
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170 | |
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171 | /** |
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172 | * \brief Configures one or more pin(s) or a PIO controller as inputs. Optionally, |
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173 | * the corresponding internal pull-up(s) and glitch filter(s) can be enabled. |
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174 | * |
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175 | * \param pio Pointer to a PIO controller. |
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176 | * \param mask Bitmask indicating which pin(s) to configure as input(s). |
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177 | * \param enablePullUp Indicates if the internal pull-up(s) must be enabled. |
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178 | * \param enableFilter Indicates if the glitch filter(s) must be enabled. |
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179 | */ |
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180 | static void PIO_SetInput( |
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181 | Pio *pio, |
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182 | unsigned int mask, |
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183 | unsigned char attribute) |
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184 | { |
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185 | /* Disable interrupts */ |
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186 | pio->PIO_IDR = mask; |
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187 | |
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188 | /* Enable pull-up(s) if necessary */ |
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189 | if (attribute & PIO_PULLUP) |
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190 | pio->PIO_PUER = mask; |
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191 | else |
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192 | pio->PIO_PUDR = mask; |
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193 | |
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194 | /* Enable Input Filter if necessary */ |
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195 | if (attribute & (PIO_DEGLITCH | PIO_DEBOUNCE)) |
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196 | pio->PIO_IFER = mask; |
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197 | else |
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198 | pio->PIO_IFDR = mask; |
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199 | |
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200 | /* Enable de-glitch or de-bounce if necessary */ |
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201 | if (attribute & PIO_DEGLITCH) |
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202 | pio->PIO_IFSCDR = mask; |
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203 | else { |
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204 | if (attribute & PIO_DEBOUNCE) |
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205 | pio->PIO_IFSCER = mask; |
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206 | } |
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207 | |
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208 | /* Configure additional interrupt mode registers */ |
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209 | if (attribute & PIO_IT_AIME) { |
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210 | // enable additional interrupt mode |
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211 | pio->PIO_AIMER = mask; |
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212 | |
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213 | // if bit field of selected pin is 1, set as Rising Edge/High level detection event |
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214 | if (attribute & PIO_IT_RE_OR_HL) |
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215 | pio->PIO_REHLSR = mask; |
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216 | else |
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217 | pio->PIO_FELLSR = mask; |
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218 | |
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219 | /* if bit field of selected pin is 1, set as edge detection source */ |
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220 | if (attribute & PIO_IT_EDGE) |
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221 | pio->PIO_ESR = mask; |
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222 | else |
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223 | pio->PIO_LSR = mask; |
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224 | } else { |
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225 | /* disable additional interrupt mode */ |
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226 | pio->PIO_AIMDR = mask; |
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227 | } |
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228 | |
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229 | /* Configure pin as input */ |
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230 | pio->PIO_ODR = mask; |
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231 | pio->PIO_PER = mask; |
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232 | } |
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233 | |
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234 | /** |
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235 | * \brief Configures one or more pin(s) of a PIO controller as outputs, with the |
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236 | * given default value. Optionally, the multi-drive feature can be enabled |
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237 | * on the pin(s). |
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238 | * |
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239 | * \param pio Pointer to a PIO controller. |
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240 | * \param mask Bitmask indicating which pin(s) to configure. |
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241 | * \param defaultValue Default level on the pin(s). |
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242 | * \param enableMultiDrive Indicates if the pin(s) shall be configured as |
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243 | * open-drain. |
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244 | * \param enablePullUp Indicates if the pin shall have its pull-up activated. |
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245 | */ |
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246 | static void PIO_SetOutput( |
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247 | Pio *pio, |
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248 | unsigned int mask, |
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249 | unsigned char defaultValue, |
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250 | unsigned char enableMultiDrive, |
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251 | unsigned char enablePullUp) |
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252 | { |
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253 | /* Disable interrupts */ |
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254 | pio->PIO_IDR = mask; |
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255 | |
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256 | /* Enable pull-up(s) if necessary */ |
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257 | if (enablePullUp) |
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258 | pio->PIO_PUER = mask; |
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259 | else |
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260 | pio->PIO_PUDR = mask; |
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261 | |
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262 | /* Enable multi-drive if necessary */ |
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263 | if (enableMultiDrive) |
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264 | pio->PIO_MDER = mask; |
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265 | else |
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266 | pio->PIO_MDDR = mask; |
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267 | |
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268 | /* Set default value */ |
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269 | if (defaultValue) |
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270 | pio->PIO_SODR = mask; |
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271 | else |
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272 | pio->PIO_CODR = mask; |
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273 | |
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274 | /* Configure pin(s) as output(s) */ |
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275 | pio->PIO_OER = mask; |
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276 | pio->PIO_PER = mask; |
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277 | } |
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278 | |
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279 | /*---------------------------------------------------------------------------- |
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280 | * Global functions |
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281 | *----------------------------------------------------------------------------*/ |
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282 | |
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283 | /** |
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284 | * \brief Configures a list of Pin instances, each of which can either hold a |
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285 | * single pin or a group of pins, depending on the mask value; all pins are |
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286 | * configured by this function. The size of the array must also be provided and |
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287 | * is easily computed using PIO_LISTSIZE whenever its length is not known in |
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288 | * advance. |
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289 | * |
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290 | * \param list Pointer to a list of Pin instances. |
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291 | * \param size Size of the Pin list (calculated using PIO_LISTSIZE). |
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292 | * |
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293 | * \return 1 if the pins have been configured properly; otherwise 0. |
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294 | */ |
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295 | uint8_t PIO_Configure(const Pin *list, uint32_t size) |
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296 | { |
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297 | /* Configure pins */ |
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298 | while (size > 0) { |
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299 | switch (list->type) { |
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300 | case PIO_PERIPH_A: |
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301 | PIO_SetPeripheralA(list->pio, |
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302 | list->mask, |
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303 | (list->attribute & PIO_PULLUP) ? 1 : 0); |
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304 | break; |
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305 | |
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306 | case PIO_PERIPH_B: |
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307 | PIO_SetPeripheralB(list->pio, |
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308 | list->mask, |
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309 | (list->attribute & PIO_PULLUP) ? 1 : 0); |
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310 | break; |
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311 | |
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312 | case PIO_PERIPH_C: |
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313 | PIO_SetPeripheralC(list->pio, |
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314 | list->mask, |
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315 | (list->attribute & PIO_PULLUP) ? 1 : 0); |
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316 | break; |
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317 | |
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318 | case PIO_PERIPH_D: |
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319 | PIO_SetPeripheralD(list->pio, |
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320 | list->mask, |
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321 | (list->attribute & PIO_PULLUP) ? 1 : 0); |
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322 | break; |
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323 | |
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324 | case PIO_INPUT: |
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325 | #ifndef __FPGA |
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326 | PMC_EnablePeripheral(list->id); |
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327 | #endif |
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328 | PIO_SetInput(list->pio, |
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329 | list->mask, |
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330 | list->attribute); |
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331 | break; |
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332 | |
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333 | case PIO_OUTPUT_0: |
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334 | case PIO_OUTPUT_1: |
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335 | PIO_SetOutput(list->pio, |
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336 | list->mask, |
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337 | (list->type == PIO_OUTPUT_1), |
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338 | (list->attribute & PIO_OPENDRAIN) ? 1 : 0, |
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339 | (list->attribute & PIO_PULLUP) ? 1 : 0); |
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340 | break; |
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341 | |
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342 | default: return 0; |
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343 | } |
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344 | |
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345 | list++; |
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346 | size--; |
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347 | } |
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348 | |
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349 | return 1; |
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350 | } |
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351 | |
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352 | /** |
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353 | * \brief Sets a high output level on all the PIOs defined in the given Pin |
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354 | * instance. |
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355 | * This has no immediate effects on PIOs that are not output, but the PIO |
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356 | * controller will memorize the value they are changed to outputs. |
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357 | * |
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358 | * \param pin Pointer to a Pin instance describing one or more pins. |
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359 | */ |
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360 | void PIO_Set(const Pin *pin) |
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361 | { |
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362 | pin->pio->PIO_SODR = pin->mask; |
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363 | } |
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364 | |
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365 | /** |
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366 | * \brief Sets a low output level on all the PIOs defined in the given Pin |
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367 | * instance. |
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368 | * This has no immediate effects on PIOs that are not output, but the PIO |
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369 | * controller will memorize the value they are changed to outputs. |
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370 | * |
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371 | * \param pin Pointer to a Pin instance describing one or more pins. |
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372 | */ |
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373 | void PIO_Clear(const Pin *pin) |
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374 | { |
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375 | pin->pio->PIO_CODR = pin->mask; |
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376 | } |
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377 | |
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378 | /** |
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379 | * \brief Returns 1 if one or more PIO of the given Pin instance currently have |
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380 | * a high level; otherwise returns 0. This method returns the actual value that |
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381 | * is being read on the pin. To return the supposed output value of a pin, use |
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382 | * PIO_GetOutputDataStatus() instead. |
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383 | * |
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384 | * \param pin Pointer to a Pin instance describing one or more pins. |
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385 | * |
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386 | * \return 1 if the Pin instance contains at least one PIO that currently has |
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387 | * a high level; otherwise 0. |
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388 | */ |
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389 | unsigned char PIO_Get(const Pin *pin) |
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390 | { |
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391 | unsigned int reg; |
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392 | |
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393 | if ((pin->type == PIO_OUTPUT_0) || (pin->type == PIO_OUTPUT_1)) |
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394 | reg = pin->pio->PIO_ODSR; |
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395 | else |
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396 | reg = pin->pio->PIO_PDSR; |
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397 | |
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398 | if ((reg & pin->mask) == 0) |
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399 | return 0; |
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400 | else |
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401 | return 1; |
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402 | } |
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403 | |
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404 | /** |
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405 | * \brief Returns 1 if one or more PIO of the given Pin are configured to output |
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406 | * a high level (even if they are not output). |
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407 | * To get the actual value of the pin, use PIO_Get() instead. |
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408 | * |
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409 | * \param pin Pointer to a Pin instance describing one or more pins. |
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410 | * |
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411 | * \return 1 if the Pin instance contains at least one PIO that is configured |
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412 | * to output a high level; otherwise 0. |
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413 | */ |
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414 | unsigned char PIO_GetOutputDataStatus(const Pin *pin) |
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415 | { |
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416 | if ((pin->pio->PIO_ODSR & pin->mask) == 0) |
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417 | return 0; |
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418 | else |
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419 | return 1; |
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420 | } |
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421 | |
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422 | /** |
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423 | * \brief Configures Glitch or Denouncing filter for input. |
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424 | * |
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425 | * \param pin Pointer to a Pin instance describing one or more pins. |
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426 | * \param cuttoff Cut off frequency for denounce filter. |
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427 | */ |
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428 | void PIO_SetDebounceFilter(const Pin *pin, uint32_t cuttoff) |
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429 | { |
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430 | Pio *pio = pin->pio; |
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431 | |
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432 | pio->PIO_IFSCER = pin->mask; /* set Denouncing, 0 bit field no effect */ |
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433 | pio->PIO_SCDR = ((32678 / (2 * (cuttoff))) - 1) & 0x3FFF; |
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434 | /* the lowest 14 bits work */ |
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435 | } |
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436 | |
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437 | /** |
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438 | * \brief Enable write protect. |
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439 | * |
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440 | * \param pin Pointer to a Pin instance describing one or more pins. |
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441 | */ |
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442 | void PIO_EnableWriteProtect(const Pin *pin) |
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443 | { |
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444 | Pio *pio = pin->pio; |
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445 | |
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446 | pio->PIO_WPMR = (PIO_WPMR_WPKEY_VALID | PIO_WPMR_WPEN_EN); |
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447 | } |
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448 | |
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449 | /** |
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450 | * \brief Disable write protect. |
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451 | * |
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452 | * \param pin Pointer to a Pin instance describing one or more pins. |
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453 | */ |
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454 | |
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455 | void PIO_DisableWriteProtect(const Pin *pin) |
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456 | { |
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457 | Pio *pio = pin->pio; |
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458 | |
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459 | pio->PIO_WPMR = (PIO_WPMR_WPKEY_VALID | PIO_WPMR_WPEN_DIS); |
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460 | } |
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461 | |
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462 | /** |
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463 | * \brief Get write protect violation information. |
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464 | * |
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465 | * \param pin Pointer to a Pin instance describing one or more pins. |
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466 | */ |
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467 | uint32_t PIO_GetWriteProtectViolationInfo(const Pin *pin) |
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468 | { |
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469 | Pio *pio = pin->pio; |
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470 | return (pio->PIO_WPSR); |
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471 | } |
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472 | |
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473 | /** |
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474 | * \brief Set pin type |
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475 | * the pin is controlled by the corresponding peripheral (A, B, C, D,E) |
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476 | * \param pin Pointer to a Pin instance describing one or more pins. |
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477 | * \param pinType PIO_PERIPH_A, PIO_PERIPH_B, ... |
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478 | */ |
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479 | void PIO_SetPinType(Pin *pin, uint8_t pinType) |
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480 | { |
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481 | pin->type = pinType; |
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482 | } |
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483 | |
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