source: rtems/c/src/lib/libbsp/arm/atsam/libraries/libboard/include/gmii.h @ e1eeb883

5
Last change on this file since e1eeb883 was e1eeb883, checked in by Sebastian Huber <sebastian.huber@…>, on 01/12/16 at 14:34:31

bsp/atsam: Import SAM Software Package

Import selected files of the "SAM V71 / V70 / E70 / S70 Software
Package" obtained from the "SAMV71-XULT GNU Software Package 1.5".

Converted files via dos2unix before import.

Update #2529.
  • Property mode set to 100644
File size: 6.9 KB
Line 
1/* ---------------------------------------------------------------------------- */
2/*                  Atmel Microcontroller Software Support                      */
3/*                       SAM Software Package License                           */
4/* ---------------------------------------------------------------------------- */
5/* Copyright (c) 2015, Atmel Corporation                                        */
6/*                                                                              */
7/* All rights reserved.                                                         */
8/*                                                                              */
9/* Redistribution and use in source and binary forms, with or without           */
10/* modification, are permitted provided that the following condition is met:    */
11/*                                                                              */
12/* - Redistributions of source code must retain the above copyright notice,     */
13/* this list of conditions and the disclaimer below.                            */
14/*                                                                              */
15/* Atmel's name may not be used to endorse or promote products derived from     */
16/* this software without specific prior written permission.                     */
17/*                                                                              */
18/* DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR   */
19/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
20/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE   */
21/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,      */
22/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
23/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,  */
24/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF    */
25/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING         */
26/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
27/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.                           */
28/* ---------------------------------------------------------------------------- */
29
30#ifndef _GMII_DEFINE_H
31#define _GMII_DEFINE_H
32
33
34/*---------------------------------------------------------------------------
35 *         Definitions
36 *---------------------------------------------------------------------------*/
37
38//IEEE defined Registers
39#define GMII_BMCR        0x0   // Basic Mode Control Register
40#define GMII_BMSR        0x1   // Basic Mode Status Register
41#define GMII_PHYID1R     0x2   // PHY Identifier Register 1
42#define GMII_PHYID2R     0x3   // PHY Identifier Register 2
43#define GMII_ANAR        0x4   // Auto_Negotiation Advertisement Register
44#define GMII_ANLPAR      0x5   // Auto_negotiation Link Partner Ability Register
45#define GMII_ANER        0x6   // Auto-negotiation Expansion Register
46#define GMII_ANNPR       0x7   // Auto-negotiation Next Page Register
47#define GMII_ANLPNPAR    0x8   // Auto_negotiation Link Partner Next Page Ability Register
48#define GMII_AFEC0R      0x11  // AFE Control 0 Register
49#define GMII_AFEC3R      0x14  // AFE Control 3 Register
50#define GMII_RXERCR      0x15  // RXER Counter Register
51#define GMII_OMSSR       0x17  // Operation Mode Strap Status Register
52#define GMII_ECR         0x18  // Expanded Control Register
53#define GMII_ICSR        0x1B  // Interrupt Control/Status Register
54#define GMII_FC          0x1C  // Function Control
55#define GMII_LCSR        0x1D  // LinkMD® Control/Status Register
56#define GMII_PC1R        0x1E  // PHY Control 1 Register
57#define GMII_PC2R        0x1F  // PHY Control 2 Register
58
59// PHY ID Identifier Register
60#define GMII_LSB_MASK           0x0U
61// definitions: MII_PHYID1
62#define GMII_OUI_MSB            0x0022
63// definitions: MII_PHYID2
64#define GMII_OUI_LSB            0x1572          // KSZ8061 PHY Id2
65
66// Basic Mode Control Register (BMCR)
67// Bit definitions: MII_BMCR
68#define GMII_RESET             (1 << 15) // 1= Software Reset; 0=Normal Operation
69#define GMII_LOOPBACK          (1 << 14) // 1=loopback Enabled; 0=Normal Operation
70#define GMII_SPEED_SELECT_LSB  (1 << 13) // 1,0=1000Mbps 0,1=100Mbps; 0,0=10Mbps
71#define GMII_AUTONEG           (1 << 12) // Auto-negotiation Enable
72#define GMII_POWER_DOWN        (1 << 11) // 1=Power down 0=Normal operation
73#define GMII_ISOLATE           (1 << 10) // 1 = Isolates 0 = Normal operation
74#define GMII_RESTART_AUTONEG   (1 << 9)  // 1 = Restart auto-negotiation 0 = Normal operation
75#define GMII_DUPLEX_MODE       (1 << 8)  // 1 = Full duplex operation 0 = Normal operation
76//      Reserved                7        // Read as 0, ignore on write
77#define GMII_SPEED_SELECT_MSB  (1 << 6)  //
78//      Reserved                5 to 0   // Read as 0, ignore on write
79
80
81// Basic Mode Status Register (BMSR)
82// Bit definitions: MII_BMSR
83#define GMII_100BASE_T4        (1 << 15) // 100BASE-T4 Capable
84#define GMII_100BASE_TX_FD     (1 << 14) // 100BASE-TX Full Duplex Capable
85#define GMII_100BASE_T4_HD     (1 << 13) // 100BASE-TX Half Duplex Capable
86#define GMII_10BASE_T_FD       (1 << 12) // 10BASE-T Full Duplex Capable
87#define GMII_10BASE_T_HD       (1 << 11) // 10BASE-T Half Duplex Capable
88//      Reserved                10 to 9  // Read as 0, ignore on write
89#define GMII_EXTEND_STATUS     (1 << 8)  // 1 = Extend Status Information In Reg 15
90//      Reserved                7
91#define GMII_MF_PREAMB_SUPPR   (1 << 6)  // MII Frame Preamble Suppression
92#define GMII_AUTONEG_COMP      (1 << 5)  // Auto-negotiation Complete
93#define GMII_REMOTE_FAULT      (1 << 4)  // Remote Fault
94#define GMII_AUTONEG_ABILITY   (1 << 3)  // Auto Configuration Ability
95#define GMII_LINK_STATUS       (1 << 2)  // Link Status
96#define GMII_JABBER_DETECT     (1 << 1)  // Jabber Detect
97#define GMII_EXTEND_CAPAB      (1 << 0)  // Extended Capability
98
99// Auto-negotiation Advertisement Register (ANAR)
100// Auto-negotiation Link Partner Ability Register (ANLPAR)
101// Bit definitions: MII_ANAR, MII_ANLPAR
102#define GMII_NP               (1 << 15) // Next page Indication
103//      Reserved               7
104#define GMII_RF               (1 << 13) // Remote Fault
105//      Reserved               12       // Write as 0, ignore on read
106#define GMII_PAUSE_MASK       (3 << 11) // 0,0 = No Pause 1,0 = Asymmetric Pause(link partner)
107                                                                                // 0,1 = Symmetric Pause 1,1 = Symmetric&Asymmetric Pause(local device)
108#define GMII_T4               (1 << 9)  // 100BASE-T4 Support
109#define GMII_TX_FDX           (1 << 8)  // 100BASE-TX Full Duplex Support
110#define GMII_TX_HDX           (1 << 7)  // 100BASE-TX Support
111#define GMII_10_FDX           (1 << 6)  // 10BASE-T Full Duplex Support
112#define GMII_10_HDX           (1 << 5)  // 10BASE-T Support
113//      Selector                 4 to 0   // Protocol Selection Bits
114#define GMII_AN_IEEE_802_3      0x00001
115
116#endif // #ifndef _MII_DEFINE_H
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