source: rtems/c/src/lib/libbsp/arm/atsam/configure.ac @ 2e2a41e

5
Last change on this file since 2e2a41e was 2e2a41e, checked in by Christian Mauderer <Christian.Mauderer@…>, on 07/28/17 at 09:11:54

bsp/atsam: Add timing for RAM mt48lc16m16a2p-6a.

  • Property mode set to 100644
File size: 6.0 KB
Line 
1AC_PREREQ([2.69])
2AC_INIT([rtems-c-src-lib-libbsp-arm-atsam],[_RTEMS_VERSION],[https://devel.rtems.org/newticket])
3AC_CONFIG_SRCDIR([bsp_specs])
4RTEMS_TOP(../../../../../..)
5
6RTEMS_CANONICAL_TARGET_CPU
7AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.12.2])
8RTEMS_BSP_CONFIGURE
9
10RTEMS_PROG_CC_FOR_TARGET
11RTEMS_CANONICALIZE_TOOLS
12RTEMS_PROG_CCAS
13
14RTEMS_CHECK_NETWORKING
15AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes")
16
17RTEMS_BSP_CLEANUP_OPTIONS(0, 1)
18AC_ARG_ENABLE(
19[chip],
20[AS_HELP_STRING([--enable-chip],[select a chip variant (default samv71q21)])],
21[case "${enableval}" in
22  same70j19) AC_DEFINE([__SAME70J19__],[1],[chip variant]) INTFLASH=0x00080000 ; INTSRAM=0x00040000 ;;
23  same70j20) AC_DEFINE([__SAME70J20__],[1],[chip variant]) INTFLASH=0x00100000 ; INTSRAM=0x00060000 ;;
24  same70j21) AC_DEFINE([__SAME70J21__],[1],[chip variant]) INTFLASH=0x00200000 ; INTSRAM=0x00060000 ;;
25  same70n19) AC_DEFINE([__SAME70N19__],[1],[chip variant]) INTFLASH=0x00080000 ; INTSRAM=0x00040000 ;;
26  same70n20) AC_DEFINE([__SAME70N20__],[1],[chip variant]) INTFLASH=0x00100000 ; INTSRAM=0x00060000 ;;
27  same70n21) AC_DEFINE([__SAME70N21__],[1],[chip variant]) INTFLASH=0x00200000 ; INTSRAM=0x00060000 ;;
28  same70q19) AC_DEFINE([__SAME70Q19__],[1],[chip variant]) INTFLASH=0x00080000 ; INTSRAM=0x00040000 ;;
29  same70q20) AC_DEFINE([__SAME70Q20__],[1],[chip variant]) INTFLASH=0x00100000 ; INTSRAM=0x00060000 ;;
30  same70q21) AC_DEFINE([__SAME70Q21__],[1],[chip variant]) INTFLASH=0x00200000 ; INTSRAM=0x00060000 ;;
31  sams70j19) AC_DEFINE([__SAMS70J19__],[1],[chip variant]) INTFLASH=0x00080000 ; INTSRAM=0x00040000 ;;
32  sams70j20) AC_DEFINE([__SAMS70J20__],[1],[chip variant]) INTFLASH=0x00100000 ; INTSRAM=0x00060000 ;;
33  sams70j21) AC_DEFINE([__SAMS70J21__],[1],[chip variant]) INTFLASH=0x00200000 ; INTSRAM=0x00060000 ;;
34  sams70n19) AC_DEFINE([__SAMS70N19__],[1],[chip variant]) INTFLASH=0x00080000 ; INTSRAM=0x00040000 ;;
35  sams70n20) AC_DEFINE([__SAMS70N20__],[1],[chip variant]) INTFLASH=0x00100000 ; INTSRAM=0x00060000 ;;
36  sams70n21) AC_DEFINE([__SAMS70N21__],[1],[chip variant]) INTFLASH=0x00200000 ; INTSRAM=0x00060000 ;;
37  sams70q19) AC_DEFINE([__SAMS70Q19__],[1],[chip variant]) INTFLASH=0x00080000 ; INTSRAM=0x00040000 ;;
38  sams70q20) AC_DEFINE([__SAMS70Q20__],[1],[chip variant]) INTFLASH=0x00100000 ; INTSRAM=0x00060000 ;;
39  sams70q21) AC_DEFINE([__SAMS70Q21__],[1],[chip variant]) INTFLASH=0x00200000 ; INTSRAM=0x00060000 ;;
40  samv71j19) AC_DEFINE([__SAMV71J19__],[1],[chip variant]) INTFLASH=0x00080000 ; INTSRAM=0x00040000 ;;
41  samv71j20) AC_DEFINE([__SAMV71J20__],[1],[chip variant]) INTFLASH=0x00100000 ; INTSRAM=0x00060000 ;;
42  samv71j21) AC_DEFINE([__SAMV71J21__],[1],[chip variant]) INTFLASH=0x00200000 ; INTSRAM=0x00060000 ;;
43  samv71n19) AC_DEFINE([__SAMV71N19__],[1],[chip variant]) INTFLASH=0x00080000 ; INTSRAM=0x00040000 ;;
44  samv71n20) AC_DEFINE([__SAMV71N20__],[1],[chip variant]) INTFLASH=0x00100000 ; INTSRAM=0x00060000 ;;
45  samv71n21) AC_DEFINE([__SAMV71N21__],[1],[chip variant]) INTFLASH=0x00200000 ; INTSRAM=0x00060000 ;;
46  samv71q19) AC_DEFINE([__SAMV71Q19__],[1],[chip variant]) INTFLASH=0x00080000 ; INTSRAM=0x00040000 ;;
47  samv71q20) AC_DEFINE([__SAMV71Q20__],[1],[chip variant]) INTFLASH=0x00100000 ; INTSRAM=0x00060000 ;;
48  samv71q21) AC_DEFINE([__SAMV71Q21__],[1],[chip variant]) INTFLASH=0x00200000 ; INTSRAM=0x00060000 ;;
49  *) AC_MSG_ERROR([bad value ${enableval} for chip variant]) ;;
50esac],
51[AC_DEFINE([__SAMV71Q21__],[1],[chip variant]) INTFLASH=0x00200000 ; INTSRAM=0x00060000])
52
53AC_ARG_ENABLE(
54[sdram],
55[AS_HELP_STRING([--enable-sdram],[select a SDRAM variant (default is42s16100e-7bli)])],
56[case "${enableval}" in
57  is42s16100e-7bli) AC_DEFINE([ATSAM_SDRAM_IS42S16100E_7BLI],[1],[SDRAM variant]) EXTSDRAM=0x00200000 ;;
58  is42s16320f-7bl) AC_DEFINE([ATSAM_SDRAM_IS42S16320F_7BL],[1],[SDRAM variant]) EXTSDRAM=0x04000000 ;;
59  mt48lc16m16a2p-6a) AC_DEFINE([ATSAM_SDRAM_MT48LC16M16A2P_6A],[1],[SDRAM variant]) EXTSDRAM=0x02000000 ;;
60  *) AC_MSG_ERROR([bad value ${enableval} for SDRAM variant]) ;;
61esac],
62[AC_DEFINE([ATSAM_SDRAM_IS42S16100E_7BLI],[1],[SDRAM variant]) EXTSDRAM=0x00200000])
63
64RTEMS_BSPOPTS_SET([BOARD_MAINOSC],[*],[12000000])
65RTEMS_BSPOPTS_HELP([BOARD_MAINOSC],[Main oscillator frequency in Hz (default 12MHz)])
66
67RTEMS_BSPOPTS_SET([ATSAM_MCK],[*],[123000000])
68RTEMS_BSPOPTS_HELP([ATSAM_MCK],
69[Frequency of the MCK in Hz. Set to 0 to force application defined speed.
70See startup/pmc-config.c for available clock configurations.])
71
72RTEMS_BSPOPTS_SET([ATSAM_CHANGE_CLOCK_FROM_SRAM],[*],[0])
73RTEMS_BSPOPTS_HELP([ATSAM_CHANGE_CLOCK_FROM_SRAM],
74[Move the functions that set up the clock into the SRAM.
75This allows to change the clock frequency even if the application is started from SDRAM.
76Requires a TCM_SIZE > 0.])
77
78RTEMS_BSPOPTS_SET([ATSAM_CONSOLE_BAUD],[*],[115200])
79RTEMS_BSPOPTS_HELP([ATSAM_CONSOLE_BAUD],[initial baud for console devices (default 115200)])
80
81RTEMS_BSPOPTS_SET([ATSAM_CONSOLE_DEVICE_TYPE],[*],[0])
82RTEMS_BSPOPTS_HELP([ATSAM_CONSOLE_DEVICE_TYPE],[device type for /dev/console, use 0 for USART and 1 for UART (default USART)])
83
84RTEMS_BSPOPTS_SET([ATSAM_CONSOLE_DEVICE_INDEX],[*],[1])
85RTEMS_BSPOPTS_HELP([ATSAM_CONSOLE_DEVICE_INDEX],[device index for /dev/console (default 1, e.g. USART1)])
86
87RTEMS_BSPOPTS_SET([ATSAM_CONSOLE_USE_INTERRUPTS],[*],[1])
88RTEMS_BSPOPTS_HELP([ATSAM_CONSOLE_USE_INTERRUPTS],[use interrupt driven mode for console devices (used by default)])
89
90AC_DEFUN([ATSAM_LINKCMD],[
91AC_ARG_VAR([$1],[$2])dnl
92[$1]=[$]{[$1]:-[$3]}
93])
94
95ATSAM_LINKCMD([ATSAM_MEMORY_TCM_SIZE],[size of tightly coupled memories (TCM) in bytes],[0x00000000])
96ATSAM_LINKCMD([ATSAM_MEMORY_INTFLASH_SIZE],[size of internal flash in bytes],[${INTFLASH}])
97ATSAM_LINKCMD([ATSAM_MEMORY_INTSRAM_SIZE],[size of internal SRAM in bytes],[${INTSRAM}])
98ATSAM_LINKCMD([ATSAM_MEMORY_SDRAM_SIZE],[size of external SDRAM in bytes],[${EXTSDRAM}])
99ATSAM_LINKCMD([ATSAM_MEMORY_QSPIFLASH_SIZE],[size of QSPI flash in bytes],[0x00200000])
100ATSAM_LINKCMD([ATSAM_MEMORY_NOCACHE_SIZE],[size of NOCACHE section in bytes],[0x00001000])
101
102AC_CONFIG_FILES([
103Makefile
104startup/linkcmds.memory
105])
106AC_OUTPUT
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