1 | AC_PREREQ([2.69]) |
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2 | AC_INIT([rtems-c-src-lib-libbsp-arm-atsam],[_RTEMS_VERSION],[https://devel.rtems.org/newticket]) |
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3 | AC_CONFIG_SRCDIR([bsp_specs]) |
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4 | RTEMS_TOP(../../../../../..) |
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5 | |
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6 | RTEMS_CANONICAL_TARGET_CPU |
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7 | AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.12.2]) |
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8 | RTEMS_BSP_CONFIGURE |
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9 | |
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10 | RTEMS_PROG_CC_FOR_TARGET |
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11 | RTEMS_CANONICALIZE_TOOLS |
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12 | RTEMS_PROG_CCAS |
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13 | |
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14 | RTEMS_CHECK_NETWORKING |
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15 | AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes") |
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16 | |
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17 | RTEMS_BSP_CLEANUP_OPTIONS(0, 1) |
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18 | AC_ARG_ENABLE( |
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19 | [chip], |
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20 | [AS_HELP_STRING([--enable-chip],[select a chip variant (default samv71q21)])], |
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21 | [case "${enableval}" in |
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22 | same70j19) AC_DEFINE([__SAME70J19__],[1],[chip variant]) INTFLASH=0x00080000 ; INTSRAM=0x00040000 ;; |
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23 | same70j20) AC_DEFINE([__SAME70J20__],[1],[chip variant]) INTFLASH=0x00100000 ; INTSRAM=0x00060000 ;; |
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24 | same70j21) AC_DEFINE([__SAME70J21__],[1],[chip variant]) INTFLASH=0x00200000 ; INTSRAM=0x00060000 ;; |
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25 | same70n19) AC_DEFINE([__SAME70N19__],[1],[chip variant]) INTFLASH=0x00080000 ; INTSRAM=0x00040000 ;; |
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26 | same70n20) AC_DEFINE([__SAME70N20__],[1],[chip variant]) INTFLASH=0x00100000 ; INTSRAM=0x00060000 ;; |
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27 | same70n21) AC_DEFINE([__SAME70N21__],[1],[chip variant]) INTFLASH=0x00200000 ; INTSRAM=0x00060000 ;; |
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28 | same70q19) AC_DEFINE([__SAME70Q19__],[1],[chip variant]) INTFLASH=0x00080000 ; INTSRAM=0x00040000 ;; |
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29 | same70q20) AC_DEFINE([__SAME70Q20__],[1],[chip variant]) INTFLASH=0x00100000 ; INTSRAM=0x00060000 ;; |
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30 | same70q21) AC_DEFINE([__SAME70Q21__],[1],[chip variant]) INTFLASH=0x00200000 ; INTSRAM=0x00060000 ;; |
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31 | sams70j19) AC_DEFINE([__SAMS70J19__],[1],[chip variant]) INTFLASH=0x00080000 ; INTSRAM=0x00040000 ;; |
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32 | sams70j20) AC_DEFINE([__SAMS70J20__],[1],[chip variant]) INTFLASH=0x00100000 ; INTSRAM=0x00060000 ;; |
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33 | sams70j21) AC_DEFINE([__SAMS70J21__],[1],[chip variant]) INTFLASH=0x00200000 ; INTSRAM=0x00060000 ;; |
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34 | sams70n19) AC_DEFINE([__SAMS70N19__],[1],[chip variant]) INTFLASH=0x00080000 ; INTSRAM=0x00040000 ;; |
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35 | sams70n20) AC_DEFINE([__SAMS70N20__],[1],[chip variant]) INTFLASH=0x00100000 ; INTSRAM=0x00060000 ;; |
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36 | sams70n21) AC_DEFINE([__SAMS70N21__],[1],[chip variant]) INTFLASH=0x00200000 ; INTSRAM=0x00060000 ;; |
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37 | sams70q19) AC_DEFINE([__SAMS70Q19__],[1],[chip variant]) INTFLASH=0x00080000 ; INTSRAM=0x00040000 ;; |
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38 | sams70q20) AC_DEFINE([__SAMS70Q20__],[1],[chip variant]) INTFLASH=0x00100000 ; INTSRAM=0x00060000 ;; |
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39 | sams70q21) AC_DEFINE([__SAMS70Q21__],[1],[chip variant]) INTFLASH=0x00200000 ; INTSRAM=0x00060000 ;; |
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40 | samv71j19) AC_DEFINE([__SAMV71J19__],[1],[chip variant]) INTFLASH=0x00080000 ; INTSRAM=0x00040000 ;; |
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41 | samv71j20) AC_DEFINE([__SAMV71J20__],[1],[chip variant]) INTFLASH=0x00100000 ; INTSRAM=0x00060000 ;; |
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42 | samv71j21) AC_DEFINE([__SAMV71J21__],[1],[chip variant]) INTFLASH=0x00200000 ; INTSRAM=0x00060000 ;; |
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43 | samv71n19) AC_DEFINE([__SAMV71N19__],[1],[chip variant]) INTFLASH=0x00080000 ; INTSRAM=0x00040000 ;; |
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44 | samv71n20) AC_DEFINE([__SAMV71N20__],[1],[chip variant]) INTFLASH=0x00100000 ; INTSRAM=0x00060000 ;; |
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45 | samv71n21) AC_DEFINE([__SAMV71N21__],[1],[chip variant]) INTFLASH=0x00200000 ; INTSRAM=0x00060000 ;; |
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46 | samv71q19) AC_DEFINE([__SAMV71Q19__],[1],[chip variant]) INTFLASH=0x00080000 ; INTSRAM=0x00040000 ;; |
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47 | samv71q20) AC_DEFINE([__SAMV71Q20__],[1],[chip variant]) INTFLASH=0x00100000 ; INTSRAM=0x00060000 ;; |
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48 | samv71q21) AC_DEFINE([__SAMV71Q21__],[1],[chip variant]) INTFLASH=0x00200000 ; INTSRAM=0x00060000 ;; |
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49 | *) AC_MSG_ERROR([bad value ${enableval} for chip variant]) ;; |
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50 | esac], |
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51 | [AC_DEFINE([__SAMV71Q21__],[1],[chip variant]) INTFLASH=0x00200000 ; INTSRAM=0x00060000]) |
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52 | |
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53 | RTEMS_BSPOPTS_SET([BOARD_MAINOSC],[*],[12000000]) |
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54 | RTEMS_BSPOPTS_HELP([BOARD_MAINOSC],[Main oscillator frequency in Hz (default 12MHz)]) |
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55 | |
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56 | RTEMS_BSPOPTS_SET([BOARD_MCK],[*],[123000000]) |
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57 | RTEMS_BSPOPTS_HELP([BOARD_MCK],[Master Clock (MCK) frequency in Hz (default 123MHz)]) |
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58 | |
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59 | RTEMS_BSPOPTS_SET([ATSAM_CONSOLE_BAUD],[*],[115200]) |
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60 | RTEMS_BSPOPTS_HELP([ATSAM_CONSOLE_BAUD],[initial baud for console devices (default 115200)]) |
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61 | |
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62 | RTEMS_BSPOPTS_SET([ATSAM_CONSOLE_DEVICE_TYPE],[*],[0]) |
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63 | RTEMS_BSPOPTS_HELP([ATSAM_CONSOLE_DEVICE_TYPE],[device type for /dev/console, use 0 for USART and 1 for UART (default USART)]) |
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64 | |
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65 | RTEMS_BSPOPTS_SET([ATSAM_CONSOLE_DEVICE_INDEX],[*],[1]) |
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66 | RTEMS_BSPOPTS_HELP([ATSAM_CONSOLE_DEVICE_INDEX],[device index for /dev/console (default 1, e.g. USART1)]) |
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67 | |
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68 | RTEMS_BSPOPTS_SET([ATSAM_CONSOLE_USE_INTERRUPTS],[*],[1]) |
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69 | RTEMS_BSPOPTS_HELP([ATSAM_CONSOLE_USE_INTERRUPTS],[use interrupt driven mode for console devices (used by default)]) |
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70 | |
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71 | AC_DEFUN([ATSAM_LINKCMD],[ |
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72 | AC_ARG_VAR([$1],[$2])dnl |
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73 | [$1]=[$]{[$1]:-[$3]} |
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74 | ]) |
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75 | |
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76 | ATSAM_LINKCMD([ATSAM_MEMORY_TCM_SIZE],[size of tightly coupled memories (TCM) in bytes],[0x00000000]) |
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77 | ATSAM_LINKCMD([ATSAM_MEMORY_INTFLASH_SIZE],[size of internal flash in bytes],[${INTFLASH}]) |
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78 | ATSAM_LINKCMD([ATSAM_MEMORY_INTSRAM_SIZE],[size of internal SRAM in bytes],[${INTSRAM}]) |
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79 | ATSAM_LINKCMD([ATSAM_MEMORY_SDRAM_SIZE],[size of external SDRAM in bytes],[0x00200000]) |
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80 | ATSAM_LINKCMD([ATSAM_MEMORY_QSPIFLASH_SIZE],[size of QSPI flash in bytes],[0x00200000]) |
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81 | |
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82 | AC_CONFIG_FILES([ |
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83 | Makefile |
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84 | startup/linkcmds.memory |
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85 | ]) |
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86 | AC_OUTPUT |
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