4.104.114.84.95
Last change
on this file since d0d73ec was
08330bf,
checked in by Joel Sherrill <joel.sherrill@…>, on 07/27/00 at 01:04:11
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Port of RTEMS to the ARM processor family by Eric Valette
<valette@…> and Emmanuel Raguet <raguet@…>
of Canon CRF - Communication Dept. This port includes a
basic BSP that is sufficient to link hello world.
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Property mode set to
100644
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File size:
911 bytes
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1 | /* |
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2 | * BSP registers declaration |
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3 | * |
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4 | * Copyright (c) 2000 Canon Research France SA. |
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5 | * Emmanuel Raguet, mailto:raguet@crf.canon.fr |
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6 | * |
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7 | * The license and distribution terms for this file may be |
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8 | * found in found in the file LICENSE in this distribution or at |
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9 | * http://www.OARcorp.com/rtems/license.html. |
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10 | * |
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11 | */ |
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12 | |
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13 | |
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14 | #ifndef __REGS_H__ |
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15 | #define __REGS_H__ |
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16 | |
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17 | /* |
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18 | * VARIABLE DECLARATION |
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19 | */ |
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20 | |
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21 | #ifndef __asm__ |
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22 | extern volatile unsigned long *Regs; /* Chip registers */ |
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23 | #endif |
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24 | |
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25 | |
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26 | |
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27 | /* |
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28 | * Here must be "defined" each register, to use with Regs as |
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29 | * LM_Regs[REGISTER1] = value |
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30 | */ |
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31 | |
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32 | #define REGISTER1 1 |
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33 | #define REGISTER2 2 |
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34 | |
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35 | |
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36 | /* |
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37 | * define for UART registers to be able |
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38 | * to compile and link arm_bare_bsp |
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39 | */ |
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40 | |
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41 | #define RSRBR 0 |
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42 | #define RSTHR 1 |
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43 | #define RSIER 2 |
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44 | #define RSIIR 3 |
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45 | #define RSFCR 4 |
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46 | #define RSLCR 5 |
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47 | #define RSLSR 6 |
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48 | #define RSDLL 7 |
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49 | #define RSDLH 8 |
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50 | #define RSCNT 9 |
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51 | |
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52 | #endif /*__REGS_H__*/ |
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53 | |
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