1 | /* |
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2 | * Copyright (c) 2013 embedded brains GmbH. All rights reserved. |
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3 | * |
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4 | * embedded brains GmbH |
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5 | * Dornierstr. 4 |
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6 | * 82178 Puchheim |
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7 | * Germany |
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8 | * <info@embedded-brains.de> |
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9 | * |
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10 | * The license and distribution terms for this file may be |
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11 | * found in the file LICENSE in this distribution or at |
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12 | * http://www.rtems.org/license/LICENSE. |
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13 | */ |
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14 | |
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15 | #include <assert.h> |
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16 | #include <stdint.h> |
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17 | #include <bsp.h> |
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18 | #include <bsp/bootcard.h> |
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19 | #include <bsp/irq-generic.h> |
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20 | #include <bsp/linker-symbols.h> |
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21 | #include <bsp/start.h> |
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22 | #include <bsp/nocache-heap.h> |
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23 | #include <rtems/config.h> |
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24 | #include "socal/alt_rstmgr.h" |
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25 | #include "socal/alt_sysmgr.h" |
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26 | #include "socal/hps.h" |
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27 | |
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28 | #ifndef MIN |
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29 | #define MIN( a, b ) ( ( a ) < ( b ) ? ( a ) : ( b ) ) |
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30 | #endif |
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31 | |
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32 | #define BSPSTART_MAX_CORES_PER_CONTROLLER 2 |
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33 | |
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34 | static void bsp_start_secondary_cores( void ) |
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35 | { |
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36 | #ifdef RTEMS_SMP |
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37 | volatile uint32_t *mpumodrst = ALT_RSTMGR_MPUMODRST_ADDR; |
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38 | uint32_t *cpu1_start_addr = ( |
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39 | ALT_SYSMGR_ROMCODE_ADDR + ALT_SYSMGR_ROMCODE_CPU1STARTADDR_OFST ); |
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40 | const uint32_t CORES = MIN( |
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41 | (uintptr_t) bsp_processor_count, |
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42 | rtems_configuration_get_maximum_processors() ); |
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43 | unsigned int index; |
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44 | |
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45 | |
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46 | /* Memory would get overwritten if a too small processor count |
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47 | * would be specified */ |
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48 | assert( |
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49 | (uintptr_t) bsp_processor_count >= BSPSTART_MAX_CORES_PER_CONTROLLER ); |
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50 | |
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51 | if ( (uintptr_t) bsp_processor_count >= BSPSTART_MAX_CORES_PER_CONTROLLER ) { |
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52 | for ( index = 1; index < CORES; ++index ) { |
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53 | /* set the start address from where the core will execute */ |
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54 | (*cpu1_start_addr) = ALT_SYSMGR_ROMCODE_CPU1STARTADDR_VALUE_SET( |
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55 | (uintptr_t) _start ); |
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56 | |
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57 | /* Make the core finish it's reset */ |
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58 | (*mpumodrst) &= ~ALT_RSTMGR_MPUMODRST_CPU1_SET_MSK; |
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59 | } |
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60 | } |
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61 | #endif /* #ifdef RTEMS_SMP */ |
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62 | } |
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63 | |
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64 | void bsp_start( void ) |
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65 | { |
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66 | bsp_interrupt_initialize(); |
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67 | altera_cyclone_v_nocache_init_heap(); |
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68 | bsp_start_secondary_cores(); |
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69 | } |
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