source: rtems/c/src/lib/libbsp/arm/altera-cyclone-v/startup/bspstart.c @ 40599e7e

4.115
Last change on this file since 40599e7e was bb70bea, checked in by Ralf Kirchner <ralf.kirchner@…>, on May 28, 2014 at 12:47:05 PM

bsp/altera-cyclone-v: Cache mbufs and clusters

  • Property mode set to 100644
File size: 1.9 KB
Line 
1/*
2 * Copyright (c) 2013 embedded brains GmbH.  All rights reserved.
3 *
4 *  embedded brains GmbH
5 *  Dornierstr. 4
6 *  82178 Puchheim
7 *  Germany
8 *  <info@embedded-brains.de>
9 *
10 * The license and distribution terms for this file may be
11 * found in the file LICENSE in this distribution or at
12 * http://www.rtems.org/license/LICENSE.
13 */
14
15#include <assert.h>
16#include <stdint.h>
17#include <bsp.h>
18#include <bsp/bootcard.h>
19#include <bsp/irq-generic.h>
20#include <bsp/linker-symbols.h>
21#include <bsp/start.h>
22#include <bsp/nocache-heap.h>
23#include <rtems/config.h>
24#include "socal/alt_rstmgr.h"
25#include "socal/alt_sysmgr.h"
26#include "socal/hps.h"
27
28#ifndef MIN
29#define MIN( a, b ) ( ( a ) < ( b ) ? ( a ) : ( b ) )
30#endif
31
32#define BSPSTART_MAX_CORES_PER_CONTROLLER 2
33
34static void bsp_start_secondary_cores( void )
35{
36#ifdef RTEMS_SMP
37  volatile uint32_t *mpumodrst       = ALT_RSTMGR_MPUMODRST_ADDR;
38  uint32_t          *cpu1_start_addr = (
39    ALT_SYSMGR_ROMCODE_ADDR + ALT_SYSMGR_ROMCODE_CPU1STARTADDR_OFST );
40  const uint32_t     CORES           = MIN(
41    (uintptr_t) bsp_processor_count,
42    rtems_configuration_get_maximum_processors() );
43  unsigned int       index;
44
45
46  /* Memory would get overwritten if a too small processor count
47   * would be specified */
48  assert( 
49    (uintptr_t) bsp_processor_count >= BSPSTART_MAX_CORES_PER_CONTROLLER );
50
51  if ( (uintptr_t) bsp_processor_count >= BSPSTART_MAX_CORES_PER_CONTROLLER ) {
52    for ( index = 1; index < CORES; ++index ) {
53      /* set the start address from where the core will execute */
54      (*cpu1_start_addr) = ALT_SYSMGR_ROMCODE_CPU1STARTADDR_VALUE_SET(
55        (uintptr_t) _start );
56
57      /* Make the core finish it's reset */
58      (*mpumodrst) &= ~ALT_RSTMGR_MPUMODRST_CPU1_SET_MSK;
59    }
60  }
61#endif /* #ifdef RTEMS_SMP */
62}
63
64void bsp_start( void )
65{
66  bsp_interrupt_initialize();
67  altera_cyclone_v_nocache_init_heap();
68  bsp_start_secondary_cores();
69}
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