1 | /* |
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2 | * Copyright (c) 2013 embedded brains GmbH. All rights reserved. |
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3 | * |
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4 | * embedded brains GmbH |
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5 | * Dornierstr. 4 |
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6 | * 82178 Puchheim |
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7 | * Germany |
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8 | * <info@embedded-brains.de> |
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9 | * |
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10 | * The license and distribution terms for this file may be |
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11 | * found in the file LICENSE in this distribution or at |
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12 | * http://www.rtems.org/license/LICENSE. |
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13 | */ |
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14 | |
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15 | #include <assert.h> |
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16 | #include <stdint.h> |
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17 | #include <stdbool.h> |
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18 | #include <libchip/serial.h> |
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19 | #include <libchip/ns16550.h> |
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20 | |
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21 | #include <bsp.h> |
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22 | #include <bsp/irq.h> |
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23 | #include <bsp/alt_clock_manager.h> |
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24 | #include "socal/alt_rstmgr.h" |
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25 | #include "socal/socal.h" |
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26 | #include "socal/alt_uart.h" |
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27 | #include "socal/hps.h" |
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28 | |
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29 | bool altera_cyclone_v_uart_probe( int minor ); |
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30 | |
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31 | static uint8_t altera_cyclone_v_uart_get_register(uintptr_t addr, uint8_t i) |
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32 | { |
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33 | volatile uint32_t *reg = (volatile uint32_t *) addr; |
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34 | |
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35 | return (uint8_t) reg [i]; |
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36 | } |
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37 | |
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38 | static void altera_cyclone_v_uart_set_register(uintptr_t addr, uint8_t i, uint8_t val) |
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39 | { |
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40 | volatile uint32_t *reg = (volatile uint32_t *) addr; |
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41 | |
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42 | reg [i] = val; |
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43 | } |
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44 | |
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45 | console_tbl Console_Configuration_Ports[] = { |
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46 | #ifdef CYCLONE_V_CONFIG_CONSOLE |
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47 | { |
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48 | .sDeviceName = "/dev/ttyS0", |
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49 | .deviceType = SERIAL_NS16550, |
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50 | .pDeviceFns = &ns16550_fns, |
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51 | .deviceProbe = altera_cyclone_v_uart_probe, |
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52 | .pDeviceFlow = NULL, |
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53 | .ulMargin = 16, |
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54 | .ulHysteresis = 8, |
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55 | .pDeviceParams = (void *)CYCLONE_V_UART_BAUD, |
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56 | .ulCtrlPort1 = (uint32_t)ALT_UART0_ADDR, |
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57 | .ulCtrlPort2 = 0, |
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58 | .ulDataPort = (uint32_t)ALT_UART0_ADDR, |
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59 | .getRegister = altera_cyclone_v_uart_get_register, |
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60 | .setRegister = altera_cyclone_v_uart_set_register, |
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61 | .getData = NULL, |
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62 | .setData = NULL, |
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63 | .ulClock = 0, |
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64 | .ulIntVector = ALT_INT_INTERRUPT_UART0 |
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65 | }, |
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66 | #endif |
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67 | #ifdef CYCLONE_V_CONFIG_UART_1 |
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68 | { |
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69 | .sDeviceName = "/dev/ttyS1", |
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70 | .deviceType = SERIAL_NS16550, |
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71 | .pDeviceFns = &ns16550_fns, |
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72 | .deviceProbe = altera_cyclone_v_uart_probe, |
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73 | .pDeviceFlow = NULL, |
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74 | .ulMargin = 16, |
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75 | .ulHysteresis = 8, |
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76 | .pDeviceParams = (void *)CYCLONE_V_UART_BAUD, |
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77 | .ulCtrlPort1 = (uint32_t)ALT_UART1_ADDR, |
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78 | .ulCtrlPort2 = 0, |
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79 | .ulDataPort = (uint32_t)ALT_UART1_ADDR, |
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80 | .getRegister = altera_cyclone_v_uart_get_register, |
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81 | .setRegister = altera_cyclone_v_uart_set_register, |
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82 | .getData = NULL, |
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83 | .setData = NULL, |
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84 | .ulClock = 0, |
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85 | .ulIntVector = ALT_INT_INTERRUPT_UART1 |
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86 | } |
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87 | #endif |
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88 | }; |
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89 | |
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90 | |
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91 | unsigned long Console_Configuration_Count = |
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92 | RTEMS_ARRAY_SIZE(Console_Configuration_Ports); |
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93 | |
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94 | bool altera_cyclone_v_uart_probe(int minor) |
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95 | { |
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96 | bool ret = true; |
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97 | uint32_t uart_set_mask; |
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98 | uint32_t ucr; |
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99 | ALT_STATUS_CODE sc; |
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100 | void* location; |
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101 | |
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102 | /* The ALT_CLK_L4_SP is required for all SoCFPGA UARTs. |
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103 | * Check that it's enabled. */ |
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104 | assert( alt_clk_is_enabled(ALT_CLK_L4_SP) == ALT_E_TRUE ); |
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105 | if ( alt_clk_is_enabled(ALT_CLK_L4_SP) != ALT_E_TRUE ) { |
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106 | ret = false; |
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107 | } |
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108 | |
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109 | if ( ret ) { |
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110 | switch(minor) |
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111 | { |
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112 | case(0): |
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113 | /* UART 0 */ |
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114 | uart_set_mask = ALT_RSTMGR_PERMODRST_UART0_SET_MSK; |
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115 | location = ALT_UART0_ADDR; |
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116 | break; |
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117 | case(1): |
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118 | /* UART 1 */ |
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119 | uart_set_mask = ALT_RSTMGR_PERMODRST_UART1_SET_MSK; |
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120 | location = ALT_UART1_ADDR; |
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121 | break; |
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122 | default: |
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123 | /* Unknown case */ |
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124 | assert( minor == 0 || minor == 1 ); |
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125 | ret = false; |
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126 | break; |
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127 | } |
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128 | } |
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129 | if ( ret ) { |
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130 | sc = alt_clk_freq_get(ALT_CLK_L4_SP, &Console_Configuration_Ports[minor].ulClock); |
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131 | assert( sc == ALT_E_SUCCESS ); |
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132 | if ( sc != ALT_E_SUCCESS ) { |
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133 | ret = false; |
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134 | } |
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135 | } |
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136 | |
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137 | if ( ret ) { |
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138 | // Bring UART out of reset. |
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139 | alt_clrbits_word(ALT_RSTMGR_PERMODRST_ADDR, uart_set_mask); |
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140 | |
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141 | // Verify the UCR (UART Component Version) |
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142 | ucr = alt_read_word( ALT_UART_UCV_ADDR( location ) ); |
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143 | |
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144 | assert( ucr == ALT_UART_UCV_UART_COMPONENT_VER_RESET ); |
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145 | if ( ucr != ALT_UART_UCV_UART_COMPONENT_VER_RESET ) { |
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146 | ret = false; |
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147 | } |
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148 | } |
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149 | |
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150 | if ( ret ) { |
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151 | // Write SRR::UR (Shadow Reset Register :: UART Reset) |
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152 | alt_write_word( ALT_UART_SRR_ADDR( location ), ALT_UART_SRR_UR_SET_MSK ); |
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153 | |
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154 | // Read the MSR to work around case:119085. |
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155 | (void)alt_read_word( ALT_UART_MSR_ADDR( location ) ); |
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156 | } |
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157 | |
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158 | return ret; |
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159 | } |
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160 | |
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161 | static void output_char(char c) |
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162 | { |
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163 | int minor = (int) Console_Port_Minor; |
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164 | const console_tbl *ct = Console_Port_Tbl != NULL ? |
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165 | Console_Port_Tbl[minor] : &Console_Configuration_Ports[minor]; |
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166 | const console_fns *cf = ct->pDeviceFns; |
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167 | |
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168 | if (c == '\n') { |
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169 | (*cf->deviceWritePolled)(minor, '\r'); |
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170 | } |
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171 | |
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172 | (*cf->deviceWritePolled)(minor, c); |
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173 | } |
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174 | |
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175 | static void output_char_init(char c) |
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176 | { |
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177 | if (Console_Port_Tbl == NULL) { |
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178 | int minor; |
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179 | const console_fns *cf; |
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180 | |
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181 | bsp_console_select(); |
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182 | |
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183 | minor = (int) Console_Port_Minor; |
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184 | cf = Console_Configuration_Ports[minor].pDeviceFns; |
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185 | |
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186 | (*cf->deviceInitialize)(minor); |
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187 | } |
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188 | |
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189 | BSP_output_char = output_char; |
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190 | output_char(c); |
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191 | } |
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192 | |
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193 | BSP_output_char_function_type BSP_output_char = output_char_init; |
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194 | |
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195 | BSP_polling_getchar_function_type BSP_poll_char = NULL; |
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