1 | /* |
---|
2 | * Copyright (c) 2013-2014 embedded brains GmbH. All rights reserved. |
---|
3 | * |
---|
4 | * embedded brains GmbH |
---|
5 | * Dornierstr. 4 |
---|
6 | * 82178 Puchheim |
---|
7 | * Germany |
---|
8 | * <info@embedded-brains.de> |
---|
9 | * |
---|
10 | * The license and distribution terms for this file may be |
---|
11 | * found in the file LICENSE in this distribution or at |
---|
12 | * http://www.rtems.org/license/LICENSE. |
---|
13 | */ |
---|
14 | |
---|
15 | #include <libchip/ns16550.h> |
---|
16 | |
---|
17 | #include <rtems/bspIo.h> |
---|
18 | |
---|
19 | #include <bsp.h> |
---|
20 | #include <bsp/irq.h> |
---|
21 | #include <bsp/alt_clock_manager.h> |
---|
22 | #include <bsp/console-termios.h> |
---|
23 | #include "socal/alt_rstmgr.h" |
---|
24 | #include "socal/socal.h" |
---|
25 | #include "socal/alt_uart.h" |
---|
26 | #include "socal/hps.h" |
---|
27 | |
---|
28 | #ifdef BSP_USE_UART_INTERRUPTS |
---|
29 | #define DEVICE_FNS &ns16550_handler_interrupt |
---|
30 | #else |
---|
31 | #define DEVICE_FNS &ns16550_handler_polled |
---|
32 | #endif |
---|
33 | |
---|
34 | static uint8_t altera_cyclone_v_uart_get_register(uintptr_t addr, uint8_t i) |
---|
35 | { |
---|
36 | volatile uint32_t *reg = (volatile uint32_t *) addr; |
---|
37 | |
---|
38 | return (uint8_t) reg [i]; |
---|
39 | } |
---|
40 | |
---|
41 | static void altera_cyclone_v_uart_set_register(uintptr_t addr, uint8_t i, uint8_t val) |
---|
42 | { |
---|
43 | volatile uint32_t *reg = (volatile uint32_t *) addr; |
---|
44 | |
---|
45 | reg [i] = val; |
---|
46 | } |
---|
47 | |
---|
48 | static bool altera_cyclone_v_uart_probe( |
---|
49 | rtems_termios_device_context *base, |
---|
50 | uint32_t uart_set_mask |
---|
51 | ) |
---|
52 | { |
---|
53 | ns16550_context *ctx = (ns16550_context *) base; |
---|
54 | bool ret = true; |
---|
55 | uint32_t ucr; |
---|
56 | ALT_STATUS_CODE sc; |
---|
57 | void* location = (void *) ctx->port; |
---|
58 | |
---|
59 | /* The ALT_CLK_L4_SP is required for all SoCFPGA UARTs. |
---|
60 | * Check that it's enabled. */ |
---|
61 | if ( alt_clk_is_enabled(ALT_CLK_L4_SP) != ALT_E_TRUE ) { |
---|
62 | ret = false; |
---|
63 | } |
---|
64 | |
---|
65 | if ( ret ) { |
---|
66 | sc = alt_clk_freq_get(ALT_CLK_L4_SP, &ctx->clock); |
---|
67 | if ( sc != ALT_E_SUCCESS ) { |
---|
68 | ret = false; |
---|
69 | } |
---|
70 | } |
---|
71 | |
---|
72 | if ( ret ) { |
---|
73 | // Bring UART out of reset. |
---|
74 | alt_clrbits_word(ALT_RSTMGR_PERMODRST_ADDR, uart_set_mask); |
---|
75 | |
---|
76 | // Verify the UCR (UART Component Version) |
---|
77 | ucr = alt_read_word( ALT_UART_UCV_ADDR( location ) ); |
---|
78 | if ( ucr != ALT_UART_UCV_UART_COMPONENT_VER_RESET ) { |
---|
79 | ret = false; |
---|
80 | } |
---|
81 | } |
---|
82 | |
---|
83 | if ( ret ) { |
---|
84 | // Write SRR::UR (Shadow Reset Register :: UART Reset) |
---|
85 | alt_write_word( ALT_UART_SRR_ADDR( location ), ALT_UART_SRR_UR_SET_MSK ); |
---|
86 | |
---|
87 | // Read the MSR to work around case:119085. |
---|
88 | (void)alt_read_word( ALT_UART_MSR_ADDR( location ) ); |
---|
89 | |
---|
90 | ret = ns16550_probe( base ); |
---|
91 | } |
---|
92 | |
---|
93 | return ret; |
---|
94 | } |
---|
95 | |
---|
96 | #ifdef CYCLONE_V_CONFIG_CONSOLE |
---|
97 | static bool altera_cyclone_v_uart_probe_0(rtems_termios_device_context *base) |
---|
98 | { |
---|
99 | return altera_cyclone_v_uart_probe(base, ALT_RSTMGR_PERMODRST_UART0_SET_MSK); |
---|
100 | } |
---|
101 | |
---|
102 | static ns16550_context altera_cyclone_v_uart_context_0 = { |
---|
103 | .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("UART 0"), |
---|
104 | .get_reg = altera_cyclone_v_uart_get_register, |
---|
105 | .set_reg = altera_cyclone_v_uart_set_register, |
---|
106 | .port = (uintptr_t) ALT_UART0_ADDR, |
---|
107 | .irq = ALT_INT_INTERRUPT_UART0, |
---|
108 | .initial_baud = CYCLONE_V_UART_BAUD |
---|
109 | }; |
---|
110 | #endif |
---|
111 | |
---|
112 | #ifdef CYCLONE_V_CONFIG_UART_1 |
---|
113 | static bool altera_cyclone_v_uart_probe_1(rtems_termios_device_context *base) |
---|
114 | { |
---|
115 | return altera_cyclone_v_uart_probe(base, ALT_RSTMGR_PERMODRST_UART1_SET_MSK); |
---|
116 | } |
---|
117 | |
---|
118 | static ns16550_context altera_cyclone_v_uart_context_1 = { |
---|
119 | .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("UART 1"), |
---|
120 | .get_reg = altera_cyclone_v_uart_get_register, |
---|
121 | .set_reg = altera_cyclone_v_uart_set_register, |
---|
122 | .port = (uintptr_t) ALT_UART1_ADDR, |
---|
123 | .irq = ALT_INT_INTERRUPT_UART1, |
---|
124 | .initial_baud = CYCLONE_V_UART_BAUD |
---|
125 | }; |
---|
126 | #endif |
---|
127 | |
---|
128 | const console_device console_device_table[] = { |
---|
129 | #ifdef CYCLONE_V_CONFIG_CONSOLE |
---|
130 | { |
---|
131 | .device_file = "/dev/ttyS0", |
---|
132 | .probe = altera_cyclone_v_uart_probe_0, |
---|
133 | .handler = DEVICE_FNS, |
---|
134 | .context = &altera_cyclone_v_uart_context_0.base |
---|
135 | }, |
---|
136 | #endif |
---|
137 | #ifdef CYCLONE_V_CONFIG_UART_1 |
---|
138 | { |
---|
139 | .device_file = "/dev/ttyS1", |
---|
140 | .probe = altera_cyclone_v_uart_probe_1, |
---|
141 | .handler = DEVICE_FNS, |
---|
142 | .context = &altera_cyclone_v_uart_context_1.base |
---|
143 | }, |
---|
144 | #endif |
---|
145 | }; |
---|
146 | |
---|
147 | const size_t console_device_count = RTEMS_ARRAY_SIZE(console_device_table); |
---|
148 | |
---|
149 | static void output_char(char c) |
---|
150 | { |
---|
151 | rtems_termios_device_context *ctx = console_device_table[0].context; |
---|
152 | |
---|
153 | ns16550_polled_putchar( ctx, c ); |
---|
154 | } |
---|
155 | |
---|
156 | BSP_output_char_function_type BSP_output_char = output_char; |
---|
157 | |
---|
158 | BSP_polling_getchar_function_type BSP_poll_char = NULL; |
---|