source: rtems/c/src/lib/libbsp/arm/altera-cyclone-v/configure.ac @ 50440c0

4.115
Last change on this file since 50440c0 was 50440c0, checked in by Sebastian Huber <sebastian.huber@…>, on 11/19/14 at 14:30:24

bsps/arm: Enable L2C for Cortex-A9 MPCore BSPs

  • Property mode set to 100644
File size: 2.5 KB
Line 
1##
2#
3# @file
4#
5# @brief Configure script of LibBSP for the Altera Cyclone-V platform.
6#
7
8AC_PREREQ([2.69])
9AC_INIT([rtems-c-src-lib-libbsp-arm-xilinx-zynq-a9],[_RTEMS_VERSION],[http://www.rtems.org/bugzilla])
10AC_CONFIG_SRCDIR([bsp_specs])
11RTEMS_TOP(../../../../../..)
12
13RTEMS_CANONICAL_TARGET_CPU
14AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.12.2])
15RTEMS_BSP_CONFIGURE
16
17RTEMS_PROG_CC_FOR_TARGET
18RTEMS_CANONICALIZE_TOOLS
19RTEMS_PROG_CCAS
20
21RTEMS_CHECK_NETWORKING
22AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes")
23
24RTEMS_BSPOPTS_SET([BSP_START_RESET_VECTOR],[*],[])
25RTEMS_BSPOPTS_HELP([BSP_START_RESET_VECTOR],[reset vector address for BSP start])
26
27RTEMS_BSPOPTS_SET([BSP_DATA_CACHE_ENABLED],[*],[1])
28RTEMS_BSPOPTS_HELP([BSP_DATA_CACHE_ENABLED],[enable data cache])
29
30RTEMS_BSPOPTS_SET([BSP_INSTRUCTION_CACHE_ENABLED],[*],[1])
31RTEMS_BSPOPTS_HELP([BSP_INSTRUCTION_CACHE_ENABLED],[enable instruction cache])
32
33RTEMS_BSPOPTS_SET([BSP_ARM_A9MPCORE_PERIPHCLK],[altcycv_devkit*],[200000000U])
34RTEMS_BSPOPTS_SET([BSP_ARM_A9MPCORE_PERIPHCLK],[*],[100000000U])
35RTEMS_BSPOPTS_HELP([BSP_ARM_A9MPCORE_PERIPHCLK],[ARM Cortex-A9 MPCore PERIPHCLK clock frequency in Hz])
36
37RTEMS_BSPOPTS_SET([CLOCK_DRIVER_USE_FAST_IDLE],[*qemu],[1])
38RTEMS_BSPOPTS_HELP([CLOCK_DRIVER_USE_FAST_IDLE],
39[This sets a mode where the time runs as fast as possible when a clock ISR
40occurs while the IDLE thread is executing.  This can significantly reduce
41simulation times.])
42
43RTEMS_BSPOPTS_SET([BSP_CONSOLE_MINOR],[*],[0])
44RTEMS_BSPOPTS_HELP([BSP_CONSOLE_MINOR],[minor number of console device])
45
46RTEMS_BSPOPTS_SET([CYCLONE_V_CONFIG_CONSOLE],[*],[0])
47RTEMS_BSPOPTS_HELP([CYCLONE_V_CONFIG_CONSOLE],[configuration for console (UART 0)])
48
49RTEMS_BSPOPTS_SET([CYCLONE_V_CONFIG_UART_1],[*],[0])
50RTEMS_BSPOPTS_HELP([CYCLONE_V_CONFIG_UART_1],[configuration for UART 1])
51
52RTEMS_BSPOPTS_SET([CYCLONE_V_UART_BAUD],[*],[115200U])
53RTEMS_BSPOPTS_HELP([CYCLONE_V_UART_BAUD],[baud for UARTs])
54
55RTEMS_BSPOPTS_SET([BSP_USE_UART_INTERRUPTS],[*],[1])
56RTEMS_BSPOPTS_HELP([BSP_USE_UART_INTERRUPTS],[enable usage of interrupts for the UART modules])
57
58RTEMS_BSPOPTS_SET([CYCLONE_V_NO_I2C],[*],[1])
59RTEMS_BSPOPTS_HELP([CYCLONE_V_NO_I2C],
60[Number of configured I2C buses. Note that each bus has to be configured in an
61apropriate i2cdrv_config array.])
62
63RTEMS_BSPOPTS_SET([CYCLONE_V_I2C0_SPEED],[*],[100000])
64RTEMS_BSPOPTS_HELP([CYCLONE_V_I2C0_SPEED],[speed for I2C0 in HZ])
65
66RTEMS_CHECK_SMP
67AM_CONDITIONAL(HAS_SMP,[test "$rtems_cv_HAS_SMP" = "yes"])
68
69RTEMS_BSP_CLEANUP_OPTIONS(0, 1)
70RTEMS_BSP_LINKCMDS
71
72AC_CONFIG_FILES([Makefile])
73AC_OUTPUT
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