source: rtems/c/src/lib/libbsp/a29k/portsw/console/serial.c @ 0836603

4.104.114.84.95
Last change on this file since 0836603 was 0836603, checked in by Joel Sherrill <joel.sherrill@…>, on Sep 18, 1996 at 9:13:10 PM

new files submitted by Craig Lebakken (lebakken@…) and Derrick Ostertag
(ostertag@…)

  • Property mode set to 100644
File size: 5.1 KB
Line 
1/*
2 *  $Id$
3 */
4
5#include "serial.h"
6#include "rtems.h"
7
8
9typedef unsigned char uchar ;           /* Abbreviations */
10typedef unsigned short ushort ;
11typedef unsigned long ulong ;
12
13#if 0
14#define BAUDRate        9600            /* Fixed Uart baud rate */
15#endif
16
17#define SEND_WAIT       0x0100          /* Waiting to send character */
18
19#define TDR(i)
20
21
22/********************************************************************
23 ***  16552 specific DUART definitions.
24 *******************************************************************/
25
26
27typedef struct uart_16552 DUART ;
28
29#ifndef notdef
30struct uart_16552
31{
32        short   u_short[8*2] ;
33} ;
34#define u_reg(n)        u_short[2*(n)]
35
36#else
37
38struct uart_16552
39{
40        int     u_int[8] ;
41} ;
42
43#define u_reg(n)        u_int[(n)]
44#endif
45
46#define u_tdr           u_reg(0)        /* Transmit Data Register (write) */
47#define u_rdr           u_reg(0)        /* Receive Data Register (read) */
48#define u_dlr0          u_reg(0)        /* Divisor Latch Register (lsb) */
49
50#define u_ier           u_reg(1)        /* Interrupt Enable Register */
51#define u_dlr1          u_reg(1)        /* Divisor Latch Register (msb) */
52
53#define u_iir           u_reg(2)        /* Interrupt ID Register (read) */
54#define u_fcr           u_reg(2)        /* FIFO Control Register (write) */
55#define u_afr           u_reg(2)        /* Alternate Funct Reg (read/write) */
56
57#define u_lcr           u_reg(3)        /* Line Control Register */
58
59#define u_mcr           u_reg(4)        /* Modem Control Register */
60
61#define u_lsr           u_reg(5)        /* Line Status Register */
62
63#define u_msr           u_reg(6)        /* Modem Status Register */
64
65#define u_spr           u_reg(7)        /* Scratch Pad Register */
66
67#define uart1   ((volatile DUART *)0x90000380)
68#define uart2   ((volatile DUART *)0x90000300)
69
70#define NUM_UARTS 2
71static volatile DUART * duart[NUM_UARTS] = { uart1, uart2 };
72
73
74extern void     display_msg(void);
75/*extern int    sprintf();*/
76
77
78#define board_rev_reg  ((volatile short *)0x90000080)
79
80static unsigned int shift_val = 0;
81
82/***********************************************************************
83 ***  16552 DUART initialization routine.
84 ***********************************************************************/
85
86int
87console_duartinit(unsigned int uart_num, unsigned int BAUDRate)
88{
89        register uchar  tmp;
90        unsigned int board_rev = *board_rev_reg & 0xff;
91
92        switch( BAUDRate )
93        {
94           case 1200:
95           case 2400:
96           case 9600:
97           case 19200:
98           case 38400:
99           case 57600:
100              break;
101           default:
102              /* unknown baud rate */
103              return FALSE;
104        }
105
106        /* the board rev register should never be 0xff.
107           if it equals 0xff, assume that we're on old hardware
108           that needs all values shifted by 8. */
109        if ( board_rev == 0xff )
110           shift_val = 8;
111        else
112           shift_val = 0;
113
114        if ( uart_num >= NUM_UARTS )
115           return -1;
116
117        duart[uart_num]->u_lcr = 0x80<<shift_val ;      /* Set DLAB bit to 1 */
118
119        duart[uart_num]->u_dlr0 = ((115200 / BAUDRate) >> 0)<<shift_val ; /* Set baud              */
120        duart[uart_num]->u_dlr1 = ((115200 / BAUDRate) >> 8)<<shift_val ; /*          rate         */
121
122        duart[uart_num]->u_lcr = 0x03<<shift_val ;      /* 8 bits, no parity, 1 stop */
123
124        duart[uart_num]->u_mcr = 0x0b<<shift_val ;      /* Assert RTS, DTR & OUT2         */
125
126        duart[uart_num]->u_fcr = 0x00<<shift_val ;      /* Clear 16552 FIFOs */
127        /* Is the following write of 0x01 needed? */
128        /* Let's try it without... */
129        duart[uart_num]->u_fcr = 0xc7<<shift_val ;      /* Enable 16552 FIFOs */
130
131        duart[uart_num]->u_ier = 0x07<<shift_val ;      /* Enable transmit/receive ints */
132
133        tmp = duart[uart_num]->u_lsr ;          /* Re-arm interrupts            */
134        tmp = duart[uart_num]->u_rdr ;
135        tmp = duart[uart_num]->u_msr ;
136
137        return(0);
138}
139
140        /*------------ end of duartinit function ----------------*/
141
142
143    /***********************************************************************
144     ***  Transmit character to host.
145     ***********************************************************************/
146
147int console_sps_putc(unsigned int uart_num, int ch)
148{
149        register unsigned short stat;
150
151        if ( uart_num >= NUM_UARTS )
152           return -1;
153
154        /*
155         *  Pause until there is room in the UART transmit
156         *  buffer.
157         */
158
159        do {
160                stat = duart[uart_num]->u_lsr>>shift_val;
161        } while (!(stat & 0x40));
162
163        /*
164         *  Transmit data. (Junk)
165         */
166
167        TDR(ch)
168
169        duart[uart_num]->u_tdr = ch<<shift_val ;
170
171        return ch;
172
173}
174
175
176    /***********************************************************************
177     ***  Read character from host.
178     ***********************************************************************/
179
180int console_sps_getc(unsigned int uart_num)
181{
182        register unsigned short stat;
183        register int    ch;
184
185        if ( uart_num >= NUM_UARTS )
186           return -1;
187
188        stat = duart[uart_num]->u_lsr>>shift_val;
189        while (!(stat & 0x01))
190        {
191                rtems_task_wake_after( RTEMS_YIELD_PROCESSOR );
192                stat = duart[uart_num]->u_lsr>>shift_val;
193        }
194
195        ch = duart[uart_num]->u_rdr>>shift_val;
196
197        return ch;
198}
199
200    /***********************************************************************
201     ***  check character from host.
202     ***********************************************************************/
203
204int console_sps_kbhit(unsigned int uart_num)
205{
206        register unsigned short stat;
207
208        if ( uart_num >= NUM_UARTS )
209           return -1;
210
211        stat = duart[uart_num]->u_lsr>>shift_val;
212        return ((stat & 0x01));
213}
214
215
216
217
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