1 | /* |
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2 | * $Id$ |
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3 | */ |
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4 | |
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5 | #include "serial.h" |
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6 | #include "rtems.h" |
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7 | |
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8 | |
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9 | typedef unsigned char uchar ; /* Abbreviations */ |
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10 | typedef unsigned short ushort ; |
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11 | typedef unsigned long ulong ; |
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12 | |
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13 | #if 0 |
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14 | #define BAUDRate 9600 /* Fixed Uart baud rate */ |
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15 | #endif |
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16 | |
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17 | #define SEND_WAIT 0x0100 /* Waiting to send character */ |
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18 | |
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19 | #define TDR(i) |
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20 | |
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21 | |
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22 | /******************************************************************** |
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23 | *** 16552 specific DUART definitions. |
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24 | *******************************************************************/ |
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25 | |
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26 | |
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27 | typedef struct uart_16552 DUART ; |
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28 | |
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29 | #ifndef notdef |
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30 | struct uart_16552 |
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31 | { |
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32 | short u_short[8*2] ; |
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33 | } ; |
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34 | #define u_reg(n) u_short[2*(n)] |
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35 | |
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36 | #else |
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37 | |
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38 | struct uart_16552 |
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39 | { |
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40 | int u_int[8] ; |
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41 | } ; |
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42 | |
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43 | #define u_reg(n) u_int[(n)] |
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44 | #endif |
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45 | |
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46 | #define u_tdr u_reg(0) /* Transmit Data Register (write) */ |
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47 | #define u_rdr u_reg(0) /* Receive Data Register (read) */ |
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48 | #define u_dlr0 u_reg(0) /* Divisor Latch Register (lsb) */ |
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49 | |
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50 | #define u_ier u_reg(1) /* Interrupt Enable Register */ |
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51 | #define u_dlr1 u_reg(1) /* Divisor Latch Register (msb) */ |
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52 | |
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53 | #define u_iir u_reg(2) /* Interrupt ID Register (read) */ |
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54 | #define u_fcr u_reg(2) /* FIFO Control Register (write) */ |
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55 | #define u_afr u_reg(2) /* Alternate Funct Reg (read/write) */ |
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56 | |
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57 | #define u_lcr u_reg(3) /* Line Control Register */ |
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58 | |
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59 | #define u_mcr u_reg(4) /* Modem Control Register */ |
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60 | |
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61 | #define u_lsr u_reg(5) /* Line Status Register */ |
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62 | |
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63 | #define u_msr u_reg(6) /* Modem Status Register */ |
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64 | |
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65 | #define u_spr u_reg(7) /* Scratch Pad Register */ |
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66 | |
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67 | #define uart1 ((volatile DUART *)0x90000380) |
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68 | #define uart2 ((volatile DUART *)0x90000300) |
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69 | |
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70 | #define NUM_UARTS 2 |
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71 | static volatile DUART * duart[NUM_UARTS] = { uart1, uart2 }; |
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72 | |
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73 | |
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74 | extern void display_msg(void); |
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75 | /*extern int sprintf();*/ |
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76 | |
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77 | |
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78 | #define board_rev_reg ((volatile short *)0x90000080) |
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79 | |
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80 | static unsigned int shift_val = 0; |
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81 | |
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82 | /*********************************************************************** |
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83 | *** 16552 DUART initialization routine. |
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84 | ***********************************************************************/ |
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85 | |
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86 | int |
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87 | console_duartinit(unsigned int uart_num, unsigned int BAUDRate) |
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88 | { |
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89 | register uchar tmp; |
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90 | unsigned int board_rev = *board_rev_reg & 0xff; |
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91 | |
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92 | switch( BAUDRate ) |
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93 | { |
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94 | case 1200: |
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95 | case 2400: |
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96 | case 9600: |
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97 | case 19200: |
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98 | case 38400: |
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99 | case 57600: |
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100 | break; |
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101 | default: |
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102 | /* unknown baud rate */ |
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103 | return FALSE; |
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104 | } |
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105 | |
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106 | /* the board rev register should never be 0xff. |
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107 | if it equals 0xff, assume that we're on old hardware |
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108 | that needs all values shifted by 8. */ |
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109 | if ( board_rev == 0xff ) |
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110 | shift_val = 8; |
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111 | else |
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112 | shift_val = 0; |
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113 | |
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114 | if ( uart_num >= NUM_UARTS ) |
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115 | return -1; |
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116 | |
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117 | duart[uart_num]->u_lcr = 0x80<<shift_val ; /* Set DLAB bit to 1 */ |
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118 | |
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119 | duart[uart_num]->u_dlr0 = ((115200 / BAUDRate) >> 0)<<shift_val ; /* Set baud */ |
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120 | duart[uart_num]->u_dlr1 = ((115200 / BAUDRate) >> 8)<<shift_val ; /* rate */ |
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121 | |
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122 | duart[uart_num]->u_lcr = 0x03<<shift_val ; /* 8 bits, no parity, 1 stop */ |
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123 | |
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124 | duart[uart_num]->u_mcr = 0x0b<<shift_val ; /* Assert RTS, DTR & OUT2 */ |
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125 | |
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126 | duart[uart_num]->u_fcr = 0x00<<shift_val ; /* Clear 16552 FIFOs */ |
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127 | /* Is the following write of 0x01 needed? */ |
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128 | /* Let's try it without... */ |
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129 | duart[uart_num]->u_fcr = 0xc7<<shift_val ; /* Enable 16552 FIFOs */ |
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130 | |
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131 | duart[uart_num]->u_ier = 0x07<<shift_val ; /* Enable transmit/receive ints */ |
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132 | |
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133 | tmp = duart[uart_num]->u_lsr ; /* Re-arm interrupts */ |
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134 | tmp = duart[uart_num]->u_rdr ; |
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135 | tmp = duart[uart_num]->u_msr ; |
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136 | |
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137 | return(0); |
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138 | } |
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139 | |
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140 | /*------------ end of duartinit function ----------------*/ |
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141 | |
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142 | |
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143 | /*********************************************************************** |
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144 | *** Transmit character to host. |
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145 | ***********************************************************************/ |
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146 | |
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147 | int console_sps_putc(unsigned int uart_num, int ch) |
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148 | { |
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149 | register unsigned short stat; |
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150 | |
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151 | if ( uart_num >= NUM_UARTS ) |
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152 | return -1; |
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153 | |
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154 | /* |
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155 | * Pause until there is room in the UART transmit |
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156 | * buffer. |
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157 | */ |
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158 | |
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159 | do { |
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160 | stat = duart[uart_num]->u_lsr>>shift_val; |
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161 | } while (!(stat & 0x40)); |
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162 | |
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163 | /* |
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164 | * Transmit data. (Junk) |
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165 | */ |
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166 | |
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167 | TDR(ch) |
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168 | |
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169 | duart[uart_num]->u_tdr = ch<<shift_val ; |
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170 | |
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171 | return ch; |
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172 | |
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173 | } |
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174 | |
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175 | |
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176 | /*********************************************************************** |
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177 | *** Read character from host. |
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178 | ***********************************************************************/ |
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179 | |
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180 | int console_sps_getc(unsigned int uart_num) |
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181 | { |
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182 | register unsigned short stat; |
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183 | register int ch; |
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184 | |
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185 | if ( uart_num >= NUM_UARTS ) |
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186 | return -1; |
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187 | |
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188 | stat = duart[uart_num]->u_lsr>>shift_val; |
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189 | while (!(stat & 0x01)) |
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190 | { |
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191 | rtems_task_wake_after( RTEMS_YIELD_PROCESSOR ); |
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192 | stat = duart[uart_num]->u_lsr>>shift_val; |
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193 | } |
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194 | |
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195 | ch = duart[uart_num]->u_rdr>>shift_val; |
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196 | |
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197 | return ch; |
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198 | } |
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199 | |
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200 | /*********************************************************************** |
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201 | *** check character from host. |
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202 | ***********************************************************************/ |
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203 | |
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204 | int console_sps_kbhit(unsigned int uart_num) |
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205 | { |
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206 | register unsigned short stat; |
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207 | |
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208 | if ( uart_num >= NUM_UARTS ) |
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209 | return -1; |
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210 | |
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211 | stat = duart[uart_num]->u_lsr>>shift_val; |
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212 | return ((stat & 0x01)); |
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213 | } |
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214 | |
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215 | |
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216 | |
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217 | |
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