source: rtems/c/src/lib/include/motorola/mc68681.h @ 28a4b1d

4.104.114.84.95
Last change on this file since 28a4b1d was 28a4b1d, checked in by Joel Sherrill <joel.sherrill@…>, on Aug 4, 1997 at 9:39:07 PM

moved from main include directory

  • Property mode set to 100644
File size: 3.6 KB
Line 
1/*
2 * mc68681-duart.h -- Low level support code for the Motorola mc68681
3 *                   DUART. This one is one the mc68ec0x0 board.
4 *                   Written by rob@cygnus.com (Rob Savoye)
5 *
6 *  $Id$
7 */
8
9#ifndef __MC68681_H__
10#define __MC68681_H__
11#define DUART_ADDR      0xb00003                /* base address of the DUART */
12
13/*
14 * mc68681 register offsets
15 */
16#define DUART_MR1A      0x00                    /* Mode Register A */
17#define DUART_MR2A      0x00                    /* Mode Register A */
18#define DUART_SRA       0x04                    /* Status Register A */
19#define DUART_CSRA      0x04                    /* Clock-Select Register A */
20#define DUART_CRA       0x08                    /* Command Register A */
21#define DUART_RBA       0x0c                    /* Receive Buffer A */
22#define DUART_TBA       0x0c                    /* Transmit Buffer A */
23#define DUART_IPCR      0x10                    /* Input Port Change Register */
24#define DUART_ACR       0x10                    /* Auxiliary Control Register */
25#define DUART_ISR       0x14                    /* Interrupt Status Register */
26#define DUART_IMR       0x14                    /* Interrupt Mask Register */
27#define DUART_CUR       0x18                    /* Counter Mode: current MSB */
28#define DUART_CTUR      0x18                    /* Counter/Timer upper reg */
29#define DUART_CLR       0x1c                    /* Counter Mode: current LSB */
30#define DUART_CTLR      0x1c                    /* Counter/Timer lower reg */
31#define DUART_MR1B      0x20                    /* Mode Register B */
32#define DUART_MR2B      0x20                    /* Mode Register B */
33#define DUART_SRB       0x24                    /* Status Register B */
34#define DUART_CSRB      0x24                    /* Clock-Select Register B */
35#define DUART_CRB       0x28                    /* Command Register B */
36#define DUART_RBB       0x2c                    /* Receive Buffer B */
37#define DUART_TBB       0x2c                    /* Transmit Buffer A */
38#define DUART_IVR       0x30                    /* Interrupt Vector Register */
39#define DUART_IP        0x34                    /* Input Port */
40#define DUART_OPCR      0x34                    /* Output Port Configuration Reg. */
41#define DUART_STRTCC    0x38                    /* Start-Counter command */
42#define DUART_OPRSET    0x38                    /* Output Port Reg, SET bits */
43#define DUART_STOPCC    0x3c                    /* Stop-Counter command */
44#define DUART_OPRRST    0x3c                    /* Output Port Reg, ReSeT bits */
45
46/* this is just if you want a copy of the chip's registers */
47struct duart_regs {
48  unsigned char mr1a_reg;                       /* Mode Register A */
49  unsigned char mr2a_reg;                       /* Mode Register A */
50  unsigned char sra_reg;                        /* Status Register A */
51  unsigned char csra_reg;                       /* Clock-Select Register A */
52  unsigned char cra_reg;                        /* Command Register A */
53  unsigned char ipcr_reg;                       /* Input Port Change Register */
54  unsigned char acr_reg;                        /* Auxiliary Control Register */
55  unsigned char isr_reg;                        /* Interrupt Status Register */
56  unsigned char imr_reg;                        /* Interrupt Mask Register */
57  unsigned char cur_reg;                        /* Counter Mode: current MSB */
58  unsigned char ctur_reg;                       /* Counter/Timer upper reg */
59  unsigned char clr_reg;                        /* Counter Mode: current LSB */
60  unsigned char ctlr_reg;                       /* Counter/Timer lower reg */
61  unsigned char mr1b_reg;                       /* Mode Register B */
62  unsigned char mr2b_reg;                       /* Mode Register B */
63  unsigned char srb_reg;                        /* Status Register B */
64  unsigned char csrb_reg;                       /* Clock-Select Register B */
65  unsigned char crb_reg;                        /* Command Register B */
66  unsigned char ivr_reg;                        /* Interrupt Vector Register */
67  unsigned char ip_reg;                         /* Input Port */
68  unsigned char opcr_reg;                       /* Output Port Configuration Reg. */
69  unsigned char oprset_reg;                     /* Output Port Reg; bit SET */
70  unsigned char strtcc_reg;                     /* Start-Counter command */
71  unsigned char oprrst_reg;                     /* Output Port Reg; bit ReSeT */
72  unsigned char stopcc_reg;                     /* Stop-Counter command */
73  unsigned char pad;
74};
75
76/* Some RTEMS style defines: */
77#ifndef VOL8
78#define VOL8( ptr )   ((volatile rtems_unsigned8 *)(ptr))
79#endif
80
81#define MC68681_WRITE( reg, data ) \
82   *(VOL8(DUART_ADDR+reg)) = (data)
83
84#define MC68681_READ( reg, data ) \
85   (data) = *(VOL8(DUART_ADDR+reg))
86
87#endif
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