source: rtems/c/src/exec/score/cpu/unix/cpu.c @ df49c60

4.104.114.84.95
Last change on this file since df49c60 was df49c60, checked in by Joel Sherrill <joel.sherrill@…>, on Jun 12, 2000 at 3:00:15 PM

Merged from 4.5.0-beta3a

  • Property mode set to 100644
File size: 23.6 KB
Line 
1/*
2 *  UNIX Simulator Dependent Source
3 *
4 *  COPYRIGHT (c) 1994,95 by Division Incorporated
5 *
6 *  The license and distribution terms for this file may be
7 *  found in the file LICENSE in this distribution or at
8 *  http://www.OARcorp.com/rtems/license.html.
9 *
10 *  $Id$
11 */
12
13#include <rtems/system.h>
14#include <rtems/score/isr.h>
15#include <rtems/score/interr.h>
16
17#if defined(__linux__)
18#define _XOPEN_SOURCE
19#define MALLOC_0_RETURNS_NULL
20#endif
21
22#include <sys/types.h>
23#include <sys/times.h>
24#include <stdio.h>
25#include <stdlib.h>
26#include <setjmp.h>
27#include <signal.h>
28#include <time.h>
29#include <sys/time.h>
30#include <errno.h>
31#include <unistd.h>
32#if defined(RTEMS_MULTIPROCESSING)
33#include <sys/ipc.h>
34#include <sys/shm.h>
35#include <sys/sem.h>
36#endif
37#include <string.h>   /* memset */
38
39#ifndef SA_RESTART
40#define SA_RESTART 0
41#endif
42
43typedef struct {
44  jmp_buf   regs;
45  int       isr_level;
46} Context_Control_overlay;
47
48void  _CPU_Signal_initialize(void);
49void  _CPU_Stray_signal(int);
50void  _CPU_ISR_Handler(int);
51
52static sigset_t _CPU_Signal_mask;
53static Context_Control_overlay
54          _CPU_Context_Default_with_ISRs_enabled CPU_STRUCTURE_ALIGNMENT;
55static Context_Control_overlay
56          _CPU_Context_Default_with_ISRs_disabled CPU_STRUCTURE_ALIGNMENT;
57
58/*
59 * Sync IO support, an entry for each fd that can be set
60 */
61
62void  _CPU_Sync_io_Init();
63
64static rtems_sync_io_handler _CPU_Sync_io_handlers[FD_SETSIZE];
65static int sync_io_nfds;
66static fd_set sync_io_readfds;
67static fd_set sync_io_writefds;
68static fd_set sync_io_exceptfds;
69
70/*
71 * Which cpu are we? Used by libcpu and libbsp.
72 */
73
74int cpu_number;
75
76/*PAGE
77 *
78 *  _CPU_ISR_From_CPU_Init
79 */
80
81sigset_t  posix_empty_mask;
82
83void _CPU_ISR_From_CPU_Init()
84{
85  unsigned32        i;
86  proc_ptr          old_handler;
87
88  /*
89   * Generate an empty mask to be used by disable_support
90   */
91
92  sigemptyset(&posix_empty_mask);
93
94  /*
95   * Block all the signals except SIGTRAP for the debugger
96   * and fatal error signals.
97   */
98
99  (void) sigfillset(&_CPU_Signal_mask);
100  (void) sigdelset(&_CPU_Signal_mask, SIGTRAP);
101  (void) sigdelset(&_CPU_Signal_mask, SIGABRT);
102#if !defined(__CYGWIN__)
103  (void) sigdelset(&_CPU_Signal_mask, SIGIOT);
104#endif
105  (void) sigdelset(&_CPU_Signal_mask, SIGCONT);
106  (void) sigdelset(&_CPU_Signal_mask, SIGSEGV);
107  (void) sigdelset(&_CPU_Signal_mask, SIGBUS);
108  (void) sigdelset(&_CPU_Signal_mask, SIGFPE);
109
110  _CPU_ISR_Enable(1);
111
112  /*
113   * Set the handler for all signals to be signal_handler
114   * which will then vector out to the correct handler
115   * for whichever signal actually happened. Initially
116   * set the vectors to the stray signal handler.
117   */
118
119  for (i = 0; i < CPU_INTERRUPT_NUMBER_OF_VECTORS; i++)
120      (void)_CPU_ISR_install_vector(i, _CPU_Stray_signal, &old_handler);
121
122  _CPU_Signal_initialize();
123}
124
125void _CPU_Signal_initialize( void )
126{
127  struct sigaction  act;
128  sigset_t          mask;
129
130  /* mark them all active except for TraceTrap  and Abort */
131
132  mask = _CPU_Signal_mask;
133  sigprocmask(SIG_UNBLOCK, &mask, 0);
134
135  act.sa_handler = _CPU_ISR_Handler;
136  act.sa_mask = mask;
137  act.sa_flags = SA_RESTART;
138
139  sigaction(SIGHUP, &act, 0);
140  sigaction(SIGINT, &act, 0);
141  sigaction(SIGQUIT, &act, 0);
142  sigaction(SIGILL, &act, 0);
143#ifdef SIGEMT
144  sigaction(SIGEMT, &act, 0);
145#endif
146  sigaction(SIGFPE, &act, 0);
147  sigaction(SIGKILL, &act, 0);
148  sigaction(SIGBUS, &act, 0);
149  sigaction(SIGSEGV, &act, 0);
150#ifdef SIGSYS
151  sigaction(SIGSYS, &act, 0);
152#endif
153  sigaction(SIGPIPE, &act, 0);
154  sigaction(SIGALRM, &act, 0);
155  sigaction(SIGTERM, &act, 0);
156  sigaction(SIGUSR1, &act, 0);
157  sigaction(SIGUSR2, &act, 0);
158  sigaction(SIGCHLD, &act, 0);
159#ifdef SIGCLD
160  sigaction(SIGCLD, &act, 0);
161#endif
162#ifdef SIGPWR
163  sigaction(SIGPWR, &act, 0);
164#endif
165  sigaction(SIGVTALRM, &act, 0);
166  sigaction(SIGPROF, &act, 0);
167  sigaction(SIGIO, &act, 0);
168  sigaction(SIGWINCH, &act, 0);
169  sigaction(SIGSTOP, &act, 0);
170  sigaction(SIGTTIN, &act, 0);
171  sigaction(SIGTTOU, &act, 0);
172  sigaction(SIGURG, &act, 0);
173#ifdef SIGLOST
174    sigaction(SIGLOST, &act, 0);
175#endif
176}
177
178/*PAGE
179 *
180 *  _CPU_Context_From_CPU_Init
181 */
182
183void _CPU_Context_From_CPU_Init()
184{
185
186#if defined(__hppa__) && defined(RTEMS_UNIXLIB_SETJMP)
187    /*
188     * HACK - set the _SYSTEM_ID to 0x20c so that setjmp/longjmp
189     * will handle the full 32 floating point registers.
190     */
191
192    {
193      extern unsigned32 _SYSTEM_ID;
194
195      _SYSTEM_ID = 0x20c;
196    }
197#endif
198
199  /*
200   *  get default values to use in _CPU_Context_Initialize()
201   */
202
203  if ( sizeof(Context_Control_overlay) < sizeof(Context_Control) )
204    _CPU_Fatal_halt( 0xdeadfood );
205 
206  (void) memset(
207    &_CPU_Context_Default_with_ISRs_enabled,
208    0,
209    sizeof(Context_Control)
210  );
211  (void) memset(
212    &_CPU_Context_Default_with_ISRs_disabled,
213    0,
214    sizeof(Context_Control)
215  );
216
217  _CPU_ISR_Set_level( 0 );
218  _CPU_Context_switch(
219    (Context_Control *) &_CPU_Context_Default_with_ISRs_enabled,
220    (Context_Control *) &_CPU_Context_Default_with_ISRs_enabled
221  );
222
223  _CPU_ISR_Set_level( 1 );
224  _CPU_Context_switch(
225    (Context_Control *) &_CPU_Context_Default_with_ISRs_disabled,
226    (Context_Control *) &_CPU_Context_Default_with_ISRs_disabled
227  );
228}
229
230/*PAGE
231 *
232 *  _CPU_Sync_io_Init
233 */
234
235void _CPU_Sync_io_Init()
236{
237  int fd;
238
239  for (fd = 0; fd < FD_SETSIZE; fd++)
240    _CPU_Sync_io_handlers[fd] = NULL;
241
242  sync_io_nfds = 0;
243  FD_ZERO(&sync_io_readfds);
244  FD_ZERO(&sync_io_writefds);
245  FD_ZERO(&sync_io_exceptfds);
246}
247
248/*PAGE
249 *
250 *  _CPU_ISR_Get_level
251 */
252
253unsigned32 _CPU_ISR_Get_level( void )
254{
255  sigset_t old_mask;
256
257  sigemptyset( &old_mask );
258  sigprocmask(SIG_BLOCK, 0, &old_mask);
259
260  if (memcmp((void *)&posix_empty_mask, (void *)&old_mask, sizeof(sigset_t)))
261      return 1;
262
263  return 0;
264}
265
266/*  _CPU_Initialize
267 *
268 *  This routine performs processor dependent initialization.
269 *
270 *  INPUT PARAMETERS:
271 *    cpu_table       - CPU table to initialize
272 *    thread_dispatch - address of disptaching routine
273 */
274
275
276void _CPU_Initialize(
277  rtems_cpu_table  *cpu_table,
278  void            (*thread_dispatch)      /* ignored on this CPU */
279)
280{
281  /*
282   *  If something happened where the public Context_Control is not
283   *  at least as large as the private Context_Control_overlay, then
284   *  we are in trouble.
285   */
286
287  if ( sizeof(Context_Control_overlay) > sizeof(Context_Control) )
288    _CPU_Fatal_error(0x100 + 1);
289
290  /*
291   *  The thread_dispatch argument is the address of the entry point
292   *  for the routine called at the end of an ISR once it has been
293   *  decided a context switch is necessary.  On some compilation
294   *  systems it is difficult to call a high-level language routine
295   *  from assembly.  This allows us to trick these systems.
296   *
297   *  If you encounter this problem save the entry point in a CPU
298   *  dependent variable.
299   */
300
301  _CPU_Thread_dispatch_pointer = thread_dispatch;
302
303  /*
304   * XXX; If there is not an easy way to initialize the FP context
305   *      during Context_Initialize, then it is usually easier to
306   *      save an "uninitialized" FP context here and copy it to
307   *      the task's during Context_Initialize.
308   */
309
310  /* XXX: FP context initialization support */
311
312  _CPU_Table = *cpu_table;
313
314  _CPU_ISR_From_CPU_Init();
315
316  _CPU_Sync_io_Init();
317
318  _CPU_Context_From_CPU_Init();
319
320}
321
322/*PAGE
323 *
324 *  _CPU_ISR_install_raw_handler
325 */
326
327void _CPU_ISR_install_raw_handler(
328  unsigned32  vector,
329  proc_ptr    new_handler,
330  proc_ptr   *old_handler
331)
332{
333  _CPU_Fatal_halt( 0xdeaddead );
334}
335
336/*PAGE
337 *
338 *  _CPU_ISR_install_vector
339 *
340 *  This kernel routine installs the RTEMS handler for the
341 *  specified vector.
342 *
343 *  Input parameters:
344 *    vector      - interrupt vector number
345 *    old_handler - former ISR for this vector number
346 *    new_handler - replacement ISR for this vector number
347 *
348 *  Output parameters:  NONE
349 *
350 */
351
352
353void _CPU_ISR_install_vector(
354  unsigned32  vector,
355  proc_ptr    new_handler,
356  proc_ptr   *old_handler
357)
358{
359   *old_handler = _ISR_Vector_table[ vector ];
360
361   /*
362    *  If the interrupt vector table is a table of pointer to isr entry
363    *  points, then we need to install the appropriate RTEMS interrupt
364    *  handler for this vector number.
365    */
366
367   /*
368    *  We put the actual user ISR address in '_ISR_vector_table'.  This will
369    *  be used by the _CPU_ISR_Handler so the user gets control.
370    */
371
372    _ISR_Vector_table[ vector ] = new_handler;
373}
374
375/*PAGE
376 *
377 *  _CPU_Install_interrupt_stack
378 */
379
380void _CPU_Install_interrupt_stack( void )
381{
382}
383
384/*PAGE
385 *
386 *  _CPU_Thread_Idle_body
387 *
388 *  Stop until we get a signal which is the logically the same thing
389 *  entering low-power or sleep mode on a real processor and waiting for
390 *  an interrupt.  This significantly reduces the consumption of host
391 *  CPU cycles which is again similar to low power mode.
392 */
393
394void _CPU_Thread_Idle_body( void )
395{
396#if CPU_SYNC_IO
397  extern void _Thread_Dispatch(void);
398  int fd;
399#endif
400
401  while (1) {
402#ifdef RTEMS_DEBUG
403    /* interrupts had better be enabled at this point! */
404    if (_CPU_ISR_Get_level() != 0)
405       abort();
406#endif
407
408    /*
409     *  Block on a select statement, the CPU interface added allow the
410     *  user to add new descriptors which are to be blocked on
411     */
412
413#if CPU_SYNC_IO
414    if (sync_io_nfds) {
415      int result;
416      fd_set readfds, writefds, exceptfds;
417
418      readfds = sync_io_readfds;
419      writefds = sync_io_writefds;
420      exceptfds = sync_io_exceptfds;
421      result = select(sync_io_nfds,
422                 &readfds,
423                 &writefds,
424                 &exceptfds,
425                 NULL);
426
427      if (result < 0) {
428        if (errno != EINTR)
429          _CPU_Fatal_error(0x200);       /* FIXME : what number should go here !! */
430        _Thread_Dispatch();
431        continue;
432      }
433
434      for (fd = 0; fd < sync_io_nfds; fd++) {
435        boolean read = FD_ISSET(fd, &readfds);
436        boolean write = FD_ISSET(fd, &writefds);
437        boolean except = FD_ISSET(fd, &exceptfds);
438
439        if (_CPU_Sync_io_handlers[fd] && (read || write || except))
440          _CPU_Sync_io_handlers[fd](fd, read, write, except);
441      }
442
443      _Thread_Dispatch();
444    } else
445      pause();
446#else
447    pause();
448#endif
449
450  }
451
452}
453
454/*PAGE
455 *
456 *  _CPU_Context_Initialize
457 */
458
459void _CPU_Context_Initialize(
460  Context_Control  *_the_context,
461  unsigned32       *_stack_base,
462  unsigned32        _size,
463  unsigned32        _new_level,
464  void             *_entry_point,
465  boolean           _is_fp
466)
467{
468  unsigned32  *addr;
469  unsigned32   jmp_addr;
470  unsigned32   _stack_low;   /* lowest "stack aligned" address */
471  unsigned32   _stack_high;  /* highest "stack aligned" address */
472  unsigned32   _the_size;
473
474  jmp_addr = (unsigned32) _entry_point;
475
476  /*
477   *  On CPUs with stacks which grow down, we build the stack
478   *  based on the _stack_high address.  On CPUs with stacks which
479   *  grow up, we build the stack based on the _stack_low address.
480   */
481
482  _stack_low = (unsigned32)(_stack_base) + CPU_STACK_ALIGNMENT - 1;
483  _stack_low &= ~(CPU_STACK_ALIGNMENT - 1);
484
485  _stack_high = (unsigned32)(_stack_base) + _size;
486  _stack_high &= ~(CPU_STACK_ALIGNMENT - 1);
487
488  if (_stack_high > _stack_low)
489    _the_size = _stack_high - _stack_low;
490  else
491    _the_size = _stack_low - _stack_high;
492
493  /*
494   * Slam our jmp_buf template into the context we are creating
495   */
496
497  if ( _new_level == 0 )
498      *(Context_Control_overlay *)_the_context =
499                         _CPU_Context_Default_with_ISRs_enabled;
500  else
501      *(Context_Control_overlay *)_the_context = 
502                         _CPU_Context_Default_with_ISRs_disabled;
503
504  addr = (unsigned32 *)_the_context;
505
506#if defined(__hppa__)
507  *(addr + RP_OFF) = jmp_addr;
508  *(addr + SP_OFF) = (unsigned32)(_stack_low + CPU_FRAME_SIZE);
509
510  /*
511   * See if we are using shared libraries by checking
512   * bit 30 in 24 off of newp. If bit 30 is set then
513   * we are using shared libraries and the jump address
514   * points to the pointer, so we put that into rp instead.
515   */
516
517  if (jmp_addr & 0x40000000) {
518    jmp_addr &= 0xfffffffc;
519     *(addr + RP_OFF) = *(unsigned32 *)jmp_addr;
520  }
521#elif defined(__sparc__)
522
523  /*
524   *  See /usr/include/sys/stack.h in Solaris 2.3 for a nice
525   *  diagram of the stack.
526   */
527
528  asm ("ta  0x03");            /* flush registers */
529
530  *(addr + RP_OFF) = jmp_addr + ADDR_ADJ_OFFSET;
531  *(addr + SP_OFF) = (unsigned32)(_stack_high - CPU_FRAME_SIZE);
532  *(addr + FP_OFF) = (unsigned32)(_stack_high);
533
534#elif defined(__i386__)
535
536    /*
537     *  This information was gathered by disassembling setjmp().
538     */
539
540    {
541      unsigned32 stack_ptr;
542
543      stack_ptr = _stack_high - CPU_FRAME_SIZE;
544
545      *(addr + EBX_OFF) = 0xFEEDFEED;
546      *(addr + ESI_OFF) = 0xDEADDEAD;
547      *(addr + EDI_OFF) = 0xDEAFDEAF;
548      *(addr + EBP_OFF) = stack_ptr;
549      *(addr + ESP_OFF) = stack_ptr;
550      *(addr + RET_OFF) = jmp_addr;
551
552      addr = (unsigned32 *) stack_ptr;
553
554      addr[ 0 ] = jmp_addr;
555      addr[ 1 ] = (unsigned32) stack_ptr;
556      addr[ 2 ] = (unsigned32) stack_ptr;
557    }
558
559#else
560#error "UNKNOWN CPU!!!"
561#endif
562
563}
564
565/*PAGE
566 *
567 *  _CPU_Context_restore
568 */
569
570void _CPU_Context_restore(
571  Context_Control  *next
572)
573{
574  Context_Control_overlay *nextp = (Context_Control_overlay *)next;
575
576  _CPU_ISR_Enable(nextp->isr_level);
577  longjmp( nextp->regs, 0 );
578}
579
580/*PAGE
581 *
582 *  _CPU_Context_switch
583 */
584
585static void do_jump(
586  Context_Control_overlay *currentp,
587  Context_Control_overlay *nextp
588);
589
590void _CPU_Context_switch(
591  Context_Control  *current,
592  Context_Control  *next
593)
594{
595  Context_Control_overlay *currentp = (Context_Control_overlay *)current;
596  Context_Control_overlay *nextp = (Context_Control_overlay *)next;
597#if 0
598  int status;
599#endif
600
601  currentp->isr_level = _CPU_ISR_Disable_support();
602
603  do_jump( currentp, nextp );
604
605#if 0
606  if (sigsetjmp(currentp->regs, 1) == 0) {    /* Save the current context */
607     siglongjmp(nextp->regs, 0);           /* Switch to the new context */
608     _Internal_error_Occurred(
609         INTERNAL_ERROR_CORE,
610         TRUE,
611         status
612       );
613  }
614#endif
615
616#ifdef RTEMS_DEBUG
617    if (_CPU_ISR_Get_level() == 0)
618       abort();
619#endif
620
621  _CPU_ISR_Enable(currentp->isr_level);
622}
623
624static void do_jump(
625  Context_Control_overlay *currentp,
626  Context_Control_overlay *nextp
627)
628{
629  int status;
630
631  if (setjmp(currentp->regs) == 0) {    /* Save the current context */
632     longjmp(nextp->regs, 0);           /* Switch to the new context */
633     _Internal_error_Occurred(
634         INTERNAL_ERROR_CORE,
635         TRUE,
636         status
637       );
638  }
639}
640
641/*PAGE
642 *
643 *  _CPU_Save_float_context
644 */
645
646void _CPU_Save_float_context(
647  Context_Control_fp *fp_context
648)
649{
650}
651
652/*PAGE
653 *
654 *  _CPU_Restore_float_context
655 */
656
657void _CPU_Restore_float_context(
658  Context_Control_fp *fp_context
659)
660{
661}
662
663/*PAGE
664 *
665 *  _CPU_ISR_Disable_support
666 */
667
668unsigned32 _CPU_ISR_Disable_support(void)
669{
670  int status;
671  sigset_t  old_mask;
672
673  sigemptyset( &old_mask );
674  status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, &old_mask);
675  if ( status )
676    _Internal_error_Occurred(
677      INTERNAL_ERROR_CORE,
678      TRUE,
679      status
680    );
681
682  if (memcmp((void *)&posix_empty_mask, (void *)&old_mask, sizeof(sigset_t)))
683    return 1;
684
685  return 0;
686}
687
688/*PAGE
689 *
690 *  _CPU_ISR_Enable
691 */
692
693void _CPU_ISR_Enable(
694  unsigned32 level
695)
696{
697  int status;
698
699  if (level == 0)
700    status = sigprocmask(SIG_UNBLOCK, &_CPU_Signal_mask, 0);
701  else
702    status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, 0);
703
704  if ( status )
705    _Internal_error_Occurred(
706      INTERNAL_ERROR_CORE,
707      TRUE,
708      status
709    );
710}
711
712/*PAGE
713 *
714 *  _CPU_ISR_Handler
715 *
716 *  External interrupt handler.
717 *  This is installed as a UNIX signal handler.
718 *  It vectors out to specific user interrupt handlers.
719 */
720
721void _CPU_ISR_Handler(int vector)
722{
723  extern void        _Thread_Dispatch(void);
724  extern unsigned32  _Thread_Dispatch_disable_level;
725  extern boolean     _Context_Switch_necessary;
726
727  if (_ISR_Nest_level++ == 0) {
728      /* switch to interrupt stack */
729  }
730
731  _Thread_Dispatch_disable_level++;
732
733  if (_ISR_Vector_table[vector]) {
734     _ISR_Vector_table[vector](vector);
735  } else {
736     _CPU_Stray_signal(vector);
737  }
738
739  if (_ISR_Nest_level-- == 0) {
740      /* switch back to original stack */
741  }
742
743  _Thread_Dispatch_disable_level--;
744
745  if (_Thread_Dispatch_disable_level == 0 &&
746      (_Context_Switch_necessary || _ISR_Signals_to_thread_executing)) {
747      _ISR_Signals_to_thread_executing = FALSE;
748      _CPU_ISR_Enable(0);
749      _Thread_Dispatch();
750  }
751}
752
753/*PAGE
754 *
755 *  _CPU_Stray_signal
756 */
757
758void _CPU_Stray_signal(int sig_num)
759{
760  char buffer[ 4 ];
761
762  /*
763   * print "stray" msg about ones which that might mean something
764   * Avoid using the stdio section of the library.
765   * The following is generally safe.
766   */
767
768  switch (sig_num)
769  {
770#ifdef SIGCLD
771      case SIGCLD:
772          break;
773#endif
774      default:
775      {
776        /*
777         *  We avoid using the stdio section of the library.
778         *  The following is generally safe
779         */
780
781        int digit;
782        int number = sig_num;
783        int len = 0;
784
785        digit = number / 100;
786        number %= 100;
787        if (digit) buffer[len++] = '0' + digit;
788
789        digit = number / 10;
790        number %= 10;
791        if (digit || len) buffer[len++] = '0' + digit;
792
793        digit = number;
794        buffer[len++] = '0' + digit;
795
796        buffer[ len++ ] = '\n';
797
798        write( 2, "Stray signal ", 13 );
799        write( 2, buffer, len );
800
801      }
802  }
803
804  /*
805   * If it was a "fatal" signal, then exit here
806   * If app code has installed a hander for one of these, then
807   * we won't call _CPU_Stray_signal, so this is ok.
808   */
809
810  switch (sig_num) {
811      case SIGINT:
812      case SIGHUP:
813      case SIGQUIT:
814      case SIGILL:
815#ifdef SIGEMT
816      case SIGEMT:
817#endif
818      case SIGKILL:
819      case SIGBUS:
820      case SIGSEGV:
821      case SIGTERM:
822#if !defined(__CYGWIN__)
823      case SIGIOT:
824#endif
825        _CPU_Fatal_error(0x100 + sig_num);
826  }
827}
828
829/*PAGE
830 *
831 *  _CPU_Fatal_error
832 */
833
834void _CPU_Fatal_error(unsigned32 error)
835{
836  setitimer(ITIMER_REAL, 0, 0);
837
838  if ( error ) {
839#ifdef RTEMS_DEBUG
840    abort();
841#endif
842    if (getenv("RTEMS_DEBUG"))
843      abort();
844  }
845
846  _exit(error);
847}
848
849/*
850 *  Special Purpose Routines to hide the use of UNIX system calls.
851 */
852
853int _CPU_Set_sync_io_handler(
854  int fd,
855  boolean read,
856  boolean write,
857  boolean except,
858  rtems_sync_io_handler handler
859)
860{
861  if ((fd < FD_SETSIZE) && (_CPU_Sync_io_handlers[fd] == NULL)) {
862    if (read)
863      FD_SET(fd, &sync_io_readfds);
864    else
865      FD_CLR(fd, &sync_io_readfds);
866    if (write)
867      FD_SET(fd, &sync_io_writefds);
868    else
869      FD_CLR(fd, &sync_io_writefds);
870    if (except)
871      FD_SET(fd, &sync_io_exceptfds);
872    else
873      FD_CLR(fd, &sync_io_exceptfds);
874    _CPU_Sync_io_handlers[fd] = handler;
875    if ((fd + 1) > sync_io_nfds)
876      sync_io_nfds = fd + 1;
877    return 0;
878  }
879  return -1;
880}
881
882int _CPU_Clear_sync_io_handler(
883  int fd
884)
885{
886  if ((fd < FD_SETSIZE) && _CPU_Sync_io_handlers[fd]) {
887    FD_CLR(fd, &sync_io_readfds);
888    FD_CLR(fd, &sync_io_writefds);
889    FD_CLR(fd, &sync_io_exceptfds);
890    _CPU_Sync_io_handlers[fd] = NULL;
891    sync_io_nfds = 0;
892    for (fd = 0; fd < FD_SETSIZE; fd++)
893      if (FD_ISSET(fd, &sync_io_readfds) ||
894          FD_ISSET(fd, &sync_io_writefds) ||
895          FD_ISSET(fd, &sync_io_exceptfds))
896        sync_io_nfds = fd + 1;
897    return 0;
898  }
899  return -1;
900}
901
902int _CPU_Get_clock_vector( void )
903{
904  return SIGALRM;
905}
906
907void _CPU_Start_clock(
908  int microseconds
909)
910{
911  struct itimerval  new;
912
913  new.it_value.tv_sec = 0;
914  new.it_value.tv_usec = microseconds;
915  new.it_interval.tv_sec = 0;
916  new.it_interval.tv_usec = microseconds;
917
918  setitimer(ITIMER_REAL, &new, 0);
919}
920
921void _CPU_Stop_clock( void )
922{
923  struct itimerval  new;
924  struct sigaction  act;
925
926  /*
927   * Set the SIGALRM signal to ignore any last
928   * signals that might come in while we are
929   * disarming the timer and removing the interrupt
930   * vector.
931   */
932
933  (void) memset(&act, 0, sizeof(act));
934  act.sa_handler = SIG_IGN;
935
936  sigaction(SIGALRM, &act, 0);
937
938  (void) memset(&new, 0, sizeof(new));
939  setitimer(ITIMER_REAL, &new, 0);
940}
941
942extern void fix_syscall_errno( void );
943
944#if defined(RTEMS_MULTIPROCESSING)
945int  _CPU_SHM_Semid;
946
947void _CPU_SHM_Init(
948  unsigned32   maximum_nodes,
949  boolean      is_master_node,
950  void       **shm_address,
951  unsigned32  *shm_length
952)
953{
954  int          i;
955  int          shmid;
956  char        *shm_addr;
957  key_t        shm_key;
958  key_t        sem_key;
959  int          status = 0;  /* to avoid unitialized warnings */
960  int          shm_size;
961
962  if (getenv("RTEMS_SHM_KEY"))
963    shm_key = strtol(getenv("RTEMS_SHM_KEY"), 0, 0);
964  else
965#ifdef RTEMS_SHM_KEY
966    shm_key = RTEMS_SHM_KEY;
967#else
968    shm_key = 0xa000;
969#endif
970
971    if (getenv("RTEMS_SHM_SIZE"))
972      shm_size = strtol(getenv("RTEMS_SHM_SIZE"), 0, 0);
973    else
974#ifdef RTEMS_SHM_SIZE
975      shm_size = RTEMS_SHM_SIZE;
976#else
977      shm_size = 64 * 1024;
978#endif
979
980    if (getenv("RTEMS_SHM_SEMAPHORE_KEY"))
981      sem_key = strtol(getenv("RTEMS_SHM_SEMAPHORE_KEY"), 0, 0);
982    else
983#ifdef RTEMS_SHM_SEMAPHORE_KEY
984      sem_key = RTEMS_SHM_SEMAPHORE_KEY;
985#else
986      sem_key = 0xa001;
987#endif
988
989    shmid = shmget(shm_key, shm_size, IPC_CREAT | 0660);
990    if ( shmid == -1 ) {
991      fix_syscall_errno(); /* in case of newlib */
992      perror( "shmget" );
993      _CPU_Fatal_halt( 0xdead0001 );
994    }
995
996    shm_addr = shmat(shmid, (char *)0, SHM_RND);
997    if ( shm_addr == (void *)-1 ) {
998      fix_syscall_errno(); /* in case of newlib */
999      perror( "shmat" );
1000      _CPU_Fatal_halt( 0xdead0002 );
1001    }
1002
1003    _CPU_SHM_Semid = semget(sem_key, maximum_nodes + 1, IPC_CREAT | 0660);
1004    if ( _CPU_SHM_Semid == -1 ) {
1005      fix_syscall_errno(); /* in case of newlib */
1006      perror( "semget" );
1007      _CPU_Fatal_halt( 0xdead0003 );
1008    }
1009
1010    if ( is_master_node ) {
1011      for ( i=0 ; i <= maximum_nodes ; i++ ) {
1012#if !HAS_UNION_SEMUN
1013        union semun {
1014          int val;
1015          struct semid_ds *buf;
1016          unsigned short int *array;
1017#if defined(__linux__)
1018          struct seminfo *__buf;
1019#endif         
1020        } ;
1021#endif
1022        union semun help ;
1023        help.val = 1;
1024        status = semctl( _CPU_SHM_Semid, i, SETVAL, help );
1025
1026        fix_syscall_errno(); /* in case of newlib */
1027        if ( status == -1 ) {
1028          _CPU_Fatal_halt( 0xdead0004 );
1029        }
1030      }
1031    }
1032
1033  *shm_address = shm_addr;
1034  *shm_length = shm_size;
1035
1036}
1037#endif
1038
1039int _CPU_Get_pid( void )
1040{
1041  return getpid();
1042}
1043
1044#if defined(RTEMS_MULTIPROCESSING)
1045/*
1046 * Define this to use signals for MPCI shared memory driver.
1047 * If undefined, the shared memory driver will poll from the
1048 * clock interrupt.
1049 * Ref: ../shmsupp/getcfg.c
1050 *
1051 * BEWARE:: many UN*X kernels and debuggers become severely confused when
1052 *          debugging programs which use signals.  The problem is *much*
1053 *          worse when using multiple signals, since ptrace(2) tends to
1054 *          drop all signals except 1 in the case of multiples.
1055 *          On hpux9, this problem was so bad, we couldn't use interrupts
1056 *          with the shared memory driver if we ever hoped to debug
1057 *          RTEMS programs.
1058 *          Maybe systems that use /proc don't have this problem...
1059 */
1060
1061
1062int _CPU_SHM_Get_vector( void )
1063{
1064#ifdef CPU_USE_SHM_INTERRUPTS
1065  return SIGUSR1;
1066#else
1067  return 0;
1068#endif
1069}
1070
1071void _CPU_SHM_Send_interrupt(
1072  int pid,
1073  int vector
1074)
1075{
1076  kill((pid_t) pid, vector);
1077}
1078
1079void _CPU_SHM_Lock(
1080  int semaphore
1081)
1082{
1083  struct sembuf sb;
1084
1085  sb.sem_num = semaphore;
1086  sb.sem_op  = -1;
1087  sb.sem_flg = 0;
1088
1089  while (1) {
1090    int status = -1;
1091
1092    status = semop(_CPU_SHM_Semid, &sb, 1);
1093    if ( status >= 0 )
1094      break;
1095    if ( status == -1 ) {
1096       fix_syscall_errno();    /* in case of newlib */
1097        if (errno == EINTR)
1098            continue;
1099        perror("shm lock");
1100        _CPU_Fatal_halt( 0xdead0005 );
1101    }
1102  }
1103
1104}
1105
1106void _CPU_SHM_Unlock(
1107  int semaphore
1108)
1109{
1110  struct sembuf  sb;
1111  int            status;
1112
1113  sb.sem_num = semaphore;
1114  sb.sem_op  = 1;
1115  sb.sem_flg = 0;
1116
1117  while (1) {
1118    status = semop(_CPU_SHM_Semid, &sb, 1);
1119    if ( status >= 0 )
1120      break;
1121
1122    if ( status == -1 ) {
1123      fix_syscall_errno();    /* in case of newlib */
1124      if (errno == EINTR)
1125          continue;
1126      perror("shm unlock");
1127      _CPU_Fatal_halt( 0xdead0006 );
1128    }
1129  }
1130
1131}
1132#endif
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