source: rtems/c/src/exec/score/cpu/unix/cpu.c @ c094542

4.104.114.84.95
Last change on this file since c094542 was c094542, checked in by Joel Sherrill <joel.sherrill@…>, on Nov 16, 1999 at 4:07:17 PM

Only check for System V IPC if multiprocessing is enabled. The unix
port only uses System V IPC for shared memory and semaphores to
communicate between nodes in a multiprocessor configuration. If you
disable multiprocessing, then this code should be unused. Thus systems
like Cygwin which are POSIX but do not support System V IPC should
not work.

  • Property mode set to 100644
File size: 23.2 KB
Line 
1/*
2 *  UNIX Simulator Dependent Source
3 *
4 *  COPYRIGHT (c) 1994,95 by Division Incorporated
5 *
6 *  The license and distribution terms for this file may be
7 *  found in the file LICENSE in this distribution or at
8 *  http://www.OARcorp.com/rtems/license.html.
9 *
10 *  $Id$
11 */
12
13#include <rtems/system.h>
14#include <rtems/score/isr.h>
15#include <rtems/score/interr.h>
16
17#if defined(__linux__)
18#define _XOPEN_SOURCE
19#define MALLOC_0_RETURNS_NULL
20#endif
21
22#include <sys/types.h>
23#include <sys/times.h>
24#include <stdio.h>
25#include <stdlib.h>
26#include <setjmp.h>
27#include <signal.h>
28#include <time.h>
29#include <sys/time.h>
30#include <errno.h>
31#include <unistd.h>
32#if defined(RTEMS_MULTIPROCESSING)
33#include <sys/ipc.h>
34#include <sys/shm.h>
35#include <sys/sem.h>
36#endif
37#include <string.h>   /* memset */
38
39#ifndef SA_RESTART
40#define SA_RESTART 0
41#endif
42
43typedef struct {
44  jmp_buf   regs;
45  int  isr_level;
46} Context_Control_overlay;
47
48void  _CPU_Signal_initialize(void);
49void  _CPU_Stray_signal(int);
50void  _CPU_ISR_Handler(int);
51
52static sigset_t _CPU_Signal_mask;
53static Context_Control_overlay
54          _CPU_Context_Default_with_ISRs_enabled CPU_STRUCTURE_ALIGNMENT;
55static Context_Control_overlay
56          _CPU_Context_Default_with_ISRs_disabled CPU_STRUCTURE_ALIGNMENT;
57
58/*
59 * Sync IO support, an entry for each fd that can be set
60 */
61
62void  _CPU_Sync_io_Init();
63
64static rtems_sync_io_handler _CPU_Sync_io_handlers[FD_SETSIZE];
65static int sync_io_nfds;
66static fd_set sync_io_readfds;
67static fd_set sync_io_writefds;
68static fd_set sync_io_exceptfds;
69
70/*
71 * Which cpu are we? Used by libcpu and libbsp.
72 */
73
74int cpu_number;
75
76/*PAGE
77 *
78 *  _CPU_ISR_From_CPU_Init
79 */
80
81sigset_t  posix_empty_mask;
82
83void _CPU_ISR_From_CPU_Init()
84{
85  unsigned32        i;
86  proc_ptr          old_handler;
87
88  /*
89   * Generate an empty mask to be used by disable_support
90   */
91
92  sigemptyset(&posix_empty_mask);
93
94  /*
95   * Block all the signals except SIGTRAP for the debugger
96   * and fatal error signals.
97   */
98
99  (void) sigfillset(&_CPU_Signal_mask);
100  (void) sigdelset(&_CPU_Signal_mask, SIGTRAP);
101  (void) sigdelset(&_CPU_Signal_mask, SIGABRT);
102  (void) sigdelset(&_CPU_Signal_mask, SIGIOT);
103  (void) sigdelset(&_CPU_Signal_mask, SIGCONT);
104  (void) sigdelset(&_CPU_Signal_mask, SIGSEGV);
105  (void) sigdelset(&_CPU_Signal_mask, SIGBUS);
106  (void) sigdelset(&_CPU_Signal_mask, SIGFPE);
107
108  _CPU_ISR_Enable(1);
109
110  /*
111   * Set the handler for all signals to be signal_handler
112   * which will then vector out to the correct handler
113   * for whichever signal actually happened. Initially
114   * set the vectors to the stray signal handler.
115   */
116
117  for (i = 0; i < CPU_INTERRUPT_NUMBER_OF_VECTORS; i++)
118      (void)_CPU_ISR_install_vector(i, _CPU_Stray_signal, &old_handler);
119
120  _CPU_Signal_initialize();
121}
122
123void _CPU_Signal_initialize( void )
124{
125  struct sigaction  act;
126  sigset_t          mask;
127
128  /* mark them all active except for TraceTrap  and Abort */
129
130  mask = _CPU_Signal_mask;
131  sigprocmask(SIG_UNBLOCK, &mask, 0);
132
133  act.sa_handler = _CPU_ISR_Handler;
134  act.sa_mask = mask;
135  act.sa_flags = SA_RESTART;
136
137  sigaction(SIGHUP, &act, 0);
138  sigaction(SIGINT, &act, 0);
139  sigaction(SIGQUIT, &act, 0);
140  sigaction(SIGILL, &act, 0);
141#ifdef SIGEMT
142  sigaction(SIGEMT, &act, 0);
143#endif
144  sigaction(SIGFPE, &act, 0);
145  sigaction(SIGKILL, &act, 0);
146  sigaction(SIGBUS, &act, 0);
147  sigaction(SIGSEGV, &act, 0);
148#ifdef SIGSYS
149  sigaction(SIGSYS, &act, 0);
150#endif
151  sigaction(SIGPIPE, &act, 0);
152  sigaction(SIGALRM, &act, 0);
153  sigaction(SIGTERM, &act, 0);
154  sigaction(SIGUSR1, &act, 0);
155  sigaction(SIGUSR2, &act, 0);
156  sigaction(SIGCHLD, &act, 0);
157#ifdef SIGCLD
158  sigaction(SIGCLD, &act, 0);
159#endif
160#ifdef SIGPWR
161  sigaction(SIGPWR, &act, 0);
162#endif
163  sigaction(SIGVTALRM, &act, 0);
164  sigaction(SIGPROF, &act, 0);
165  sigaction(SIGIO, &act, 0);
166  sigaction(SIGWINCH, &act, 0);
167  sigaction(SIGSTOP, &act, 0);
168  sigaction(SIGTTIN, &act, 0);
169  sigaction(SIGTTOU, &act, 0);
170  sigaction(SIGURG, &act, 0);
171#ifdef SIGLOST
172    sigaction(SIGLOST, &act, 0);
173#endif
174}
175
176/*PAGE
177 *
178 *  _CPU_Context_From_CPU_Init
179 */
180
181void _CPU_Context_From_CPU_Init()
182{
183
184#if defined(__hppa__) && defined(RTEMS_UNIXLIB_SETJMP)
185    /*
186     * HACK - set the _SYSTEM_ID to 0x20c so that setjmp/longjmp
187     * will handle the full 32 floating point registers.
188     */
189
190    {
191      extern unsigned32 _SYSTEM_ID;
192
193      _SYSTEM_ID = 0x20c;
194    }
195#endif
196
197  /*
198   *  get default values to use in _CPU_Context_Initialize()
199   */
200
201
202  (void) memset(
203    &_CPU_Context_Default_with_ISRs_enabled,
204    0,
205    sizeof(Context_Control)
206  );
207  (void) memset(
208    &_CPU_Context_Default_with_ISRs_disabled,
209    0,
210    sizeof(Context_Control)
211  );
212
213  _CPU_ISR_Set_level( 0 );
214  _CPU_Context_switch(
215    (Context_Control *) &_CPU_Context_Default_with_ISRs_enabled,
216    (Context_Control *) &_CPU_Context_Default_with_ISRs_enabled
217  );
218
219  _CPU_ISR_Set_level( 1 );
220  _CPU_Context_switch(
221    (Context_Control *) &_CPU_Context_Default_with_ISRs_disabled,
222    (Context_Control *) &_CPU_Context_Default_with_ISRs_disabled
223  );
224}
225
226/*PAGE
227 *
228 *  _CPU_Sync_io_Init
229 */
230
231void _CPU_Sync_io_Init()
232{
233  int fd;
234
235  for (fd = 0; fd < FD_SETSIZE; fd++)
236    _CPU_Sync_io_handlers[fd] = NULL;
237
238  sync_io_nfds = 0;
239  FD_ZERO(&sync_io_readfds);
240  FD_ZERO(&sync_io_writefds);
241  FD_ZERO(&sync_io_exceptfds);
242}
243
244/*PAGE
245 *
246 *  _CPU_ISR_Get_level
247 */
248
249unsigned32 _CPU_ISR_Get_level( void )
250{
251  sigset_t old_mask;
252
253  sigemptyset( &old_mask );
254  sigprocmask(SIG_BLOCK, 0, &old_mask);
255
256  if (memcmp((void *)&posix_empty_mask, (void *)&old_mask, sizeof(sigset_t)))
257      return 1;
258
259  return 0;
260}
261
262/*  _CPU_Initialize
263 *
264 *  This routine performs processor dependent initialization.
265 *
266 *  INPUT PARAMETERS:
267 *    cpu_table       - CPU table to initialize
268 *    thread_dispatch - address of disptaching routine
269 */
270
271
272void _CPU_Initialize(
273  rtems_cpu_table  *cpu_table,
274  void            (*thread_dispatch)      /* ignored on this CPU */
275)
276{
277  /*
278   *  The thread_dispatch argument is the address of the entry point
279   *  for the routine called at the end of an ISR once it has been
280   *  decided a context switch is necessary.  On some compilation
281   *  systems it is difficult to call a high-level language routine
282   *  from assembly.  This allows us to trick these systems.
283   *
284   *  If you encounter this problem save the entry point in a CPU
285   *  dependent variable.
286   */
287
288  _CPU_Thread_dispatch_pointer = thread_dispatch;
289
290  /*
291   * XXX; If there is not an easy way to initialize the FP context
292   *      during Context_Initialize, then it is usually easier to
293   *      save an "uninitialized" FP context here and copy it to
294   *      the task's during Context_Initialize.
295   */
296
297  /* XXX: FP context initialization support */
298
299  _CPU_Table = *cpu_table;
300
301  _CPU_ISR_From_CPU_Init();
302
303  _CPU_Sync_io_Init();
304
305  _CPU_Context_From_CPU_Init();
306
307}
308
309/*PAGE
310 *
311 *  _CPU_ISR_install_raw_handler
312 */
313
314void _CPU_ISR_install_raw_handler(
315  unsigned32  vector,
316  proc_ptr    new_handler,
317  proc_ptr   *old_handler
318)
319{
320  _CPU_Fatal_halt( 0xdeaddead );
321}
322
323/*PAGE
324 *
325 *  _CPU_ISR_install_vector
326 *
327 *  This kernel routine installs the RTEMS handler for the
328 *  specified vector.
329 *
330 *  Input parameters:
331 *    vector      - interrupt vector number
332 *    old_handler - former ISR for this vector number
333 *    new_handler - replacement ISR for this vector number
334 *
335 *  Output parameters:  NONE
336 *
337 */
338
339
340void _CPU_ISR_install_vector(
341  unsigned32  vector,
342  proc_ptr    new_handler,
343  proc_ptr   *old_handler
344)
345{
346   *old_handler = _ISR_Vector_table[ vector ];
347
348   /*
349    *  If the interrupt vector table is a table of pointer to isr entry
350    *  points, then we need to install the appropriate RTEMS interrupt
351    *  handler for this vector number.
352    */
353
354   /*
355    *  We put the actual user ISR address in '_ISR_vector_table'.  This will
356    *  be used by the _CPU_ISR_Handler so the user gets control.
357    */
358
359    _ISR_Vector_table[ vector ] = new_handler;
360}
361
362/*PAGE
363 *
364 *  _CPU_Install_interrupt_stack
365 */
366
367void _CPU_Install_interrupt_stack( void )
368{
369}
370
371/*PAGE
372 *
373 *  _CPU_Thread_Idle_body
374 *
375 *  Stop until we get a signal which is the logically the same thing
376 *  entering low-power or sleep mode on a real processor and waiting for
377 *  an interrupt.  This significantly reduces the consumption of host
378 *  CPU cycles which is again similar to low power mode.
379 */
380
381void _CPU_Thread_Idle_body( void )
382{
383#if CPU_SYNC_IO
384  extern void _Thread_Dispatch(void);
385  int fd;
386#endif
387
388  while (1) {
389#ifdef RTEMS_DEBUG
390    /* interrupts had better be enabled at this point! */
391    if (_CPU_ISR_Get_level() != 0)
392       abort();
393#endif
394
395    /*
396     *  Block on a select statement, the CPU interface added allow the
397     *  user to add new descriptors which are to be blocked on
398     */
399
400#if CPU_SYNC_IO
401    if (sync_io_nfds) {
402      int result;
403      fd_set readfds, writefds, exceptfds;
404
405      readfds = sync_io_readfds;
406      writefds = sync_io_writefds;
407      exceptfds = sync_io_exceptfds;
408      result = select(sync_io_nfds,
409                 &readfds,
410                 &writefds,
411                 &exceptfds,
412                 NULL);
413
414      if (result < 0) {
415        if (errno != EINTR)
416          _CPU_Fatal_error(0x200);       /* FIXME : what number should go here !! */
417        _Thread_Dispatch();
418        continue;
419      }
420
421      for (fd = 0; fd < sync_io_nfds; fd++) {
422        boolean read = FD_ISSET(fd, &readfds);
423        boolean write = FD_ISSET(fd, &writefds);
424        boolean except = FD_ISSET(fd, &exceptfds);
425
426        if (_CPU_Sync_io_handlers[fd] && (read || write || except))
427          _CPU_Sync_io_handlers[fd](fd, read, write, except);
428      }
429
430      _Thread_Dispatch();
431    } else
432      pause();
433#else
434    pause();
435#endif
436
437  }
438
439}
440
441/*PAGE
442 *
443 *  _CPU_Context_Initialize
444 */
445
446void _CPU_Context_Initialize(
447  Context_Control  *_the_context,
448  unsigned32       *_stack_base,
449  unsigned32        _size,
450  unsigned32        _new_level,
451  void             *_entry_point,
452  boolean           _is_fp
453)
454{
455  unsigned32  *addr;
456  unsigned32   jmp_addr;
457  unsigned32   _stack_low;   /* lowest "stack aligned" address */
458  unsigned32   _stack_high;  /* highest "stack aligned" address */
459  unsigned32   _the_size;
460
461  jmp_addr = (unsigned32) _entry_point;
462
463  /*
464   *  On CPUs with stacks which grow down, we build the stack
465   *  based on the _stack_high address.  On CPUs with stacks which
466   *  grow up, we build the stack based on the _stack_low address.
467   */
468
469  _stack_low = (unsigned32)(_stack_base) + CPU_STACK_ALIGNMENT - 1;
470  _stack_low &= ~(CPU_STACK_ALIGNMENT - 1);
471
472  _stack_high = (unsigned32)(_stack_base) + _size;
473  _stack_high &= ~(CPU_STACK_ALIGNMENT - 1);
474
475  if (_stack_high > _stack_low)
476    _the_size = _stack_high - _stack_low;
477  else
478    _the_size = _stack_low - _stack_high;
479
480  /*
481   * Slam our jmp_buf template into the context we are creating
482   */
483
484  if ( _new_level == 0 )
485      *_the_context = *(Context_Control *)
486                         &_CPU_Context_Default_with_ISRs_enabled;
487  else
488      *_the_context = *(Context_Control *)
489                         &_CPU_Context_Default_with_ISRs_disabled;
490
491  addr = (unsigned32 *)_the_context;
492
493#if defined(__hppa__)
494  *(addr + RP_OFF) = jmp_addr;
495  *(addr + SP_OFF) = (unsigned32)(_stack_low + CPU_FRAME_SIZE);
496
497  /*
498   * See if we are using shared libraries by checking
499   * bit 30 in 24 off of newp. If bit 30 is set then
500   * we are using shared libraries and the jump address
501   * points to the pointer, so we put that into rp instead.
502   */
503
504  if (jmp_addr & 0x40000000) {
505    jmp_addr &= 0xfffffffc;
506     *(addr + RP_OFF) = *(unsigned32 *)jmp_addr;
507  }
508#elif defined(__sparc__)
509
510  /*
511   *  See /usr/include/sys/stack.h in Solaris 2.3 for a nice
512   *  diagram of the stack.
513   */
514
515  asm ("ta  0x03");            /* flush registers */
516
517  *(addr + RP_OFF) = jmp_addr + ADDR_ADJ_OFFSET;
518  *(addr + SP_OFF) = (unsigned32)(_stack_high - CPU_FRAME_SIZE);
519  *(addr + FP_OFF) = (unsigned32)(_stack_high);
520
521#elif defined(__i386__)
522
523    /*
524     *  This information was gathered by disassembling setjmp().
525     */
526
527    {
528      unsigned32 stack_ptr;
529
530      stack_ptr = _stack_high - CPU_FRAME_SIZE;
531
532      *(addr + EBX_OFF) = 0xFEEDFEED;
533      *(addr + ESI_OFF) = 0xDEADDEAD;
534      *(addr + EDI_OFF) = 0xDEAFDEAF;
535      *(addr + EBP_OFF) = stack_ptr;
536      *(addr + ESP_OFF) = stack_ptr;
537      *(addr + RET_OFF) = jmp_addr;
538
539      addr = (unsigned32 *) stack_ptr;
540
541      addr[ 0 ] = jmp_addr;
542      addr[ 1 ] = (unsigned32) stack_ptr;
543      addr[ 2 ] = (unsigned32) stack_ptr;
544    }
545
546#else
547#error "UNKNOWN CPU!!!"
548#endif
549
550}
551
552/*PAGE
553 *
554 *  _CPU_Context_restore
555 */
556
557void _CPU_Context_restore(
558  Context_Control  *next
559)
560{
561  Context_Control_overlay *nextp = (Context_Control_overlay *)next;
562
563  _CPU_ISR_Enable(nextp->isr_level);
564  longjmp( nextp->regs, 0 );
565}
566
567/*PAGE
568 *
569 *  _CPU_Context_switch
570 */
571
572static void do_jump(
573  Context_Control_overlay *currentp,
574  Context_Control_overlay *nextp
575);
576
577void _CPU_Context_switch(
578  Context_Control  *current,
579  Context_Control  *next
580)
581{
582  Context_Control_overlay *currentp = (Context_Control_overlay *)current;
583  Context_Control_overlay *nextp = (Context_Control_overlay *)next;
584#if 0
585  int status;
586#endif
587
588  currentp->isr_level = _CPU_ISR_Disable_support();
589
590  do_jump( currentp, nextp );
591
592#if 0
593  if (sigsetjmp(currentp->regs, 1) == 0) {    /* Save the current context */
594     siglongjmp(nextp->regs, 0);           /* Switch to the new context */
595     _Internal_error_Occurred(
596         INTERNAL_ERROR_CORE,
597         TRUE,
598         status
599       );
600  }
601#endif
602
603#ifdef RTEMS_DEBUG
604    if (_CPU_ISR_Get_level() == 0)
605       abort();
606#endif
607
608  _CPU_ISR_Enable(currentp->isr_level);
609}
610
611static void do_jump(
612  Context_Control_overlay *currentp,
613  Context_Control_overlay *nextp
614)
615{
616  int status;
617
618  if (setjmp(currentp->regs) == 0) {    /* Save the current context */
619     longjmp(nextp->regs, 0);           /* Switch to the new context */
620     _Internal_error_Occurred(
621         INTERNAL_ERROR_CORE,
622         TRUE,
623         status
624       );
625  }
626}
627
628/*PAGE
629 *
630 *  _CPU_Save_float_context
631 */
632
633void _CPU_Save_float_context(
634  Context_Control_fp *fp_context
635)
636{
637}
638
639/*PAGE
640 *
641 *  _CPU_Restore_float_context
642 */
643
644void _CPU_Restore_float_context(
645  Context_Control_fp *fp_context
646)
647{
648}
649
650/*PAGE
651 *
652 *  _CPU_ISR_Disable_support
653 */
654
655unsigned32 _CPU_ISR_Disable_support(void)
656{
657  int status;
658  sigset_t  old_mask;
659
660  sigemptyset( &old_mask );
661  status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, &old_mask);
662  if ( status )
663    _Internal_error_Occurred(
664      INTERNAL_ERROR_CORE,
665      TRUE,
666      status
667    );
668
669  if (memcmp((void *)&posix_empty_mask, (void *)&old_mask, sizeof(sigset_t)))
670    return 1;
671
672  return 0;
673}
674
675/*PAGE
676 *
677 *  _CPU_ISR_Enable
678 */
679
680void _CPU_ISR_Enable(
681  unsigned32 level
682)
683{
684  int status;
685
686  if (level == 0)
687    status = sigprocmask(SIG_UNBLOCK, &_CPU_Signal_mask, 0);
688  else
689    status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, 0);
690
691  if ( status )
692    _Internal_error_Occurred(
693      INTERNAL_ERROR_CORE,
694      TRUE,
695      status
696    );
697}
698
699/*PAGE
700 *
701 *  _CPU_ISR_Handler
702 *
703 *  External interrupt handler.
704 *  This is installed as a UNIX signal handler.
705 *  It vectors out to specific user interrupt handlers.
706 */
707
708void _CPU_ISR_Handler(int vector)
709{
710  extern void        _Thread_Dispatch(void);
711  extern unsigned32  _Thread_Dispatch_disable_level;
712  extern boolean     _Context_Switch_necessary;
713
714  if (_ISR_Nest_level++ == 0) {
715      /* switch to interrupt stack */
716  }
717
718  _Thread_Dispatch_disable_level++;
719
720  if (_ISR_Vector_table[vector]) {
721     _ISR_Vector_table[vector](vector);
722  } else {
723     _CPU_Stray_signal(vector);
724  }
725
726  if (_ISR_Nest_level-- == 0) {
727      /* switch back to original stack */
728  }
729
730  _Thread_Dispatch_disable_level--;
731
732  if (_Thread_Dispatch_disable_level == 0 &&
733      (_Context_Switch_necessary || _ISR_Signals_to_thread_executing)) {
734      _ISR_Signals_to_thread_executing = FALSE;
735      _CPU_ISR_Enable(0);
736      _Thread_Dispatch();
737  }
738}
739
740/*PAGE
741 *
742 *  _CPU_Stray_signal
743 */
744
745void _CPU_Stray_signal(int sig_num)
746{
747  char buffer[ 4 ];
748
749  /*
750   * print "stray" msg about ones which that might mean something
751   * Avoid using the stdio section of the library.
752   * The following is generally safe.
753   */
754
755  switch (sig_num)
756  {
757#ifdef SIGCLD
758      case SIGCLD:
759          break;
760#endif
761      default:
762      {
763        /*
764         *  We avoid using the stdio section of the library.
765         *  The following is generally safe
766         */
767
768        int digit;
769        int number = sig_num;
770        int len = 0;
771
772        digit = number / 100;
773        number %= 100;
774        if (digit) buffer[len++] = '0' + digit;
775
776        digit = number / 10;
777        number %= 10;
778        if (digit || len) buffer[len++] = '0' + digit;
779
780        digit = number;
781        buffer[len++] = '0' + digit;
782
783        buffer[ len++ ] = '\n';
784
785        write( 2, "Stray signal ", 13 );
786        write( 2, buffer, len );
787
788      }
789  }
790
791  /*
792   * If it was a "fatal" signal, then exit here
793   * If app code has installed a hander for one of these, then
794   * we won't call _CPU_Stray_signal, so this is ok.
795   */
796
797  switch (sig_num) {
798      case SIGINT:
799      case SIGHUP:
800      case SIGQUIT:
801      case SIGILL:
802#ifdef SIGEMT
803      case SIGEMT:
804#endif
805      case SIGKILL:
806      case SIGBUS:
807      case SIGSEGV:
808      case SIGTERM:
809      case SIGIOT:
810        _CPU_Fatal_error(0x100 + sig_num);
811  }
812}
813
814/*PAGE
815 *
816 *  _CPU_Fatal_error
817 */
818
819void _CPU_Fatal_error(unsigned32 error)
820{
821  setitimer(ITIMER_REAL, 0, 0);
822
823  if ( error ) {
824#ifdef RTEMS_DEBUG
825    abort();
826#endif
827    if (getenv("RTEMS_DEBUG"))
828      abort();
829  }
830
831  _exit(error);
832}
833
834/*
835 *  Special Purpose Routines to hide the use of UNIX system calls.
836 */
837
838int _CPU_Set_sync_io_handler(
839  int fd,
840  boolean read,
841  boolean write,
842  boolean except,
843  rtems_sync_io_handler handler
844)
845{
846  if ((fd < FD_SETSIZE) && (_CPU_Sync_io_handlers[fd] == NULL)) {
847    if (read)
848      FD_SET(fd, &sync_io_readfds);
849    else
850      FD_CLR(fd, &sync_io_readfds);
851    if (write)
852      FD_SET(fd, &sync_io_writefds);
853    else
854      FD_CLR(fd, &sync_io_writefds);
855    if (except)
856      FD_SET(fd, &sync_io_exceptfds);
857    else
858      FD_CLR(fd, &sync_io_exceptfds);
859    _CPU_Sync_io_handlers[fd] = handler;
860    if ((fd + 1) > sync_io_nfds)
861      sync_io_nfds = fd + 1;
862    return 0;
863  }
864  return -1;
865}
866
867int _CPU_Clear_sync_io_handler(
868  int fd
869)
870{
871  if ((fd < FD_SETSIZE) && _CPU_Sync_io_handlers[fd]) {
872    FD_CLR(fd, &sync_io_readfds);
873    FD_CLR(fd, &sync_io_writefds);
874    FD_CLR(fd, &sync_io_exceptfds);
875    _CPU_Sync_io_handlers[fd] = NULL;
876    sync_io_nfds = 0;
877    for (fd = 0; fd < FD_SETSIZE; fd++)
878      if (FD_ISSET(fd, &sync_io_readfds) ||
879          FD_ISSET(fd, &sync_io_writefds) ||
880          FD_ISSET(fd, &sync_io_exceptfds))
881        sync_io_nfds = fd + 1;
882    return 0;
883  }
884  return -1;
885}
886
887int _CPU_Get_clock_vector( void )
888{
889  return SIGALRM;
890}
891
892void _CPU_Start_clock(
893  int microseconds
894)
895{
896  struct itimerval  new;
897
898  new.it_value.tv_sec = 0;
899  new.it_value.tv_usec = microseconds;
900  new.it_interval.tv_sec = 0;
901  new.it_interval.tv_usec = microseconds;
902
903  setitimer(ITIMER_REAL, &new, 0);
904}
905
906void _CPU_Stop_clock( void )
907{
908  struct itimerval  new;
909  struct sigaction  act;
910
911  /*
912   * Set the SIGALRM signal to ignore any last
913   * signals that might come in while we are
914   * disarming the timer and removing the interrupt
915   * vector.
916   */
917
918  (void) memset(&act, 0, sizeof(act));
919  act.sa_handler = SIG_IGN;
920
921  sigaction(SIGALRM, &act, 0);
922
923  (void) memset(&new, 0, sizeof(new));
924  setitimer(ITIMER_REAL, &new, 0);
925}
926
927extern void fix_syscall_errno( void );
928
929#if defined(RTEMS_MULTIPROCESSING)
930int  _CPU_SHM_Semid;
931
932void _CPU_SHM_Init(
933  unsigned32   maximum_nodes,
934  boolean      is_master_node,
935  void       **shm_address,
936  unsigned32  *shm_length
937)
938{
939  int          i;
940  int          shmid;
941  char        *shm_addr;
942  key_t        shm_key;
943  key_t        sem_key;
944  int          status = 0;  /* to avoid unitialized warnings */
945  int          shm_size;
946
947  if (getenv("RTEMS_SHM_KEY"))
948    shm_key = strtol(getenv("RTEMS_SHM_KEY"), 0, 0);
949  else
950#ifdef RTEMS_SHM_KEY
951    shm_key = RTEMS_SHM_KEY;
952#else
953    shm_key = 0xa000;
954#endif
955
956    if (getenv("RTEMS_SHM_SIZE"))
957      shm_size = strtol(getenv("RTEMS_SHM_SIZE"), 0, 0);
958    else
959#ifdef RTEMS_SHM_SIZE
960      shm_size = RTEMS_SHM_SIZE;
961#else
962      shm_size = 64 * 1024;
963#endif
964
965    if (getenv("RTEMS_SHM_SEMAPHORE_KEY"))
966      sem_key = strtol(getenv("RTEMS_SHM_SEMAPHORE_KEY"), 0, 0);
967    else
968#ifdef RTEMS_SHM_SEMAPHORE_KEY
969      sem_key = RTEMS_SHM_SEMAPHORE_KEY;
970#else
971      sem_key = 0xa001;
972#endif
973
974    shmid = shmget(shm_key, shm_size, IPC_CREAT | 0660);
975    if ( shmid == -1 ) {
976      fix_syscall_errno(); /* in case of newlib */
977      perror( "shmget" );
978      _CPU_Fatal_halt( 0xdead0001 );
979    }
980
981    shm_addr = shmat(shmid, (char *)0, SHM_RND);
982    if ( shm_addr == (void *)-1 ) {
983      fix_syscall_errno(); /* in case of newlib */
984      perror( "shmat" );
985      _CPU_Fatal_halt( 0xdead0002 );
986    }
987
988    _CPU_SHM_Semid = semget(sem_key, maximum_nodes + 1, IPC_CREAT | 0660);
989    if ( _CPU_SHM_Semid == -1 ) {
990      fix_syscall_errno(); /* in case of newlib */
991      perror( "semget" );
992      _CPU_Fatal_halt( 0xdead0003 );
993    }
994
995    if ( is_master_node ) {
996      for ( i=0 ; i <= maximum_nodes ; i++ ) {
997#if !HAS_UNION_SEMUN
998        union semun {
999          int val;
1000          struct semid_ds *buf;
1001          unsigned short int *array;
1002#if defined(__linux__)
1003          struct seminfo *__buf;
1004#endif         
1005        } ;
1006#endif
1007        union semun help ;
1008        help.val = 1;
1009        status = semctl( _CPU_SHM_Semid, i, SETVAL, help );
1010
1011        fix_syscall_errno(); /* in case of newlib */
1012        if ( status == -1 ) {
1013          _CPU_Fatal_halt( 0xdead0004 );
1014        }
1015      }
1016    }
1017
1018  *shm_address = shm_addr;
1019  *shm_length = shm_size;
1020
1021}
1022#endif
1023
1024int _CPU_Get_pid( void )
1025{
1026  return getpid();
1027}
1028
1029#if defined(RTEMS_MULTIPROCESSING)
1030/*
1031 * Define this to use signals for MPCI shared memory driver.
1032 * If undefined, the shared memory driver will poll from the
1033 * clock interrupt.
1034 * Ref: ../shmsupp/getcfg.c
1035 *
1036 * BEWARE:: many UN*X kernels and debuggers become severely confused when
1037 *          debugging programs which use signals.  The problem is *much*
1038 *          worse when using multiple signals, since ptrace(2) tends to
1039 *          drop all signals except 1 in the case of multiples.
1040 *          On hpux9, this problem was so bad, we couldn't use interrupts
1041 *          with the shared memory driver if we ever hoped to debug
1042 *          RTEMS programs.
1043 *          Maybe systems that use /proc don't have this problem...
1044 */
1045
1046
1047int _CPU_SHM_Get_vector( void )
1048{
1049#ifdef CPU_USE_SHM_INTERRUPTS
1050  return SIGUSR1;
1051#else
1052  return 0;
1053#endif
1054}
1055
1056void _CPU_SHM_Send_interrupt(
1057  int pid,
1058  int vector
1059)
1060{
1061  kill((pid_t) pid, vector);
1062}
1063
1064void _CPU_SHM_Lock(
1065  int semaphore
1066)
1067{
1068  struct sembuf sb;
1069
1070  sb.sem_num = semaphore;
1071  sb.sem_op  = -1;
1072  sb.sem_flg = 0;
1073
1074  while (1) {
1075    int status = -1;
1076
1077    status = semop(_CPU_SHM_Semid, &sb, 1);
1078    if ( status >= 0 )
1079      break;
1080    if ( status == -1 ) {
1081       fix_syscall_errno();    /* in case of newlib */
1082        if (errno == EINTR)
1083            continue;
1084        perror("shm lock");
1085        _CPU_Fatal_halt( 0xdead0005 );
1086    }
1087  }
1088
1089}
1090
1091void _CPU_SHM_Unlock(
1092  int semaphore
1093)
1094{
1095  struct sembuf  sb;
1096  int            status;
1097
1098  sb.sem_num = semaphore;
1099  sb.sem_op  = 1;
1100  sb.sem_flg = 0;
1101
1102  while (1) {
1103    status = semop(_CPU_SHM_Semid, &sb, 1);
1104    if ( status >= 0 )
1105      break;
1106
1107    if ( status == -1 ) {
1108      fix_syscall_errno();    /* in case of newlib */
1109      if (errno == EINTR)
1110          continue;
1111      perror("shm unlock");
1112      _CPU_Fatal_halt( 0xdead0006 );
1113    }
1114  }
1115
1116}
1117#endif
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