source: rtems/c/src/exec/score/cpu/unix/cpu.c @ 8531dce

Last change on this file since 8531dce was 0315b79b, checked in by Joel Sherrill <joel.sherrill@…>, on 04/05/00 at 19:32:36

Added support for Cygwin.

  • Property mode set to 100644
File size: 23.2 KB
Line 
1/*
2 *  UNIX Simulator Dependent Source
3 *
4 *  COPYRIGHT (c) 1994,95 by Division Incorporated
5 *
6 *  The license and distribution terms for this file may be
7 *  found in the file LICENSE in this distribution or at
8 *  http://www.OARcorp.com/rtems/license.html.
9 *
10 *  $Id$
11 */
12
13#include <rtems/system.h>
14#include <rtems/score/isr.h>
15#include <rtems/score/interr.h>
16
17#if defined(__linux__)
18#define _XOPEN_SOURCE
19#define MALLOC_0_RETURNS_NULL
20#endif
21
22#include <sys/types.h>
23#include <sys/times.h>
24#include <stdio.h>
25#include <stdlib.h>
26#include <setjmp.h>
27#include <signal.h>
28#include <time.h>
29#include <sys/time.h>
30#include <errno.h>
31#include <unistd.h>
32#if defined(RTEMS_MULTIPROCESSING)
33#include <sys/ipc.h>
34#include <sys/shm.h>
35#include <sys/sem.h>
36#endif
37#include <string.h>   /* memset */
38
39#ifndef SA_RESTART
40#define SA_RESTART 0
41#endif
42
43typedef struct {
44  jmp_buf   regs;
45  int  isr_level;
46} Context_Control_overlay;
47
48void  _CPU_Signal_initialize(void);
49void  _CPU_Stray_signal(int);
50void  _CPU_ISR_Handler(int);
51
52static sigset_t _CPU_Signal_mask;
53static Context_Control_overlay
54          _CPU_Context_Default_with_ISRs_enabled CPU_STRUCTURE_ALIGNMENT;
55static Context_Control_overlay
56          _CPU_Context_Default_with_ISRs_disabled CPU_STRUCTURE_ALIGNMENT;
57
58/*
59 * Sync IO support, an entry for each fd that can be set
60 */
61
62void  _CPU_Sync_io_Init();
63
64static rtems_sync_io_handler _CPU_Sync_io_handlers[FD_SETSIZE];
65static int sync_io_nfds;
66static fd_set sync_io_readfds;
67static fd_set sync_io_writefds;
68static fd_set sync_io_exceptfds;
69
70/*
71 * Which cpu are we? Used by libcpu and libbsp.
72 */
73
74int cpu_number;
75
76/*PAGE
77 *
78 *  _CPU_ISR_From_CPU_Init
79 */
80
81sigset_t  posix_empty_mask;
82
83void _CPU_ISR_From_CPU_Init()
84{
85  unsigned32        i;
86  proc_ptr          old_handler;
87
88  /*
89   * Generate an empty mask to be used by disable_support
90   */
91
92  sigemptyset(&posix_empty_mask);
93
94  /*
95   * Block all the signals except SIGTRAP for the debugger
96   * and fatal error signals.
97   */
98
99  (void) sigfillset(&_CPU_Signal_mask);
100  (void) sigdelset(&_CPU_Signal_mask, SIGTRAP);
101  (void) sigdelset(&_CPU_Signal_mask, SIGABRT);
102#if !defined(__CYGWIN__)
103  (void) sigdelset(&_CPU_Signal_mask, SIGIOT);
104#endif
105  (void) sigdelset(&_CPU_Signal_mask, SIGCONT);
106  (void) sigdelset(&_CPU_Signal_mask, SIGSEGV);
107  (void) sigdelset(&_CPU_Signal_mask, SIGBUS);
108  (void) sigdelset(&_CPU_Signal_mask, SIGFPE);
109
110  _CPU_ISR_Enable(1);
111
112  /*
113   * Set the handler for all signals to be signal_handler
114   * which will then vector out to the correct handler
115   * for whichever signal actually happened. Initially
116   * set the vectors to the stray signal handler.
117   */
118
119  for (i = 0; i < CPU_INTERRUPT_NUMBER_OF_VECTORS; i++)
120      (void)_CPU_ISR_install_vector(i, _CPU_Stray_signal, &old_handler);
121
122  _CPU_Signal_initialize();
123}
124
125void _CPU_Signal_initialize( void )
126{
127  struct sigaction  act;
128  sigset_t          mask;
129
130  /* mark them all active except for TraceTrap  and Abort */
131
132  mask = _CPU_Signal_mask;
133  sigprocmask(SIG_UNBLOCK, &mask, 0);
134
135  act.sa_handler = _CPU_ISR_Handler;
136  act.sa_mask = mask;
137  act.sa_flags = SA_RESTART;
138
139  sigaction(SIGHUP, &act, 0);
140  sigaction(SIGINT, &act, 0);
141  sigaction(SIGQUIT, &act, 0);
142  sigaction(SIGILL, &act, 0);
143#ifdef SIGEMT
144  sigaction(SIGEMT, &act, 0);
145#endif
146  sigaction(SIGFPE, &act, 0);
147  sigaction(SIGKILL, &act, 0);
148  sigaction(SIGBUS, &act, 0);
149  sigaction(SIGSEGV, &act, 0);
150#ifdef SIGSYS
151  sigaction(SIGSYS, &act, 0);
152#endif
153  sigaction(SIGPIPE, &act, 0);
154  sigaction(SIGALRM, &act, 0);
155  sigaction(SIGTERM, &act, 0);
156  sigaction(SIGUSR1, &act, 0);
157  sigaction(SIGUSR2, &act, 0);
158  sigaction(SIGCHLD, &act, 0);
159#ifdef SIGCLD
160  sigaction(SIGCLD, &act, 0);
161#endif
162#ifdef SIGPWR
163  sigaction(SIGPWR, &act, 0);
164#endif
165  sigaction(SIGVTALRM, &act, 0);
166  sigaction(SIGPROF, &act, 0);
167  sigaction(SIGIO, &act, 0);
168  sigaction(SIGWINCH, &act, 0);
169  sigaction(SIGSTOP, &act, 0);
170  sigaction(SIGTTIN, &act, 0);
171  sigaction(SIGTTOU, &act, 0);
172  sigaction(SIGURG, &act, 0);
173#ifdef SIGLOST
174    sigaction(SIGLOST, &act, 0);
175#endif
176}
177
178/*PAGE
179 *
180 *  _CPU_Context_From_CPU_Init
181 */
182
183void _CPU_Context_From_CPU_Init()
184{
185
186#if defined(__hppa__) && defined(RTEMS_UNIXLIB_SETJMP)
187    /*
188     * HACK - set the _SYSTEM_ID to 0x20c so that setjmp/longjmp
189     * will handle the full 32 floating point registers.
190     */
191
192    {
193      extern unsigned32 _SYSTEM_ID;
194
195      _SYSTEM_ID = 0x20c;
196    }
197#endif
198
199  /*
200   *  get default values to use in _CPU_Context_Initialize()
201   */
202
203
204  (void) memset(
205    &_CPU_Context_Default_with_ISRs_enabled,
206    0,
207    sizeof(Context_Control)
208  );
209  (void) memset(
210    &_CPU_Context_Default_with_ISRs_disabled,
211    0,
212    sizeof(Context_Control)
213  );
214
215  _CPU_ISR_Set_level( 0 );
216  _CPU_Context_switch(
217    (Context_Control *) &_CPU_Context_Default_with_ISRs_enabled,
218    (Context_Control *) &_CPU_Context_Default_with_ISRs_enabled
219  );
220
221  _CPU_ISR_Set_level( 1 );
222  _CPU_Context_switch(
223    (Context_Control *) &_CPU_Context_Default_with_ISRs_disabled,
224    (Context_Control *) &_CPU_Context_Default_with_ISRs_disabled
225  );
226}
227
228/*PAGE
229 *
230 *  _CPU_Sync_io_Init
231 */
232
233void _CPU_Sync_io_Init()
234{
235  int fd;
236
237  for (fd = 0; fd < FD_SETSIZE; fd++)
238    _CPU_Sync_io_handlers[fd] = NULL;
239
240  sync_io_nfds = 0;
241  FD_ZERO(&sync_io_readfds);
242  FD_ZERO(&sync_io_writefds);
243  FD_ZERO(&sync_io_exceptfds);
244}
245
246/*PAGE
247 *
248 *  _CPU_ISR_Get_level
249 */
250
251unsigned32 _CPU_ISR_Get_level( void )
252{
253  sigset_t old_mask;
254
255  sigemptyset( &old_mask );
256  sigprocmask(SIG_BLOCK, 0, &old_mask);
257
258  if (memcmp((void *)&posix_empty_mask, (void *)&old_mask, sizeof(sigset_t)))
259      return 1;
260
261  return 0;
262}
263
264/*  _CPU_Initialize
265 *
266 *  This routine performs processor dependent initialization.
267 *
268 *  INPUT PARAMETERS:
269 *    cpu_table       - CPU table to initialize
270 *    thread_dispatch - address of disptaching routine
271 */
272
273
274void _CPU_Initialize(
275  rtems_cpu_table  *cpu_table,
276  void            (*thread_dispatch)      /* ignored on this CPU */
277)
278{
279  /*
280   *  The thread_dispatch argument is the address of the entry point
281   *  for the routine called at the end of an ISR once it has been
282   *  decided a context switch is necessary.  On some compilation
283   *  systems it is difficult to call a high-level language routine
284   *  from assembly.  This allows us to trick these systems.
285   *
286   *  If you encounter this problem save the entry point in a CPU
287   *  dependent variable.
288   */
289
290  _CPU_Thread_dispatch_pointer = thread_dispatch;
291
292  /*
293   * XXX; If there is not an easy way to initialize the FP context
294   *      during Context_Initialize, then it is usually easier to
295   *      save an "uninitialized" FP context here and copy it to
296   *      the task's during Context_Initialize.
297   */
298
299  /* XXX: FP context initialization support */
300
301  _CPU_Table = *cpu_table;
302
303  _CPU_ISR_From_CPU_Init();
304
305  _CPU_Sync_io_Init();
306
307  _CPU_Context_From_CPU_Init();
308
309}
310
311/*PAGE
312 *
313 *  _CPU_ISR_install_raw_handler
314 */
315
316void _CPU_ISR_install_raw_handler(
317  unsigned32  vector,
318  proc_ptr    new_handler,
319  proc_ptr   *old_handler
320)
321{
322  _CPU_Fatal_halt( 0xdeaddead );
323}
324
325/*PAGE
326 *
327 *  _CPU_ISR_install_vector
328 *
329 *  This kernel routine installs the RTEMS handler for the
330 *  specified vector.
331 *
332 *  Input parameters:
333 *    vector      - interrupt vector number
334 *    old_handler - former ISR for this vector number
335 *    new_handler - replacement ISR for this vector number
336 *
337 *  Output parameters:  NONE
338 *
339 */
340
341
342void _CPU_ISR_install_vector(
343  unsigned32  vector,
344  proc_ptr    new_handler,
345  proc_ptr   *old_handler
346)
347{
348   *old_handler = _ISR_Vector_table[ vector ];
349
350   /*
351    *  If the interrupt vector table is a table of pointer to isr entry
352    *  points, then we need to install the appropriate RTEMS interrupt
353    *  handler for this vector number.
354    */
355
356   /*
357    *  We put the actual user ISR address in '_ISR_vector_table'.  This will
358    *  be used by the _CPU_ISR_Handler so the user gets control.
359    */
360
361    _ISR_Vector_table[ vector ] = new_handler;
362}
363
364/*PAGE
365 *
366 *  _CPU_Install_interrupt_stack
367 */
368
369void _CPU_Install_interrupt_stack( void )
370{
371}
372
373/*PAGE
374 *
375 *  _CPU_Thread_Idle_body
376 *
377 *  Stop until we get a signal which is the logically the same thing
378 *  entering low-power or sleep mode on a real processor and waiting for
379 *  an interrupt.  This significantly reduces the consumption of host
380 *  CPU cycles which is again similar to low power mode.
381 */
382
383void _CPU_Thread_Idle_body( void )
384{
385#if CPU_SYNC_IO
386  extern void _Thread_Dispatch(void);
387  int fd;
388#endif
389
390  while (1) {
391#ifdef RTEMS_DEBUG
392    /* interrupts had better be enabled at this point! */
393    if (_CPU_ISR_Get_level() != 0)
394       abort();
395#endif
396
397    /*
398     *  Block on a select statement, the CPU interface added allow the
399     *  user to add new descriptors which are to be blocked on
400     */
401
402#if CPU_SYNC_IO
403    if (sync_io_nfds) {
404      int result;
405      fd_set readfds, writefds, exceptfds;
406
407      readfds = sync_io_readfds;
408      writefds = sync_io_writefds;
409      exceptfds = sync_io_exceptfds;
410      result = select(sync_io_nfds,
411                 &readfds,
412                 &writefds,
413                 &exceptfds,
414                 NULL);
415
416      if (result < 0) {
417        if (errno != EINTR)
418          _CPU_Fatal_error(0x200);       /* FIXME : what number should go here !! */
419        _Thread_Dispatch();
420        continue;
421      }
422
423      for (fd = 0; fd < sync_io_nfds; fd++) {
424        boolean read = FD_ISSET(fd, &readfds);
425        boolean write = FD_ISSET(fd, &writefds);
426        boolean except = FD_ISSET(fd, &exceptfds);
427
428        if (_CPU_Sync_io_handlers[fd] && (read || write || except))
429          _CPU_Sync_io_handlers[fd](fd, read, write, except);
430      }
431
432      _Thread_Dispatch();
433    } else
434      pause();
435#else
436    pause();
437#endif
438
439  }
440
441}
442
443/*PAGE
444 *
445 *  _CPU_Context_Initialize
446 */
447
448void _CPU_Context_Initialize(
449  Context_Control  *_the_context,
450  unsigned32       *_stack_base,
451  unsigned32        _size,
452  unsigned32        _new_level,
453  void             *_entry_point,
454  boolean           _is_fp
455)
456{
457  unsigned32  *addr;
458  unsigned32   jmp_addr;
459  unsigned32   _stack_low;   /* lowest "stack aligned" address */
460  unsigned32   _stack_high;  /* highest "stack aligned" address */
461  unsigned32   _the_size;
462
463  jmp_addr = (unsigned32) _entry_point;
464
465  /*
466   *  On CPUs with stacks which grow down, we build the stack
467   *  based on the _stack_high address.  On CPUs with stacks which
468   *  grow up, we build the stack based on the _stack_low address.
469   */
470
471  _stack_low = (unsigned32)(_stack_base) + CPU_STACK_ALIGNMENT - 1;
472  _stack_low &= ~(CPU_STACK_ALIGNMENT - 1);
473
474  _stack_high = (unsigned32)(_stack_base) + _size;
475  _stack_high &= ~(CPU_STACK_ALIGNMENT - 1);
476
477  if (_stack_high > _stack_low)
478    _the_size = _stack_high - _stack_low;
479  else
480    _the_size = _stack_low - _stack_high;
481
482  /*
483   * Slam our jmp_buf template into the context we are creating
484   */
485
486  if ( _new_level == 0 )
487      *_the_context = *(Context_Control *)
488                         &_CPU_Context_Default_with_ISRs_enabled;
489  else
490      *_the_context = *(Context_Control *)
491                         &_CPU_Context_Default_with_ISRs_disabled;
492
493  addr = (unsigned32 *)_the_context;
494
495#if defined(__hppa__)
496  *(addr + RP_OFF) = jmp_addr;
497  *(addr + SP_OFF) = (unsigned32)(_stack_low + CPU_FRAME_SIZE);
498
499  /*
500   * See if we are using shared libraries by checking
501   * bit 30 in 24 off of newp. If bit 30 is set then
502   * we are using shared libraries and the jump address
503   * points to the pointer, so we put that into rp instead.
504   */
505
506  if (jmp_addr & 0x40000000) {
507    jmp_addr &= 0xfffffffc;
508     *(addr + RP_OFF) = *(unsigned32 *)jmp_addr;
509  }
510#elif defined(__sparc__)
511
512  /*
513   *  See /usr/include/sys/stack.h in Solaris 2.3 for a nice
514   *  diagram of the stack.
515   */
516
517  asm ("ta  0x03");            /* flush registers */
518
519  *(addr + RP_OFF) = jmp_addr + ADDR_ADJ_OFFSET;
520  *(addr + SP_OFF) = (unsigned32)(_stack_high - CPU_FRAME_SIZE);
521  *(addr + FP_OFF) = (unsigned32)(_stack_high);
522
523#elif defined(__i386__)
524
525    /*
526     *  This information was gathered by disassembling setjmp().
527     */
528
529    {
530      unsigned32 stack_ptr;
531
532      stack_ptr = _stack_high - CPU_FRAME_SIZE;
533
534      *(addr + EBX_OFF) = 0xFEEDFEED;
535      *(addr + ESI_OFF) = 0xDEADDEAD;
536      *(addr + EDI_OFF) = 0xDEAFDEAF;
537      *(addr + EBP_OFF) = stack_ptr;
538      *(addr + ESP_OFF) = stack_ptr;
539      *(addr + RET_OFF) = jmp_addr;
540
541      addr = (unsigned32 *) stack_ptr;
542
543      addr[ 0 ] = jmp_addr;
544      addr[ 1 ] = (unsigned32) stack_ptr;
545      addr[ 2 ] = (unsigned32) stack_ptr;
546    }
547
548#else
549#error "UNKNOWN CPU!!!"
550#endif
551
552}
553
554/*PAGE
555 *
556 *  _CPU_Context_restore
557 */
558
559void _CPU_Context_restore(
560  Context_Control  *next
561)
562{
563  Context_Control_overlay *nextp = (Context_Control_overlay *)next;
564
565  _CPU_ISR_Enable(nextp->isr_level);
566  longjmp( nextp->regs, 0 );
567}
568
569/*PAGE
570 *
571 *  _CPU_Context_switch
572 */
573
574static void do_jump(
575  Context_Control_overlay *currentp,
576  Context_Control_overlay *nextp
577);
578
579void _CPU_Context_switch(
580  Context_Control  *current,
581  Context_Control  *next
582)
583{
584  Context_Control_overlay *currentp = (Context_Control_overlay *)current;
585  Context_Control_overlay *nextp = (Context_Control_overlay *)next;
586#if 0
587  int status;
588#endif
589
590  currentp->isr_level = _CPU_ISR_Disable_support();
591
592  do_jump( currentp, nextp );
593
594#if 0
595  if (sigsetjmp(currentp->regs, 1) == 0) {    /* Save the current context */
596     siglongjmp(nextp->regs, 0);           /* Switch to the new context */
597     _Internal_error_Occurred(
598         INTERNAL_ERROR_CORE,
599         TRUE,
600         status
601       );
602  }
603#endif
604
605#ifdef RTEMS_DEBUG
606    if (_CPU_ISR_Get_level() == 0)
607       abort();
608#endif
609
610  _CPU_ISR_Enable(currentp->isr_level);
611}
612
613static void do_jump(
614  Context_Control_overlay *currentp,
615  Context_Control_overlay *nextp
616)
617{
618  int status;
619
620  if (setjmp(currentp->regs) == 0) {    /* Save the current context */
621     longjmp(nextp->regs, 0);           /* Switch to the new context */
622     _Internal_error_Occurred(
623         INTERNAL_ERROR_CORE,
624         TRUE,
625         status
626       );
627  }
628}
629
630/*PAGE
631 *
632 *  _CPU_Save_float_context
633 */
634
635void _CPU_Save_float_context(
636  Context_Control_fp *fp_context
637)
638{
639}
640
641/*PAGE
642 *
643 *  _CPU_Restore_float_context
644 */
645
646void _CPU_Restore_float_context(
647  Context_Control_fp *fp_context
648)
649{
650}
651
652/*PAGE
653 *
654 *  _CPU_ISR_Disable_support
655 */
656
657unsigned32 _CPU_ISR_Disable_support(void)
658{
659  int status;
660  sigset_t  old_mask;
661
662  sigemptyset( &old_mask );
663  status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, &old_mask);
664  if ( status )
665    _Internal_error_Occurred(
666      INTERNAL_ERROR_CORE,
667      TRUE,
668      status
669    );
670
671  if (memcmp((void *)&posix_empty_mask, (void *)&old_mask, sizeof(sigset_t)))
672    return 1;
673
674  return 0;
675}
676
677/*PAGE
678 *
679 *  _CPU_ISR_Enable
680 */
681
682void _CPU_ISR_Enable(
683  unsigned32 level
684)
685{
686  int status;
687
688  if (level == 0)
689    status = sigprocmask(SIG_UNBLOCK, &_CPU_Signal_mask, 0);
690  else
691    status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, 0);
692
693  if ( status )
694    _Internal_error_Occurred(
695      INTERNAL_ERROR_CORE,
696      TRUE,
697      status
698    );
699}
700
701/*PAGE
702 *
703 *  _CPU_ISR_Handler
704 *
705 *  External interrupt handler.
706 *  This is installed as a UNIX signal handler.
707 *  It vectors out to specific user interrupt handlers.
708 */
709
710void _CPU_ISR_Handler(int vector)
711{
712  extern void        _Thread_Dispatch(void);
713  extern unsigned32  _Thread_Dispatch_disable_level;
714  extern boolean     _Context_Switch_necessary;
715
716  if (_ISR_Nest_level++ == 0) {
717      /* switch to interrupt stack */
718  }
719
720  _Thread_Dispatch_disable_level++;
721
722  if (_ISR_Vector_table[vector]) {
723     _ISR_Vector_table[vector](vector);
724  } else {
725     _CPU_Stray_signal(vector);
726  }
727
728  if (_ISR_Nest_level-- == 0) {
729      /* switch back to original stack */
730  }
731
732  _Thread_Dispatch_disable_level--;
733
734  if (_Thread_Dispatch_disable_level == 0 &&
735      (_Context_Switch_necessary || _ISR_Signals_to_thread_executing)) {
736      _ISR_Signals_to_thread_executing = FALSE;
737      _CPU_ISR_Enable(0);
738      _Thread_Dispatch();
739  }
740}
741
742/*PAGE
743 *
744 *  _CPU_Stray_signal
745 */
746
747void _CPU_Stray_signal(int sig_num)
748{
749  char buffer[ 4 ];
750
751  /*
752   * print "stray" msg about ones which that might mean something
753   * Avoid using the stdio section of the library.
754   * The following is generally safe.
755   */
756
757  switch (sig_num)
758  {
759#ifdef SIGCLD
760      case SIGCLD:
761          break;
762#endif
763      default:
764      {
765        /*
766         *  We avoid using the stdio section of the library.
767         *  The following is generally safe
768         */
769
770        int digit;
771        int number = sig_num;
772        int len = 0;
773
774        digit = number / 100;
775        number %= 100;
776        if (digit) buffer[len++] = '0' + digit;
777
778        digit = number / 10;
779        number %= 10;
780        if (digit || len) buffer[len++] = '0' + digit;
781
782        digit = number;
783        buffer[len++] = '0' + digit;
784
785        buffer[ len++ ] = '\n';
786
787        write( 2, "Stray signal ", 13 );
788        write( 2, buffer, len );
789
790      }
791  }
792
793  /*
794   * If it was a "fatal" signal, then exit here
795   * If app code has installed a hander for one of these, then
796   * we won't call _CPU_Stray_signal, so this is ok.
797   */
798
799  switch (sig_num) {
800      case SIGINT:
801      case SIGHUP:
802      case SIGQUIT:
803      case SIGILL:
804#ifdef SIGEMT
805      case SIGEMT:
806#endif
807      case SIGKILL:
808      case SIGBUS:
809      case SIGSEGV:
810      case SIGTERM:
811#if !defined(__CYGWIN__)
812      case SIGIOT:
813#endif
814        _CPU_Fatal_error(0x100 + sig_num);
815  }
816}
817
818/*PAGE
819 *
820 *  _CPU_Fatal_error
821 */
822
823void _CPU_Fatal_error(unsigned32 error)
824{
825  setitimer(ITIMER_REAL, 0, 0);
826
827  if ( error ) {
828#ifdef RTEMS_DEBUG
829    abort();
830#endif
831    if (getenv("RTEMS_DEBUG"))
832      abort();
833  }
834
835  _exit(error);
836}
837
838/*
839 *  Special Purpose Routines to hide the use of UNIX system calls.
840 */
841
842int _CPU_Set_sync_io_handler(
843  int fd,
844  boolean read,
845  boolean write,
846  boolean except,
847  rtems_sync_io_handler handler
848)
849{
850  if ((fd < FD_SETSIZE) && (_CPU_Sync_io_handlers[fd] == NULL)) {
851    if (read)
852      FD_SET(fd, &sync_io_readfds);
853    else
854      FD_CLR(fd, &sync_io_readfds);
855    if (write)
856      FD_SET(fd, &sync_io_writefds);
857    else
858      FD_CLR(fd, &sync_io_writefds);
859    if (except)
860      FD_SET(fd, &sync_io_exceptfds);
861    else
862      FD_CLR(fd, &sync_io_exceptfds);
863    _CPU_Sync_io_handlers[fd] = handler;
864    if ((fd + 1) > sync_io_nfds)
865      sync_io_nfds = fd + 1;
866    return 0;
867  }
868  return -1;
869}
870
871int _CPU_Clear_sync_io_handler(
872  int fd
873)
874{
875  if ((fd < FD_SETSIZE) && _CPU_Sync_io_handlers[fd]) {
876    FD_CLR(fd, &sync_io_readfds);
877    FD_CLR(fd, &sync_io_writefds);
878    FD_CLR(fd, &sync_io_exceptfds);
879    _CPU_Sync_io_handlers[fd] = NULL;
880    sync_io_nfds = 0;
881    for (fd = 0; fd < FD_SETSIZE; fd++)
882      if (FD_ISSET(fd, &sync_io_readfds) ||
883          FD_ISSET(fd, &sync_io_writefds) ||
884          FD_ISSET(fd, &sync_io_exceptfds))
885        sync_io_nfds = fd + 1;
886    return 0;
887  }
888  return -1;
889}
890
891int _CPU_Get_clock_vector( void )
892{
893  return SIGALRM;
894}
895
896void _CPU_Start_clock(
897  int microseconds
898)
899{
900  struct itimerval  new;
901
902  new.it_value.tv_sec = 0;
903  new.it_value.tv_usec = microseconds;
904  new.it_interval.tv_sec = 0;
905  new.it_interval.tv_usec = microseconds;
906
907  setitimer(ITIMER_REAL, &new, 0);
908}
909
910void _CPU_Stop_clock( void )
911{
912  struct itimerval  new;
913  struct sigaction  act;
914
915  /*
916   * Set the SIGALRM signal to ignore any last
917   * signals that might come in while we are
918   * disarming the timer and removing the interrupt
919   * vector.
920   */
921
922  (void) memset(&act, 0, sizeof(act));
923  act.sa_handler = SIG_IGN;
924
925  sigaction(SIGALRM, &act, 0);
926
927  (void) memset(&new, 0, sizeof(new));
928  setitimer(ITIMER_REAL, &new, 0);
929}
930
931extern void fix_syscall_errno( void );
932
933#if defined(RTEMS_MULTIPROCESSING)
934int  _CPU_SHM_Semid;
935
936void _CPU_SHM_Init(
937  unsigned32   maximum_nodes,
938  boolean      is_master_node,
939  void       **shm_address,
940  unsigned32  *shm_length
941)
942{
943  int          i;
944  int          shmid;
945  char        *shm_addr;
946  key_t        shm_key;
947  key_t        sem_key;
948  int          status = 0;  /* to avoid unitialized warnings */
949  int          shm_size;
950
951  if (getenv("RTEMS_SHM_KEY"))
952    shm_key = strtol(getenv("RTEMS_SHM_KEY"), 0, 0);
953  else
954#ifdef RTEMS_SHM_KEY
955    shm_key = RTEMS_SHM_KEY;
956#else
957    shm_key = 0xa000;
958#endif
959
960    if (getenv("RTEMS_SHM_SIZE"))
961      shm_size = strtol(getenv("RTEMS_SHM_SIZE"), 0, 0);
962    else
963#ifdef RTEMS_SHM_SIZE
964      shm_size = RTEMS_SHM_SIZE;
965#else
966      shm_size = 64 * 1024;
967#endif
968
969    if (getenv("RTEMS_SHM_SEMAPHORE_KEY"))
970      sem_key = strtol(getenv("RTEMS_SHM_SEMAPHORE_KEY"), 0, 0);
971    else
972#ifdef RTEMS_SHM_SEMAPHORE_KEY
973      sem_key = RTEMS_SHM_SEMAPHORE_KEY;
974#else
975      sem_key = 0xa001;
976#endif
977
978    shmid = shmget(shm_key, shm_size, IPC_CREAT | 0660);
979    if ( shmid == -1 ) {
980      fix_syscall_errno(); /* in case of newlib */
981      perror( "shmget" );
982      _CPU_Fatal_halt( 0xdead0001 );
983    }
984
985    shm_addr = shmat(shmid, (char *)0, SHM_RND);
986    if ( shm_addr == (void *)-1 ) {
987      fix_syscall_errno(); /* in case of newlib */
988      perror( "shmat" );
989      _CPU_Fatal_halt( 0xdead0002 );
990    }
991
992    _CPU_SHM_Semid = semget(sem_key, maximum_nodes + 1, IPC_CREAT | 0660);
993    if ( _CPU_SHM_Semid == -1 ) {
994      fix_syscall_errno(); /* in case of newlib */
995      perror( "semget" );
996      _CPU_Fatal_halt( 0xdead0003 );
997    }
998
999    if ( is_master_node ) {
1000      for ( i=0 ; i <= maximum_nodes ; i++ ) {
1001#if !HAS_UNION_SEMUN
1002        union semun {
1003          int val;
1004          struct semid_ds *buf;
1005          unsigned short int *array;
1006#if defined(__linux__)
1007          struct seminfo *__buf;
1008#endif         
1009        } ;
1010#endif
1011        union semun help ;
1012        help.val = 1;
1013        status = semctl( _CPU_SHM_Semid, i, SETVAL, help );
1014
1015        fix_syscall_errno(); /* in case of newlib */
1016        if ( status == -1 ) {
1017          _CPU_Fatal_halt( 0xdead0004 );
1018        }
1019      }
1020    }
1021
1022  *shm_address = shm_addr;
1023  *shm_length = shm_size;
1024
1025}
1026#endif
1027
1028int _CPU_Get_pid( void )
1029{
1030  return getpid();
1031}
1032
1033#if defined(RTEMS_MULTIPROCESSING)
1034/*
1035 * Define this to use signals for MPCI shared memory driver.
1036 * If undefined, the shared memory driver will poll from the
1037 * clock interrupt.
1038 * Ref: ../shmsupp/getcfg.c
1039 *
1040 * BEWARE:: many UN*X kernels and debuggers become severely confused when
1041 *          debugging programs which use signals.  The problem is *much*
1042 *          worse when using multiple signals, since ptrace(2) tends to
1043 *          drop all signals except 1 in the case of multiples.
1044 *          On hpux9, this problem was so bad, we couldn't use interrupts
1045 *          with the shared memory driver if we ever hoped to debug
1046 *          RTEMS programs.
1047 *          Maybe systems that use /proc don't have this problem...
1048 */
1049
1050
1051int _CPU_SHM_Get_vector( void )
1052{
1053#ifdef CPU_USE_SHM_INTERRUPTS
1054  return SIGUSR1;
1055#else
1056  return 0;
1057#endif
1058}
1059
1060void _CPU_SHM_Send_interrupt(
1061  int pid,
1062  int vector
1063)
1064{
1065  kill((pid_t) pid, vector);
1066}
1067
1068void _CPU_SHM_Lock(
1069  int semaphore
1070)
1071{
1072  struct sembuf sb;
1073
1074  sb.sem_num = semaphore;
1075  sb.sem_op  = -1;
1076  sb.sem_flg = 0;
1077
1078  while (1) {
1079    int status = -1;
1080
1081    status = semop(_CPU_SHM_Semid, &sb, 1);
1082    if ( status >= 0 )
1083      break;
1084    if ( status == -1 ) {
1085       fix_syscall_errno();    /* in case of newlib */
1086        if (errno == EINTR)
1087            continue;
1088        perror("shm lock");
1089        _CPU_Fatal_halt( 0xdead0005 );
1090    }
1091  }
1092
1093}
1094
1095void _CPU_SHM_Unlock(
1096  int semaphore
1097)
1098{
1099  struct sembuf  sb;
1100  int            status;
1101
1102  sb.sem_num = semaphore;
1103  sb.sem_op  = 1;
1104  sb.sem_flg = 0;
1105
1106  while (1) {
1107    status = semop(_CPU_SHM_Semid, &sb, 1);
1108    if ( status >= 0 )
1109      break;
1110
1111    if ( status == -1 ) {
1112      fix_syscall_errno();    /* in case of newlib */
1113      if (errno == EINTR)
1114          continue;
1115      perror("shm unlock");
1116      _CPU_Fatal_halt( 0xdead0006 );
1117    }
1118  }
1119
1120}
1121#endif
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