source: rtems/c/src/exec/score/cpu/unix/cpu.c @ 1ceface

4.104.114.84.95
Last change on this file since 1ceface was 1ceface, checked in by Joel Sherrill <joel.sherrill@…>, on 10/06/95 at 16:33:30

moved to new development machine and went to gcc 2.7.0

  • Property mode set to 100644
File size: 19.8 KB
Line 
1/*
2 *  UNIX Simulator Dependent Source
3 *
4 *
5 *  To anyone who acknowledges that this file is provided "AS IS"
6 *  without any express or implied warranty:
7 *      permission to use, copy, modify, and distribute this file
8 *      for any purpose is hereby granted without fee, provided that
9 *      the above copyright notice and this notice appears in all
10 *      copies, and that the name of Division Incorporated not be
11 *      used in advertising or publicity pertaining to distribution
12 *      of the software without specific, written prior permission.
13 *      Division Incorporated makes no representations about the
14 *      suitability of this software for any purpose.
15 *
16 *  $Id$
17 */
18
19#include <rtems/system.h>
20#include <rtems/score/isr.h>
21#include <rtems/score/interr.h>
22
23#if defined(solaris2)
24/*
25#undef  _POSIX_C_SOURCE
26#define _POSIX_C_SOURCE 3
27#undef  __STRICT_ANSI__
28#define __STRICT_ANSI__
29*/
30#define __EXTENSIONS__
31#endif
32 
33#if defined(linux)
34#define MALLOC_0_RETURNS_NULL
35#endif
36 
37#include <stdio.h>
38#include <stdlib.h>
39#include <setjmp.h>
40#include <signal.h>
41#include <time.h>
42#include <sys/time.h>
43#include <sys/types.h>
44#include <errno.h>
45#include <unistd.h>
46#include <sys/ipc.h>
47#include <sys/shm.h>
48#include <sys/sem.h>
49
50#ifndef SA_RESTART
51#define SA_RESTART 0
52#endif
53
54typedef struct {
55  jmp_buf   regs;
56  sigset_t  isr_level;
57} Context_Control_overlay;
58
59void  _CPU_Signal_initialize(void);
60void  _CPU_Stray_signal(int);
61void  _CPU_ISR_Handler(int);
62
63sigset_t         _CPU_Signal_mask;
64Context_Control  _CPU_Context_Default_with_ISRs_enabled;
65Context_Control  _CPU_Context_Default_with_ISRs_disabled;
66
67/*
68 * Which cpu are we? Used by libcpu and libbsp.
69 */
70
71int cpu_number;
72
73/*PAGE
74 *
75 *  _CPU_ISR_From_CPU_Init
76 */
77
78sigset_t  posix_empty_mask;
79
80void _CPU_ISR_From_CPU_Init()
81{
82  unsigned32        i;
83  proc_ptr          old_handler;
84
85  /*
86   * Generate an empty mask to be used by disable_support
87   */
88
89  sigemptyset(&posix_empty_mask);
90 
91  /*
92   * Block all the signals except SIGTRAP for the debugger
93   * and SIGABRT for fatal errors.
94   */
95
96  (void) sigfillset(&_CPU_Signal_mask);
97  (void) sigdelset(&_CPU_Signal_mask, SIGTRAP);
98  (void) sigdelset(&_CPU_Signal_mask, SIGABRT);
99  (void) sigdelset(&_CPU_Signal_mask, SIGIOT);
100  (void) sigdelset(&_CPU_Signal_mask, SIGCONT);
101
102  _CPU_ISR_Enable(1);
103
104  /*
105   * Set the handler for all signals to be signal_handler
106   * which will then vector out to the correct handler
107   * for whichever signal actually happened. Initially
108   * set the vectors to the stray signal handler.
109   */
110
111  for (i = 0; i < CPU_INTERRUPT_NUMBER_OF_VECTORS; i++)
112      (void)_CPU_ISR_install_vector(i, _CPU_Stray_signal, &old_handler);
113
114  _CPU_Signal_initialize();
115}
116
117void _CPU_Signal_initialize( void )
118{
119  struct sigaction  act;
120  sigset_t          mask;
121
122  /* mark them all active except for TraceTrap  and Abort */
123
124  sigfillset(&mask);
125  sigdelset(&mask, SIGTRAP);
126  sigdelset(&mask, SIGABRT);
127  sigdelset(&mask, SIGIOT);
128  sigdelset(&mask, SIGCONT);
129  sigprocmask(SIG_UNBLOCK, &mask, 0);
130
131  act.sa_handler = _CPU_ISR_Handler;
132  act.sa_mask = mask;
133  act.sa_flags = SA_RESTART;
134
135  sigaction(SIGHUP, &act, 0);
136  sigaction(SIGINT, &act, 0);
137  sigaction(SIGQUIT, &act, 0);
138  sigaction(SIGILL, &act, 0);
139#ifdef SIGEMT
140  sigaction(SIGEMT, &act, 0);
141#endif
142  sigaction(SIGFPE, &act, 0);
143  sigaction(SIGKILL, &act, 0);
144  sigaction(SIGBUS, &act, 0);
145  sigaction(SIGSEGV, &act, 0);
146#ifdef SIGSYS
147  sigaction(SIGSYS, &act, 0);
148#endif
149  sigaction(SIGPIPE, &act, 0);
150  sigaction(SIGALRM, &act, 0);
151  sigaction(SIGTERM, &act, 0);
152  sigaction(SIGUSR1, &act, 0);
153  sigaction(SIGUSR2, &act, 0);
154  sigaction(SIGCHLD, &act, 0);
155  sigaction(SIGCLD, &act, 0);
156  sigaction(SIGPWR, &act, 0);
157  sigaction(SIGVTALRM, &act, 0);
158  sigaction(SIGPROF, &act, 0);
159  sigaction(SIGIO, &act, 0);
160  sigaction(SIGWINCH, &act, 0);
161  sigaction(SIGSTOP, &act, 0);
162  sigaction(SIGTTIN, &act, 0);
163  sigaction(SIGTTOU, &act, 0);
164  sigaction(SIGURG, &act, 0);
165#ifdef SIGLOST
166    sigaction(SIGLOST, &act, 0);
167#endif
168
169}
170
171/*PAGE
172 *
173 *  _CPU_Context_From_CPU_Init
174 */
175
176void _CPU_Context_From_CPU_Init()
177{
178
179#if defined(hppa1_1) && defined(RTEMS_UNIXLIB_SETJMP)
180    /*
181     * HACK - set the _SYSTEM_ID to 0x20c so that setjmp/longjmp
182     * will handle the full 32 floating point registers.
183     *
184     *  NOTE:  Is this a bug in HPUX9?
185     */
186
187    {
188      extern unsigned32 _SYSTEM_ID;
189
190      _SYSTEM_ID = 0x20c;
191    }
192#endif
193
194  /*
195   *  get default values to use in _CPU_Context_Initialize()
196   */
197
198  _CPU_ISR_Set_level( 0 );
199  _CPU_Context_switch(
200    &_CPU_Context_Default_with_ISRs_enabled,
201    &_CPU_Context_Default_with_ISRs_enabled
202  );
203
204  _CPU_ISR_Set_level( 1 );
205  _CPU_Context_switch(
206    &_CPU_Context_Default_with_ISRs_disabled,
207    &_CPU_Context_Default_with_ISRs_disabled
208  );
209}
210
211/*PAGE
212 *
213 *  _CPU_ISR_Get_level
214 */
215
216sigset_t GET_old_mask;
217
218unsigned32 _CPU_ISR_Get_level( void )
219{
220/*  sigset_t  old_mask; */
221   unsigned32 old_level;
222 
223  sigprocmask(0, 0, &GET_old_mask);
224 
225  if (memcmp((void *)&posix_empty_mask, (void *)&GET_old_mask, sizeof(sigset_t)))
226    old_level = 1;
227  else
228    old_level = 0;
229
230  return old_level;
231}
232
233/*  _CPU_Initialize
234 *
235 *  This routine performs processor dependent initialization.
236 *
237 *  INPUT PARAMETERS:
238 *    cpu_table       - CPU table to initialize
239 *    thread_dispatch - address of disptaching routine
240 */
241
242
243void _CPU_Initialize(
244  rtems_cpu_table  *cpu_table,
245  void            (*thread_dispatch)      /* ignored on this CPU */
246)
247{
248  /*
249   *  The thread_dispatch argument is the address of the entry point
250   *  for the routine called at the end of an ISR once it has been
251   *  decided a context switch is necessary.  On some compilation
252   *  systems it is difficult to call a high-level language routine
253   *  from assembly.  This allows us to trick these systems.
254   *
255   *  If you encounter this problem save the entry point in a CPU
256   *  dependent variable.
257   */
258
259  _CPU_Thread_dispatch_pointer = thread_dispatch;
260
261  /*
262   * XXX; If there is not an easy way to initialize the FP context
263   *      during Context_Initialize, then it is usually easier to
264   *      save an "uninitialized" FP context here and copy it to
265   *      the task's during Context_Initialize.
266   */
267
268  /* XXX: FP context initialization support */
269
270  _CPU_Table = *cpu_table;
271
272  _CPU_ISR_From_CPU_Init();
273
274  _CPU_Context_From_CPU_Init();
275
276}
277
278/*PAGE
279 *
280 *  _CPU_ISR_install_raw_handler
281 */
282
283void _CPU_ISR_install_raw_handler(
284  unsigned32  vector,
285  proc_ptr    new_handler,
286  proc_ptr   *old_handler
287)
288{
289  _CPU_Fatal_halt( 0xdeaddead );
290}
291
292/*PAGE
293 *
294 *  _CPU_ISR_install_vector
295 *
296 *  This kernel routine installs the RTEMS handler for the
297 *  specified vector.
298 *
299 *  Input parameters:
300 *    vector      - interrupt vector number
301 *    old_handler - former ISR for this vector number
302 *    new_handler - replacement ISR for this vector number
303 *
304 *  Output parameters:  NONE
305 *
306 */
307
308
309void _CPU_ISR_install_vector(
310  unsigned32  vector,
311  proc_ptr    new_handler,
312  proc_ptr   *old_handler
313)
314{
315   *old_handler = _ISR_Vector_table[ vector ];
316
317   /*
318    *  If the interrupt vector table is a table of pointer to isr entry
319    *  points, then we need to install the appropriate RTEMS interrupt
320    *  handler for this vector number.
321    */
322
323   /*
324    *  We put the actual user ISR address in '_ISR_vector_table'.  This will
325    *  be used by the _CPU_ISR_Handler so the user gets control.
326    */
327
328    _ISR_Vector_table[ vector ] = new_handler;
329}
330
331/*PAGE
332 *
333 *  _CPU_Install_interrupt_stack
334 */
335
336void _CPU_Install_interrupt_stack( void )
337{
338}
339
340/*PAGE
341 *
342 *  _CPU_Internal_threads_Idle_thread_body
343 *
344 *  NOTES:
345 *
346 *  1. This is the same as the regular CPU independent algorithm.
347 *
348 *  2. If you implement this using a "halt", "idle", or "shutdown"
349 *     instruction, then don't forget to put it in an infinite loop.
350 *
351 *  3. Be warned. Some processors with onboard DMA have been known
352 *     to stop the DMA if the CPU were put in IDLE mode.  This might
353 *     also be a problem with other on-chip peripherals.  So use this
354 *     hook with caution.
355 */
356
357void _CPU_Internal_threads_Idle_thread_body( void )
358{
359  while (1)
360    pause();
361}
362
363/*PAGE
364 *
365 *  _CPU_Context_Initialize
366 */
367
368void _CPU_Context_Initialize(
369  Context_Control  *_the_context,
370  unsigned32       *_stack_base,
371  unsigned32        _size,
372  unsigned32        _new_level,
373  void             *_entry_point
374)
375{
376  void        *source;
377  unsigned32  *addr;
378  unsigned32   jmp_addr;
379  unsigned32   _stack_low;   /* lowest "stack aligned" address */
380  unsigned32   _stack_high;  /* highest "stack aligned" address */
381  unsigned32   _the_size;
382
383  jmp_addr = (unsigned32) _entry_point;
384
385  /*
386   *  On CPUs with stacks which grow down, we build the stack
387   *  based on the _stack_high address.  On CPUs with stacks which
388   *  grow up, we build the stack based on the _stack_low address. 
389   */
390
391  _stack_low = ((unsigned32)(_stack_base) + CPU_STACK_ALIGNMENT);
392  _stack_low &= ~(CPU_STACK_ALIGNMENT - 1);
393
394  _stack_high = ((unsigned32)(_stack_base) + _size);
395  _stack_high &= ~(CPU_STACK_ALIGNMENT - 1);
396
397  _the_size = _size & ~(CPU_STACK_ALIGNMENT - 1);
398
399  /*
400   * Slam our jmp_buf template into the context we are creating
401   */
402
403  if ( _new_level == 0 )
404    source = &_CPU_Context_Default_with_ISRs_enabled;
405  else
406    source = &_CPU_Context_Default_with_ISRs_disabled;
407     
408  memcpy(_the_context, source, sizeof(Context_Control) ); /* sizeof(jmp_buf)); */
409
410  addr = (unsigned32 *)_the_context;
411
412#if defined(hppa1_1)
413  *(addr + RP_OFF) = jmp_addr;
414  *(addr + SP_OFF) = (unsigned32)(_stack_low + CPU_FRAME_SIZE);
415
416  /*
417   * See if we are using shared libraries by checking
418   * bit 30 in 24 off of newp. If bit 30 is set then
419   * we are using shared libraries and the jump address
420   * is at what 24 off of newp points to so shove that
421   * into 24 off of newp instead.
422   */
423
424  if (jmp_addr & 0x40000000) {
425    jmp_addr &= 0xfffffffc;
426     *(addr + RP_OFF) = (unsigned32)*(unsigned32 *)jmp_addr;
427  }
428#elif defined(sparc)
429
430  /*
431   *  See /usr/include/sys/stack.h in Solaris 2.3 for a nice
432   *  diagram of the stack.
433   */
434
435  asm ("ta  0x03");            /* flush registers */
436
437  *(addr + RP_OFF) = jmp_addr + ADDR_ADJ_OFFSET;
438  *(addr + SP_OFF) = (unsigned32)(_stack_high - CPU_FRAME_SIZE);
439  *(addr + FP_OFF) = (unsigned32)(_stack_high);
440
441#elif defined(i386)
442 
443    /*
444     *  This information was gathered by disassembling setjmp().
445     */
446
447    {
448      unsigned32 stack_ptr;
449
450      stack_ptr = _stack_high - CPU_FRAME_SIZE;
451
452      *(addr + EBX_OFF) = 0xFEEDFEED;
453      *(addr + ESI_OFF) = 0xDEADDEAD;
454      *(addr + EDI_OFF) = 0xDEAFDEAF;
455      *(addr + EBP_OFF) = stack_ptr;
456      *(addr + ESP_OFF) = stack_ptr;
457      *(addr + RET_OFF) = jmp_addr;
458 
459      addr = (unsigned32 *) stack_ptr;
460 
461      addr[ 0 ] = jmp_addr;
462      addr[ 1 ] = (unsigned32) stack_ptr;
463      addr[ 2 ] = (unsigned32) stack_ptr;
464    }
465
466#else
467#error "UNKNOWN CPU!!!"
468#endif
469
470}
471
472/*PAGE
473 *
474 *  _CPU_Context_restore
475 */
476
477void _CPU_Context_restore(
478  Context_Control  *next
479)
480{
481  Context_Control_overlay *nextp = (Context_Control_overlay *)next;
482
483  sigprocmask( SIG_SETMASK, &nextp->isr_level, 0 );
484  longjmp( nextp->regs, 0 );
485}
486
487/*PAGE
488 *
489 *  _CPU_Context_switch
490 */
491
492void _CPU_Context_switch(
493  Context_Control  *current,
494  Context_Control  *next
495)
496{
497  Context_Control_overlay *currentp = (Context_Control_overlay *)current;
498  Context_Control_overlay *nextp = (Context_Control_overlay *)next;
499
500  int status;
501
502  /*
503   *  Switch levels in one operation
504   */
505
506  status = sigprocmask( SIG_SETMASK, &nextp->isr_level, &currentp->isr_level );
507  if ( status )
508    _Internal_error_Occurred(
509      INTERNAL_ERROR_CORE,
510      TRUE,
511      status
512    );
513
514  if (setjmp(currentp->regs) == 0) {    /* Save the current context */
515     longjmp(nextp->regs, 0);           /* Switch to the new context */
516     if ( status )
517       _Internal_error_Occurred(
518         INTERNAL_ERROR_CORE,
519         TRUE,
520         status
521       );
522  }
523
524}
525 
526/*PAGE
527 *
528 *  _CPU_Save_float_context
529 */
530
531void _CPU_Save_float_context(
532  Context_Control_fp *fp_context
533)
534{
535}
536
537/*PAGE
538 *
539 *  _CPU_Restore_float_context
540 */
541
542void _CPU_Restore_float_context(
543  Context_Control_fp *fp_context
544)
545{
546}
547
548/*PAGE
549 *
550 *  _CPU_ISR_Disable_support
551 */
552
553unsigned32 _CPU_ISR_Disable_support(void)
554{
555  int status;
556  sigset_t  old_mask;
557
558  status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, &old_mask);
559  if ( status )
560    _Internal_error_Occurred(
561      INTERNAL_ERROR_CORE,
562      TRUE,
563      status
564    );
565
566  if (memcmp((void *)&posix_empty_mask, (void *)&old_mask, sizeof(sigset_t)))
567    return 1;
568
569  return 0;
570}
571
572/*PAGE
573 *
574 *  _CPU_ISR_Enable
575 */
576
577void _CPU_ISR_Enable(
578  unsigned32 level
579)
580{
581  int status;
582
583  if (level == 0)
584    status = sigprocmask(SIG_UNBLOCK, &_CPU_Signal_mask, 0);
585  else
586    status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, 0);
587
588  if ( status )
589    _Internal_error_Occurred(
590      INTERNAL_ERROR_CORE,
591      TRUE,
592      status
593    );
594}
595
596/*PAGE
597 *
598 *  _CPU_ISR_Handler
599 *
600 *  External interrupt handler.
601 *  This is installed as a UNIX signal handler.
602 *  It vectors out to specific user interrupt handlers.
603 */
604
605void _CPU_ISR_Handler(int vector)
606{
607  extern void        _Thread_Dispatch(void);
608  extern unsigned32  _Thread_Dispatch_disable_level;
609  extern boolean     _Context_Switch_necessary;
610
611
612  if (_ISR_Nest_level++ == 0) {
613      /* switch to interrupt stack */
614  }
615
616  _Thread_Dispatch_disable_level++;
617
618  if (_ISR_Vector_table[vector]) {
619     _ISR_Vector_table[vector](vector);
620  } else {
621     _CPU_Stray_signal(vector);
622  }
623
624  if (_ISR_Nest_level-- == 0) {
625      /* switch back to original stack */
626  }
627
628  _Thread_Dispatch_disable_level--;
629
630  if (_Thread_Dispatch_disable_level == 0 &&
631      (_Context_Switch_necessary || _ISR_Signals_to_thread_executing)) {
632      _CPU_ISR_Enable(0);
633      _Thread_Dispatch();
634  }
635}
636
637/*PAGE
638 *
639 *  _CPU_Stray_signal
640 */
641
642void _CPU_Stray_signal(int sig_num)
643{
644  char buffer[ 4 ];   
645
646  /*
647   *  We avoid using the stdio section of the library.
648   *  The following is generally safe.
649   */
650
651  buffer[ 0 ] = (sig_num >> 4) + 0x30;
652  buffer[ 1 ] = (sig_num & 0xf) + 0x30;
653  buffer[ 2 ] = '\n';
654
655  write( 2, "Stray signal 0x", 12 );
656  write( 2, buffer, 3 );
657 
658  /*
659   * If it was a "fatal" signal, then exit here
660   * If app code has installed a hander for one of these, then
661   * we won't call _CPU_Stray_signal, so this is ok.
662   */
663 
664  switch (sig_num) {
665      case SIGINT:
666      case SIGHUP:
667      case SIGQUIT:
668      case SIGILL:
669#ifdef SIGEMT
670      case SIGEMT:
671#endif
672      case SIGKILL:
673      case SIGBUS:
674      case SIGSEGV:
675      case SIGTERM:
676          _CPU_Fatal_error(0x100 + sig_num);
677  }
678}
679
680/*PAGE
681 *
682 *  _CPU_Fatal_error
683 */
684
685void _CPU_Fatal_error(unsigned32 error)
686{
687  setitimer(ITIMER_REAL, 0, 0);
688
689  if ( error ) {
690#ifdef RTEMS_DEBUG
691    abort();
692#endif
693    if (getenv("RTEMS_DEBUG"))
694      abort();
695  }
696
697  _exit(error);
698}
699
700/*PAGE
701 *
702 *  _CPU_ffs
703 */
704
705int _CPU_ffs(unsigned32 value)
706{
707  int output;
708  extern int ffs( int );
709
710  output = ffs(value);
711  output = output - 1;
712
713  return output;
714}
715
716
717/*
718 *  Special Purpose Routines to hide the use of UNIX system calls.
719 */
720
721#if 0
722/* XXX clock had this set of #define's */
723
724/*
725 *  In order to get the types and prototypes used in this file under
726 *  Solaris 2.3, it is necessary to pull the following magic.
727 */
728 
729#if defined(solaris)
730#warning "Ignore the undefining __STDC__ warning"
731#undef __STDC__
732#define __STDC__ 0
733#undef  _POSIX_C_SOURCE
734#endif
735#endif
736
737int _CPU_Get_clock_vector( void )
738{
739  return SIGALRM;
740}
741
742
743void _CPU_Start_clock(
744  int microseconds
745)
746{
747  struct itimerval  new;
748
749  new.it_value.tv_sec = 0;
750  new.it_value.tv_usec = microseconds;
751  new.it_interval.tv_sec = 0;
752  new.it_interval.tv_usec = microseconds;
753
754  setitimer(ITIMER_REAL, &new, 0);
755}
756
757void _CPU_Stop_clock( void )
758{
759  struct itimerval  new;
760  struct sigaction  act;
761 
762  /*
763   * Set the SIGALRM signal to ignore any last
764   * signals that might come in while we are
765   * disarming the timer and removing the interrupt
766   * vector.
767   */
768 
769  act.sa_handler = SIG_IGN;
770
771  sigaction(SIGALRM, &act, 0);
772 
773  new.it_value.tv_sec = 0;
774  new.it_value.tv_usec = 0;
775 
776  setitimer(ITIMER_REAL, &new, 0);
777}
778
779int  _CPU_SHM_Semid;
780extern       void fix_syscall_errno( void );
781
782void _CPU_SHM_Init(
783  unsigned32   maximum_nodes,
784  boolean      is_master_node,
785  void       **shm_address,
786  unsigned32  *shm_length
787)
788{
789  int          i;
790  int          shmid;
791  char        *shm_addr;
792  key_t        shm_key;
793  key_t        sem_key;
794  int          status;
795  int          shm_size;
796 
797  if (getenv("RTEMS_SHM_KEY"))
798    shm_key = strtol(getenv("RTEMS_SHM_KEY"), 0, 0);
799  else
800#ifdef RTEMS_SHM_KEY
801    shm_key = RTEMS_SHM_KEY;
802#else
803    shm_key = 0xa000;
804#endif
805 
806    if (getenv("RTEMS_SHM_SIZE"))
807      shm_size = strtol(getenv("RTEMS_SHM_SIZE"), 0, 0);
808    else
809#ifdef RTEMS_SHM_SIZE
810      shm_size = RTEMS_SHM_SIZE;
811#else
812      shm_size = 64 * 1024;
813#endif
814 
815    if (getenv("RTEMS_SHM_SEMAPHORE_KEY"))
816      sem_key = strtol(getenv("RTEMS_SHM_SEMAPHORE_KEY"), 0, 0);
817    else
818#ifdef RTEMS_SHM_SEMAPHORE_KEY
819      sem_key = RTEMS_SHM_SEMAPHORE_KEY;
820#else
821      sem_key = 0xa001;
822#endif
823 
824    shmid = shmget(shm_key, shm_size, IPC_CREAT | 0660);
825    if ( shmid == -1 ) {
826      fix_syscall_errno(); /* in case of newlib */
827      perror( "shmget" );
828      _CPU_Fatal_halt( 0xdead0001 );
829    }
830 
831    shm_addr = shmat(shmid, (char *)0, SHM_RND);
832    if ( shm_addr == (void *)-1 ) {
833      fix_syscall_errno(); /* in case of newlib */
834      perror( "shmat" );
835      _CPU_Fatal_halt( 0xdead0002 );
836    }
837 
838    _CPU_SHM_Semid = semget(sem_key, maximum_nodes + 1, IPC_CREAT | 0660);
839    if ( _CPU_SHM_Semid == -1 ) {
840      fix_syscall_errno(); /* in case of newlib */
841      perror( "semget" );
842      _CPU_Fatal_halt( 0xdead0003 );
843    }
844 
845    if ( is_master_node ) {
846      for ( i=0 ; i <= maximum_nodes ; i++ ) {
847#if defined(solaris2)
848        union semun {
849          int val;
850          struct semid_ds *buf;
851          ushort *array;
852        } help;
853 
854        help.val = 1;
855        status = semctl( _CPU_SHM_Semid, i, SETVAL, help );
856#endif
857#if defined(hpux)
858        status = semctl( _CPU_SHM_Semid, i, SETVAL, 1 );
859#endif
860 
861        fix_syscall_errno(); /* in case of newlib */
862        if ( status == -1 ) {
863          _CPU_Fatal_halt( 0xdead0004 );
864        }
865      }
866    }
867 
868  *shm_address = shm_addr;
869  *shm_length = shm_size;
870
871}
872
873int _CPU_Get_pid( void )
874{
875  return getpid();
876}
877
878/*
879 * Define this to use signals for MPCI shared memory driver.
880 * If undefined, the shared memory driver will poll from the
881 * clock interrupt.
882 * Ref: ../shmsupp/getcfg.c
883 *
884 * BEWARE:: many UN*X kernels and debuggers become severely confused when
885 *          debugging programs which use signals.  The problem is *much*
886 *          worse when using multiple signals, since ptrace(2) tends to
887 *          drop all signals except 1 in the case of multiples.
888 *          On hpux9, this problem was so bad, we couldn't use interrupts
889 *          with the shared memory driver if we ever hoped to debug
890 *          RTEMS programs.
891 *          Maybe systems that use /proc don't have this problem...
892 */
893 
894 
895int _CPU_SHM_Get_vector( void )
896{
897#ifdef CPU_USE_SHM_INTERRUPTS
898  return SIGUSR1;
899#else
900  return 0;
901#endif
902}
903
904void _CPU_SHM_Send_interrupt(
905  int pid,
906  int vector
907)
908{
909  kill((pid_t) pid, vector);
910}
911
912void _CPU_SHM_Lock(
913  int semaphore
914)
915{
916  struct sembuf      sb;
917  int                status;
918 
919  sb.sem_num = semaphore;
920  sb.sem_op  = -1;
921  sb.sem_flg = 0;
922 
923  while (1) {
924    status = semop(_CPU_SHM_Semid, &sb, 1);
925    if ( status >= 0 )
926      break;
927    if ( status == -1 ) {
928       fix_syscall_errno();    /* in case of newlib */
929        if (errno == EINTR)
930            continue;
931        perror("shm lock");
932        _CPU_Fatal_halt( 0xdead0005 );
933    }
934  }
935
936}
937
938void _CPU_SHM_Unlock(
939  int semaphore
940)
941{
942  struct sembuf  sb;
943  int            status;
944 
945  sb.sem_num = semaphore;
946  sb.sem_op  = 1;
947  sb.sem_flg = 0;
948 
949  while (1) {
950    status = semop(_CPU_SHM_Semid, &sb, 1);
951    if ( status >= 0 )
952      break;
953 
954    if ( status == -1 ) {
955      fix_syscall_errno();    /* in case of newlib */
956      if (errno == EINTR)
957          continue;
958      perror("shm unlock");
959      _CPU_Fatal_halt( 0xdead0006 );
960    }
961  }
962
963}
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