source: rtems/c/src/exec/score/cpu/unix/cpu.c @ 0d55427

4.104.114.84.95
Last change on this file since 0d55427 was 0d55427, checked in by Joel Sherrill <joel.sherrill@…>, on Aug 2, 1995 at 8:01:26 PM

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1/*
2 *  HP PA-RISC CPU Dependent Source
3 *
4 *
5 *  To anyone who acknowledges that this file is provided "AS IS"
6 *  without any express or implied warranty:
7 *      permission to use, copy, modify, and distribute this file
8 *      for any purpose is hereby granted without fee, provided that
9 *      the above copyright notice and this notice appears in all
10 *      copies, and that the name of Division Incorporated not be
11 *      used in advertising or publicity pertaining to distribution
12 *      of the software without specific, written prior permission.
13 *      Division Incorporated makes no representations about the
14 *      suitability of this software for any purpose.
15 *
16 *  $Id$
17 */
18
19#include <rtems/system.h>
20#include <rtems/isr.h>
21
22#include <stdio.h>
23#include <stdlib.h>
24#include <signal.h>
25#include <time.h>
26#include <sys/time.h>
27
28#ifndef SA_RESTART
29#define SA_RESTART 0
30#endif
31
32void  _CPU_Signal_initialize(void);
33void  _CPU_Stray_signal(int);
34void  _CPU_ISR_Handler(int);
35
36sigset_t         _CPU_Signal_mask;
37Context_Control  _CPU_Context_Default_with_ISRs_enabled;
38Context_Control  _CPU_Context_Default_with_ISRs_disabled;
39
40/*
41 * Which cpu are we? Used by libcpu and libbsp.
42 */
43
44int cpu_number;
45
46/*PAGE
47 *
48 *  _CPU_ISR_From_CPU_Init
49 */
50
51void _CPU_ISR_From_CPU_Init()
52{
53  unsigned32        i;
54  proc_ptr          old_handler;
55
56
57  /*
58   * Block all the signals except SIGTRAP for the debugger
59   * and SIGABRT for fatal errors.
60   */
61
62  _CPU_ISR_Enable(1);
63
64  (void) sigfillset(&_CPU_Signal_mask);
65  (void) sigdelset(&_CPU_Signal_mask, SIGTRAP);
66  (void) sigdelset(&_CPU_Signal_mask, SIGABRT);
67  (void) sigdelset(&_CPU_Signal_mask, SIGIOT);
68  (void) sigdelset(&_CPU_Signal_mask, SIGCONT);
69
70  sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, 0);
71
72  /*
73   * Set the handler for all signals to be signal_handler
74   * which will then vector out to the correct handler
75   * for whichever signal actually happened. Initially
76   * set the vectors to the stray signal handler.
77   */
78
79  for (i = 0; i < CPU_INTERRUPT_NUMBER_OF_VECTORS; i++)
80      (void)_CPU_ISR_install_vector(i, _CPU_Stray_signal, &old_handler);
81
82  _CPU_Signal_initialize();
83}
84
85void _CPU_Signal_initialize( void )
86{
87  struct sigaction  act;
88  sigset_t          mask;
89
90  /* mark them all active except for TraceTrap  and Abort */
91
92  sigfillset(&mask);
93  sigdelset(&mask, SIGTRAP);
94  sigdelset(&mask, SIGABRT);
95  sigdelset(&mask, SIGIOT);
96  sigdelset(&mask, SIGCONT);
97  sigprocmask(SIG_UNBLOCK, &mask, 0);
98
99  act.sa_handler = _CPU_ISR_Handler;
100  act.sa_mask = mask;
101  act.sa_flags = SA_RESTART;
102
103  sigaction(SIGHUP, &act, 0);
104  sigaction(SIGINT, &act, 0);
105  sigaction(SIGQUIT, &act, 0);
106  sigaction(SIGILL, &act, 0);
107#ifdef SIGEMT
108  sigaction(SIGEMT, &act, 0);
109#endif
110  sigaction(SIGFPE, &act, 0);
111  sigaction(SIGKILL, &act, 0);
112  sigaction(SIGBUS, &act, 0);
113  sigaction(SIGSEGV, &act, 0);
114#ifdef SIGSYS
115  sigaction(SIGSYS, &act, 0);
116#endif
117  sigaction(SIGPIPE, &act, 0);
118  sigaction(SIGALRM, &act, 0);
119  sigaction(SIGTERM, &act, 0);
120  sigaction(SIGUSR1, &act, 0);
121  sigaction(SIGUSR2, &act, 0);
122  sigaction(SIGCHLD, &act, 0);
123  sigaction(SIGCLD, &act, 0);
124  sigaction(SIGPWR, &act, 0);
125  sigaction(SIGVTALRM, &act, 0);
126  sigaction(SIGPROF, &act, 0);
127  sigaction(SIGIO, &act, 0);
128  sigaction(SIGWINCH, &act, 0);
129  sigaction(SIGSTOP, &act, 0);
130  sigaction(SIGTTIN, &act, 0);
131  sigaction(SIGTTOU, &act, 0);
132  sigaction(SIGURG, &act, 0);
133/*
134 *  XXX: Really should be on HPUX.
135 */
136
137#if defined(hppa1_1)
138    sigaction(SIGLOST, &act, 0);
139#endif
140
141}
142
143/*PAGE
144 *
145 *  _CPU_Context_From_CPU_Init
146 */
147
148void _CPU_Context_From_CPU_Init()
149{
150
151#if defined(hppa1_1) && defined(RTEMS_UNIXLIB)
152    /*
153     * HACK - set the _SYSTEM_ID to 0x20c so that setjmp/longjmp
154     * will handle the full 32 floating point registers.
155     *
156     *  NOTE:  Is this a bug in HPUX9?
157     */
158
159    {
160      extern unsigned32 _SYSTEM_ID;
161
162      _SYSTEM_ID = 0x20c;
163    }
164#endif
165
166  /*
167   *  get default values to use in _CPU_Context_Initialize()
168   */
169
170  _CPU_ISR_Set_level( 0 );
171  setjmp( _CPU_Context_Default_with_ISRs_enabled.regs );
172  sigprocmask(
173    SIG_SETMASK,    /* ignored when second arg is NULL */
174    0,
175    &_CPU_Context_Default_with_ISRs_enabled.isr_level
176  );
177
178  _CPU_ISR_Set_level( 1 );
179  setjmp( _CPU_Context_Default_with_ISRs_disabled.regs );
180  sigprocmask(
181    SIG_SETMASK,    /* ignored when second arg is NULL */
182    0,
183    &_CPU_Context_Default_with_ISRs_disabled.isr_level
184  );
185
186}
187
188/*  _CPU_Initialize
189 *
190 *  This routine performs processor dependent initialization.
191 *
192 *  INPUT PARAMETERS:
193 *    cpu_table       - CPU table to initialize
194 *    thread_dispatch - address of disptaching routine
195 */
196
197
198void _CPU_Initialize(
199  rtems_cpu_table  *cpu_table,
200  void      (*thread_dispatch)      /* ignored on this CPU */
201)
202{
203  if ( cpu_table == NULL )
204    _CPU_Fatal_halt( RTEMS_NOT_CONFIGURED );
205
206  /*
207   *  The thread_dispatch argument is the address of the entry point
208   *  for the routine called at the end of an ISR once it has been
209   *  decided a context switch is necessary.  On some compilation
210   *  systems it is difficult to call a high-level language routine
211   *  from assembly.  This allows us to trick these systems.
212   *
213   *  If you encounter this problem save the entry point in a CPU
214   *  dependent variable.
215   */
216
217  _CPU_Thread_dispatch_pointer = thread_dispatch;
218
219  /*
220   * XXX; If there is not an easy way to initialize the FP context
221   *      during Context_Initialize, then it is usually easier to
222   *      save an "uninitialized" FP context here and copy it to
223   *      the task's during Context_Initialize.
224   */
225
226  /* XXX: FP context initialization support */
227
228  _CPU_Table = *cpu_table;
229
230  _CPU_ISR_From_CPU_Init();
231
232  _CPU_Context_From_CPU_Init();
233
234}
235
236/*PAGE
237 *
238 *  _CPU_ISR_install_raw_handler
239 */
240
241void _CPU_ISR_install_raw_handler(
242  unsigned32  vector,
243  proc_ptr    new_handler,
244  proc_ptr   *old_handler
245)
246{
247  _CPU_Fatal_halt( 0xdeaddead );
248}
249
250/*PAGE
251 *
252 *  _CPU_ISR_install_vector
253 *
254 *  This kernel routine installs the RTEMS handler for the
255 *  specified vector.
256 *
257 *  Input parameters:
258 *    vector      - interrupt vector number
259 *    old_handler - former ISR for this vector number
260 *    new_handler - replacement ISR for this vector number
261 *
262 *  Output parameters:  NONE
263 *
264 */
265
266
267void _CPU_ISR_install_vector(
268  unsigned32  vector,
269  proc_ptr    new_handler,
270  proc_ptr   *old_handler
271)
272{
273   *old_handler = _ISR_Vector_table[ vector ];
274
275   /*
276    *  If the interrupt vector table is a table of pointer to isr entry
277    *  points, then we need to install the appropriate RTEMS interrupt
278    *  handler for this vector number.
279    */
280
281   /*
282    *  We put the actual user ISR address in '_ISR_vector_table'.  This will
283    *  be used by the _CPU_ISR_Handler so the user gets control.
284    */
285
286    _ISR_Vector_table[ vector ] = new_handler;
287}
288
289/*PAGE
290 *
291 *  _CPU_Install_interrupt_stack
292 */
293
294void _CPU_Install_interrupt_stack( void )
295{
296}
297
298/*PAGE
299 *
300 *  _CPU_Internal_threads_Idle_thread_body
301 *
302 *  NOTES:
303 *
304 *  1. This is the same as the regular CPU independent algorithm.
305 *
306 *  2. If you implement this using a "halt", "idle", or "shutdown"
307 *     instruction, then don't forget to put it in an infinite loop.
308 *
309 *  3. Be warned. Some processors with onboard DMA have been known
310 *     to stop the DMA if the CPU were put in IDLE mode.  This might
311 *     also be a problem with other on-chip peripherals.  So use this
312 *     hook with caution.
313 */
314
315void _CPU_Internal_threads_Idle_thread_body( void )
316{
317  while (1)
318    pause();
319}
320
321/*PAGE
322 *
323 *  _CPU_Context_Initialize
324 */
325
326void _CPU_Context_Initialize(
327  Context_Control  *_the_context,
328  unsigned32       *_stack_base,
329  unsigned32        _size,
330  unsigned32        _new_level,
331  void             *_entry_point
332)
333{
334  void        *source;
335  unsigned32  *addr;
336  unsigned32   jmp_addr;
337  unsigned32   _stack_low;   /* lowest "stack aligned" address */
338  unsigned32   _stack_high;  /* highest "stack aligned" address */
339  unsigned32   _the_size;
340
341  jmp_addr = (unsigned32) _entry_point;
342
343  /*
344   *  On CPUs with stacks which grow down, we build the stack
345   *  based on the _stack_high address.  On CPUs with stacks which
346   *  grow up, we build the stack based on the _stack_low address. 
347   */
348
349  _stack_low = ((unsigned32)(_stack_base) + CPU_STACK_ALIGNMENT);
350  _stack_low &= ~(CPU_STACK_ALIGNMENT - 1);
351
352  _stack_high = ((unsigned32)(_stack_base) + _size);
353  _stack_high &= ~(CPU_STACK_ALIGNMENT - 1);
354
355  _the_size = _size & ~(CPU_STACK_ALIGNMENT - 1);
356
357  /*
358   * Slam our jmp_buf template into the context we are creating
359   */
360
361  if ( _new_level == 0 )
362    source = _CPU_Context_Default_with_ISRs_enabled.regs;
363  else
364    source = _CPU_Context_Default_with_ISRs_disabled.regs;
365     
366  memcpy(_the_context, source, sizeof(jmp_buf));
367
368  addr = (unsigned32 *)_the_context;
369
370#if defined(hppa1_1)
371  *(addr + RP_OFF) = jmp_addr;
372  *(addr + SP_OFF) = (unsigned32)(_stack_low + CPU_FRAME_SIZE);
373
374  /*
375   * See if we are using shared libraries by checking
376   * bit 30 in 24 off of newp. If bit 30 is set then
377   * we are using shared libraries and the jump address
378   * is at what 24 off of newp points to so shove that
379   * into 24 off of newp instead.
380   */
381
382  if (jmp_addr & 0x40000000) {
383    jmp_addr &= 0xfffffffc;
384     *(addr + RP_OFF) = (unsigned32)*(unsigned32 *)jmp_addr;
385  }
386#elif defined(sparc)
387
388  /*
389   *  See /usr/include/sys/stack.h in Solaris 2.3 for a nice
390   *  diagram of the stack.
391   */
392
393  asm ("ta  0x03");            /* flush registers */
394
395  *(addr + RP_OFF) = jmp_addr + ADDR_ADJ_OFFSET;
396  *(addr + SP_OFF) = (unsigned32)(_stack_high - CPU_FRAME_SIZE);
397  *(addr + FP_OFF) = (unsigned32)(_stack_high);
398
399#elif defined(i386)
400 
401    /*
402     *  This information was gathered by disassembling setjmp().
403     */
404
405    {
406      unsigned32 stack_ptr;
407
408      stack_ptr = _stack_high - CPU_FRAME_SIZE;
409
410      *(addr + EBX_OFF) = 0xFEEDFEED;
411      *(addr + ESI_OFF) = 0xDEADDEAD;
412      *(addr + EDI_OFF) = 0xDEAFDEAF;
413      *(addr + EBP_OFF) = stack_ptr;
414      *(addr + ESP_OFF) = stack_ptr;
415      *(addr + RET_OFF) = jmp_addr;
416 
417      addr = (unsigned32 *) stack_ptr;
418 
419      addr[ 0 ] = jmp_addr;
420      addr[ 1 ] = (unsigned32) stack_ptr;
421      addr[ 2 ] = (unsigned32) stack_ptr;
422    }
423
424#else
425#error "UNKNOWN CPU!!!"
426#endif
427
428}
429
430/*PAGE
431 *
432 *  _CPU_Context_restore
433 */
434
435void _CPU_Context_restore(
436  Context_Control  *next
437)
438{
439  sigprocmask( SIG_SETMASK, &next->isr_level, 0 );
440  longjmp( next->regs, 0 );
441}
442
443/*PAGE
444 *
445 *  _CPU_Context_switch
446 */
447
448void _CPU_Context_switch(
449  Context_Control  *current,
450  Context_Control  *next
451)
452{
453  /*
454   *  Switch levels in one operation
455   */
456
457  sigprocmask( SIG_SETMASK, &next->isr_level, &current->isr_level );
458
459  if (setjmp(current->regs) == 0) {    /* Save the current context */
460     longjmp(next->regs, 0);           /* Switch to the new context */
461  }
462}
463 
464/*PAGE
465 *
466 *  _CPU_Save_float_context
467 */
468
469void _CPU_Save_float_context(
470  Context_Control_fp *fp_context
471)
472{
473}
474
475/*PAGE
476 *
477 *  _CPU_Restore_float_context
478 */
479
480void _CPU_Restore_float_context(
481  Context_Control_fp *fp_context
482)
483{
484}
485
486/*PAGE
487 *
488 *  _CPU_ISR_Disable_support
489 */
490
491unsigned32 _CPU_ISR_Disable_support(void)
492{
493  sigset_t  old_mask;
494  sigset_t  empty_mask;
495
496  sigemptyset(&empty_mask);
497  sigemptyset(&old_mask);
498  sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, &old_mask);
499
500  if (memcmp((char *)&empty_mask, (char *)&old_mask, sizeof(sigset_t)) != 0)
501    return 1;
502
503  return 0;
504}
505
506/*PAGE
507 *
508 *  _CPU_ISR_Enable
509 */
510
511void _CPU_ISR_Enable(
512  unsigned32 level
513)
514{
515  if (level == 0)
516    sigprocmask(SIG_UNBLOCK, &_CPU_Signal_mask, 0);
517  else
518    sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, 0);
519}
520
521/*PAGE
522 *
523 *  _CPU_ISR_Handler
524 *
525 *  External interrupt handler.
526 *  This is installed as a UNIX signal handler.
527 *  It vectors out to specific user interrupt handlers.
528 */
529
530void _CPU_ISR_Handler(int vector)
531{
532  extern void        _Thread_Dispatch(void);
533  extern unsigned32  _Thread_Dispatch_disable_level;
534  extern boolean     _Context_Switch_necessary;
535
536
537  if (_ISR_Nest_level++ == 0) {
538      /* switch to interrupt stack */
539  }
540
541  _Thread_Dispatch_disable_level++;
542
543  if (_ISR_Vector_table[vector]) {
544     _ISR_Vector_table[vector](vector);
545  } else {
546     _CPU_Stray_signal(vector);
547  }
548
549  if (_ISR_Nest_level-- == 0) {
550      /* switch back to original stack */
551  }
552
553  _Thread_Dispatch_disable_level--;
554
555  if (_Thread_Dispatch_disable_level == 0 &&
556      (_Context_Switch_necessary || _ISR_Signals_to_thread_executing)) {
557      _CPU_ISR_Enable(0);
558      _Thread_Dispatch();
559  }
560}
561
562/*PAGE
563 *
564 *  _CPU_Stray_signal
565 */
566
567void _CPU_Stray_signal(int sig_num)
568{
569  char buffer[ 80 ];   
570
571  /*
572   *  We avoid using the stdio section of the library.
573   *  The following is generally safe.
574   */
575
576  write( 
577    2,
578    buffer, 
579    sprintf( buffer, "Stray signal %d\n", sig_num )
580  );
581 
582  /*
583   * If it was a "fatal" signal, then exit here
584   * If app code has installed a hander for one of these, then
585   * we won't call _CPU_Stray_signal, so this is ok.
586   */
587 
588  switch (sig_num) {
589      case SIGINT:
590      case SIGHUP:
591      case SIGQUIT:
592      case SIGILL:
593#ifdef SIGEMT
594      case SIGEMT:
595#endif
596      case SIGKILL:
597      case SIGBUS:
598      case SIGSEGV:
599      case SIGTERM:
600          _CPU_Fatal_error(0x100 + sig_num);
601  }
602}
603
604/*PAGE
605 *
606 *  _CPU_Fatal_error
607 */
608
609void _CPU_Fatal_error(unsigned32 error)
610{
611  setitimer(ITIMER_REAL, 0, 0);
612
613  _exit(error);
614}
615
616/*PAGE
617 *
618 *  _CPU_ffs
619 */
620
621int _CPU_ffs(unsigned32 value)
622{
623  int output;
624  extern int ffs( int );
625
626  output = ffs(value);
627  output = output - 1;
628
629  return output;
630}
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