source: rtems/c/src/exec/score/cpu/unix/cpu.c @ 0a6fb22

4.104.114.84.95
Last change on this file since 0a6fb22 was 0a6fb22, checked in by Joel Sherrill <joel.sherrill@…>, on Apr 22, 1997 at 8:19:25 PM

Patch from Chris John <cjohns@…> to add use of a select statement
in the unix port idle thread task. This should keep the entire application
from blocking when any component does a blocking application. Also added
TOD_MICROSECONDS_TO_TICKS.

  • Property mode set to 100644
File size: 23.0 KB
Line 
1/*
2 *  UNIX Simulator Dependent Source
3 *
4 *  COPYRIGHT (c) 1994,95 by Division Incorporated
5 *
6 *  The license and distribution terms for this file may in
7 *  the file LICENSE in this distribution or at
8 *  http://www.OARcorp.com/rtems/license.html.
9 *
10 *  $Id$
11 */
12
13#include <rtems/system.h>
14#include <rtems/score/isr.h>
15#include <rtems/score/interr.h>
16
17#if defined(solaris2)
18/*
19#undef  _POSIX_C_SOURCE
20#define _POSIX_C_SOURCE 3
21#undef  __STRICT_ANSI__
22#define __STRICT_ANSI__
23*/
24#define __EXTENSIONS__
25#endif
26
27#if defined(__linux__)
28#define MALLOC_0_RETURNS_NULL
29#endif
30
31#include <sys/types.h>
32#include <sys/times.h>
33#include <stdio.h>
34#include <stdlib.h>
35#include <setjmp.h>
36#include <signal.h>
37#include <time.h>
38#include <sys/time.h>
39#include <errno.h>
40#include <unistd.h>
41#include <sys/ipc.h>
42#include <sys/shm.h>
43#include <sys/sem.h>
44#include <string.h>   /* memset */
45
46#ifndef SA_RESTART
47#define SA_RESTART 0
48#endif
49
50typedef struct {
51  jmp_buf   regs;
52  unsigned32  isr_level;
53} Context_Control_overlay;
54
55void  _CPU_Signal_initialize(void);
56void  _CPU_Stray_signal(int);
57void  _CPU_ISR_Handler(int);
58
59static sigset_t         _CPU_Signal_mask;
60static Context_Control_overlay
61          _CPU_Context_Default_with_ISRs_enabled CPU_STRUCTURE_ALIGNMENT;
62static Context_Control_overlay
63          _CPU_Context_Default_with_ISRs_disabled CPU_STRUCTURE_ALIGNMENT;
64
65/*
66 * Sync IO support, an entry for each fd that can be set
67 */
68
69void  _CPU_Sync_io_Init();
70
71static rtems_sync_io_handler _CPU_Sync_io_handlers[FD_SETSIZE];
72static int sync_io_nfds;
73static fd_set sync_io_readfds;
74static fd_set sync_io_writefds;
75static fd_set sync_io_exceptfds;
76
77/*
78 * Which cpu are we? Used by libcpu and libbsp.
79 */
80
81int cpu_number;
82
83/*PAGE
84 *
85 *  _CPU_ISR_From_CPU_Init
86 */
87
88sigset_t  posix_empty_mask;
89
90void _CPU_ISR_From_CPU_Init()
91{
92  unsigned32        i;
93  proc_ptr          old_handler;
94
95  /*
96   * Generate an empty mask to be used by disable_support
97   */
98
99  sigemptyset(&posix_empty_mask);
100
101  /*
102   * Block all the signals except SIGTRAP for the debugger
103   * and fatal error signals.
104   */
105
106  (void) sigfillset(&_CPU_Signal_mask);
107  (void) sigdelset(&_CPU_Signal_mask, SIGTRAP);
108  (void) sigdelset(&_CPU_Signal_mask, SIGABRT);
109  (void) sigdelset(&_CPU_Signal_mask, SIGIOT);
110  (void) sigdelset(&_CPU_Signal_mask, SIGCONT);
111  (void) sigdelset(&_CPU_Signal_mask, SIGSEGV);
112  (void) sigdelset(&_CPU_Signal_mask, SIGBUS);
113  (void) sigdelset(&_CPU_Signal_mask, SIGFPE);
114
115  _CPU_ISR_Enable(1);
116
117  /*
118   * Set the handler for all signals to be signal_handler
119   * which will then vector out to the correct handler
120   * for whichever signal actually happened. Initially
121   * set the vectors to the stray signal handler.
122   */
123
124  for (i = 0; i < CPU_INTERRUPT_NUMBER_OF_VECTORS; i++)
125      (void)_CPU_ISR_install_vector(i, _CPU_Stray_signal, &old_handler);
126
127  _CPU_Signal_initialize();
128}
129
130void _CPU_Signal_initialize( void )
131{
132  struct sigaction  act;
133  sigset_t          mask;
134
135  /* mark them all active except for TraceTrap  and Abort */
136
137  mask = _CPU_Signal_mask;
138  sigprocmask(SIG_UNBLOCK, &mask, 0);
139
140  act.sa_handler = _CPU_ISR_Handler;
141  act.sa_mask = mask;
142  act.sa_flags = SA_RESTART;
143
144  sigaction(SIGHUP, &act, 0);
145  sigaction(SIGINT, &act, 0);
146  sigaction(SIGQUIT, &act, 0);
147  sigaction(SIGILL, &act, 0);
148#ifdef SIGEMT
149  sigaction(SIGEMT, &act, 0);
150#endif
151  sigaction(SIGFPE, &act, 0);
152  sigaction(SIGKILL, &act, 0);
153  sigaction(SIGBUS, &act, 0);
154  sigaction(SIGSEGV, &act, 0);
155#ifdef SIGSYS
156  sigaction(SIGSYS, &act, 0);
157#endif
158  sigaction(SIGPIPE, &act, 0);
159  sigaction(SIGALRM, &act, 0);
160  sigaction(SIGTERM, &act, 0);
161  sigaction(SIGUSR1, &act, 0);
162  sigaction(SIGUSR2, &act, 0);
163  sigaction(SIGCHLD, &act, 0);
164  sigaction(SIGCLD, &act, 0);
165  sigaction(SIGPWR, &act, 0);
166  sigaction(SIGVTALRM, &act, 0);
167  sigaction(SIGPROF, &act, 0);
168  sigaction(SIGIO, &act, 0);
169  sigaction(SIGWINCH, &act, 0);
170  sigaction(SIGSTOP, &act, 0);
171  sigaction(SIGTTIN, &act, 0);
172  sigaction(SIGTTOU, &act, 0);
173  sigaction(SIGURG, &act, 0);
174#ifdef SIGLOST
175    sigaction(SIGLOST, &act, 0);
176#endif
177}
178
179/*PAGE
180 *
181 *  _CPU_Context_From_CPU_Init
182 */
183
184void _CPU_Context_From_CPU_Init()
185{
186
187#if defined(hppa1_1) && defined(RTEMS_UNIXLIB_SETJMP)
188    /*
189     * HACK - set the _SYSTEM_ID to 0x20c so that setjmp/longjmp
190     * will handle the full 32 floating point registers.
191     */
192
193    {
194      extern unsigned32 _SYSTEM_ID;
195
196      _SYSTEM_ID = 0x20c;
197    }
198#endif
199
200  /*
201   *  get default values to use in _CPU_Context_Initialize()
202   */
203
204
205  (void) memset(
206    &_CPU_Context_Default_with_ISRs_enabled,
207    0,
208    sizeof(Context_Control)
209  );
210  (void) memset(
211    &_CPU_Context_Default_with_ISRs_disabled,
212    0,
213    sizeof(Context_Control)
214  );
215
216  _CPU_ISR_Set_level( 0 );
217  _CPU_Context_switch(
218    (Context_Control *) &_CPU_Context_Default_with_ISRs_enabled,
219    (Context_Control *) &_CPU_Context_Default_with_ISRs_enabled
220  );
221
222  _CPU_ISR_Set_level( 1 );
223  _CPU_Context_switch(
224    (Context_Control *) &_CPU_Context_Default_with_ISRs_disabled,
225    (Context_Control *) &_CPU_Context_Default_with_ISRs_disabled
226  );
227}
228
229/*PAGE
230 *
231 *  _CPU_Sync_io_Init
232 */
233
234void _CPU_Sync_io_Init()
235{
236  int fd;
237
238  for (fd = 0; fd < FD_SETSIZE; fd++)
239    _CPU_Sync_io_handlers[fd] = NULL;
240
241  sync_io_nfds = 0;
242  FD_ZERO(&sync_io_readfds);
243  FD_ZERO(&sync_io_writefds);
244  FD_ZERO(&sync_io_exceptfds);
245}
246
247/*PAGE
248 *
249 *  _CPU_ISR_Get_level
250 */
251
252unsigned32 _CPU_ISR_Get_level( void )
253{
254  sigset_t old_mask;
255
256  sigprocmask(SIG_BLOCK, 0, &old_mask);
257
258  if (memcmp((void *)&posix_empty_mask, (void *)&old_mask, sizeof(sigset_t)))
259      return 1;
260
261  return 0;
262}
263
264/*  _CPU_Initialize
265 *
266 *  This routine performs processor dependent initialization.
267 *
268 *  INPUT PARAMETERS:
269 *    cpu_table       - CPU table to initialize
270 *    thread_dispatch - address of disptaching routine
271 */
272
273
274void _CPU_Initialize(
275  rtems_cpu_table  *cpu_table,
276  void            (*thread_dispatch)      /* ignored on this CPU */
277)
278{
279  /*
280   *  The thread_dispatch argument is the address of the entry point
281   *  for the routine called at the end of an ISR once it has been
282   *  decided a context switch is necessary.  On some compilation
283   *  systems it is difficult to call a high-level language routine
284   *  from assembly.  This allows us to trick these systems.
285   *
286   *  If you encounter this problem save the entry point in a CPU
287   *  dependent variable.
288   */
289
290  _CPU_Thread_dispatch_pointer = thread_dispatch;
291
292  /*
293   * XXX; If there is not an easy way to initialize the FP context
294   *      during Context_Initialize, then it is usually easier to
295   *      save an "uninitialized" FP context here and copy it to
296   *      the task's during Context_Initialize.
297   */
298
299  /* XXX: FP context initialization support */
300
301  _CPU_Table = *cpu_table;
302
303  _CPU_ISR_From_CPU_Init();
304
305  _CPU_Sync_io_Init();
306
307  _CPU_Context_From_CPU_Init();
308
309}
310
311/*PAGE
312 *
313 *  _CPU_ISR_install_raw_handler
314 */
315
316void _CPU_ISR_install_raw_handler(
317  unsigned32  vector,
318  proc_ptr    new_handler,
319  proc_ptr   *old_handler
320)
321{
322  _CPU_Fatal_halt( 0xdeaddead );
323}
324
325/*PAGE
326 *
327 *  _CPU_ISR_install_vector
328 *
329 *  This kernel routine installs the RTEMS handler for the
330 *  specified vector.
331 *
332 *  Input parameters:
333 *    vector      - interrupt vector number
334 *    old_handler - former ISR for this vector number
335 *    new_handler - replacement ISR for this vector number
336 *
337 *  Output parameters:  NONE
338 *
339 */
340
341
342void _CPU_ISR_install_vector(
343  unsigned32  vector,
344  proc_ptr    new_handler,
345  proc_ptr   *old_handler
346)
347{
348   *old_handler = _ISR_Vector_table[ vector ];
349
350   /*
351    *  If the interrupt vector table is a table of pointer to isr entry
352    *  points, then we need to install the appropriate RTEMS interrupt
353    *  handler for this vector number.
354    */
355
356   /*
357    *  We put the actual user ISR address in '_ISR_vector_table'.  This will
358    *  be used by the _CPU_ISR_Handler so the user gets control.
359    */
360
361    _ISR_Vector_table[ vector ] = new_handler;
362}
363
364/*PAGE
365 *
366 *  _CPU_Install_interrupt_stack
367 */
368
369void _CPU_Install_interrupt_stack( void )
370{
371}
372
373/*PAGE
374 *
375 *  _CPU_Thread_Idle_body
376 *
377 *  Stop until we get a signal which is the logically the same thing
378 *  entering low-power or sleep mode on a real processor and waiting for
379 *  an interrupt.  This significantly reduces the consumption of host
380 *  CPU cycles which is again similar to low power mode.
381 */
382
383void _CPU_Thread_Idle_body( void )
384{
385#if CPU_SYNC_IO
386  extern void _Thread_Dispatch(void);
387  int fd;
388#endif
389
390  while (1) {
391#ifdef RTEMS_DEBUG
392    /* interrupts had better be enabled at this point! */
393    if (_CPU_ISR_Get_level() != 0)
394       abort();
395#endif
396
397    /*
398     *  Block on a select statement, the CPU interface added allow the
399     *  user to add new descriptors which are to be blocked on
400     */
401
402#if CPU_SYNC_IO
403    if (sync_io_nfds) {
404      int result;
405
406      result = select(sync_io_nfds,
407                 &sync_io_readfds,
408                 &sync_io_writefds,
409                 &sync_io_exceptfds,
410                 NULL);
411
412      if ((result < 0) && (errno != EINTR))
413        _CPU_Fatal_error(0x200);       /* FIXME : what number should go here !! */
414
415      for (fd = 0; fd < sync_io_nfds; fd++) {
416        boolean read = FD_ISSET(fd, &sync_io_readfds);
417        boolean write = FD_ISSET(fd, &sync_io_writefds);
418        boolean except = FD_ISSET(fd, &sync_io_exceptfds);
419
420        if (_CPU_Sync_io_handlers[fd] && (read || write || except))
421          _CPU_Sync_io_handlers[fd](fd, read, write, except);
422
423        _Thread_Dispatch();
424      }
425    } else
426      pause();
427#else
428    pause();
429#endif
430
431  }
432
433}
434
435/*PAGE
436 *
437 *  _CPU_Context_Initialize
438 */
439
440void _CPU_Context_Initialize(
441  Context_Control  *_the_context,
442  unsigned32       *_stack_base,
443  unsigned32        _size,
444  unsigned32        _new_level,
445  void             *_entry_point,
446  boolean           _is_fp
447)
448{
449  unsigned32  *addr;
450  unsigned32   jmp_addr;
451  unsigned32   _stack_low;   /* lowest "stack aligned" address */
452  unsigned32   _stack_high;  /* highest "stack aligned" address */
453  unsigned32   _the_size;
454
455  jmp_addr = (unsigned32) _entry_point;
456
457  /*
458   *  On CPUs with stacks which grow down, we build the stack
459   *  based on the _stack_high address.  On CPUs with stacks which
460   *  grow up, we build the stack based on the _stack_low address.
461   */
462
463  _stack_low = (unsigned32)(_stack_base) + CPU_STACK_ALIGNMENT - 1;
464  _stack_low &= ~(CPU_STACK_ALIGNMENT - 1);
465
466  _stack_high = (unsigned32)(_stack_base) + _size;
467  _stack_high &= ~(CPU_STACK_ALIGNMENT - 1);
468
469  if (_stack_high > _stack_low)
470    _the_size = _stack_high - _stack_low;
471  else
472    _the_size = _stack_low - _stack_high;
473
474  /*
475   * Slam our jmp_buf template into the context we are creating
476   */
477
478  if ( _new_level == 0 )
479      *_the_context = *(Context_Control *)
480                         &_CPU_Context_Default_with_ISRs_enabled;
481  else
482      *_the_context = *(Context_Control *)
483                         &_CPU_Context_Default_with_ISRs_disabled;
484
485  addr = (unsigned32 *)_the_context;
486
487#if defined(hppa1_1)
488  *(addr + RP_OFF) = jmp_addr;
489  *(addr + SP_OFF) = (unsigned32)(_stack_low + CPU_FRAME_SIZE);
490
491  /*
492   * See if we are using shared libraries by checking
493   * bit 30 in 24 off of newp. If bit 30 is set then
494   * we are using shared libraries and the jump address
495   * points to the pointer, so we put that into rp instead.
496   */
497
498  if (jmp_addr & 0x40000000) {
499    jmp_addr &= 0xfffffffc;
500     *(addr + RP_OFF) = *(unsigned32 *)jmp_addr;
501  }
502#elif defined(sparc)
503
504  /*
505   *  See /usr/include/sys/stack.h in Solaris 2.3 for a nice
506   *  diagram of the stack.
507   */
508
509  asm ("ta  0x03");            /* flush registers */
510
511  *(addr + RP_OFF) = jmp_addr + ADDR_ADJ_OFFSET;
512  *(addr + SP_OFF) = (unsigned32)(_stack_high - CPU_FRAME_SIZE);
513  *(addr + FP_OFF) = (unsigned32)(_stack_high);
514
515#elif defined(i386) || defined(__i386__)
516
517    /*
518     *  This information was gathered by disassembling setjmp().
519     */
520
521    {
522      unsigned32 stack_ptr;
523
524      stack_ptr = _stack_high - CPU_FRAME_SIZE;
525
526      *(addr + EBX_OFF) = 0xFEEDFEED;
527      *(addr + ESI_OFF) = 0xDEADDEAD;
528      *(addr + EDI_OFF) = 0xDEAFDEAF;
529      *(addr + EBP_OFF) = stack_ptr;
530      *(addr + ESP_OFF) = stack_ptr;
531      *(addr + RET_OFF) = jmp_addr;
532
533      addr = (unsigned32 *) stack_ptr;
534
535      addr[ 0 ] = jmp_addr;
536      addr[ 1 ] = (unsigned32) stack_ptr;
537      addr[ 2 ] = (unsigned32) stack_ptr;
538    }
539
540#else
541#error "UNKNOWN CPU!!!"
542#endif
543
544}
545
546/*PAGE
547 *
548 *  _CPU_Context_restore
549 */
550
551void _CPU_Context_restore(
552  Context_Control  *next
553)
554{
555  Context_Control_overlay *nextp = (Context_Control_overlay *)next;
556
557  _CPU_ISR_Enable(nextp->isr_level);
558  longjmp( nextp->regs, 0 );
559}
560
561/*PAGE
562 *
563 *  _CPU_Context_switch
564 */
565
566static void do_jump(
567  Context_Control_overlay *currentp,
568  Context_Control_overlay *nextp
569);
570
571void _CPU_Context_switch(
572  Context_Control  *current,
573  Context_Control  *next
574)
575{
576  Context_Control_overlay *currentp = (Context_Control_overlay *)current;
577  Context_Control_overlay *nextp = (Context_Control_overlay *)next;
578#if 0
579  int status;
580#endif
581
582  currentp->isr_level = _CPU_ISR_Disable_support();
583
584  do_jump( currentp, nextp );
585
586#if 0
587  if (sigsetjmp(currentp->regs, 1) == 0) {    /* Save the current context */
588     siglongjmp(nextp->regs, 0);           /* Switch to the new context */
589     _Internal_error_Occurred(
590         INTERNAL_ERROR_CORE,
591         TRUE,
592         status
593       );
594  }
595#endif
596
597#ifdef RTEMS_DEBUG
598    if (_CPU_ISR_Get_level() == 0)
599       abort();
600#endif
601
602  _CPU_ISR_Enable(currentp->isr_level);
603}
604
605static void do_jump(
606  Context_Control_overlay *currentp,
607  Context_Control_overlay *nextp
608)
609{
610  int status;
611
612  if (setjmp(currentp->regs) == 0) {    /* Save the current context */
613     longjmp(nextp->regs, 0);           /* Switch to the new context */
614     _Internal_error_Occurred(
615         INTERNAL_ERROR_CORE,
616         TRUE,
617         status
618       );
619  }
620}
621
622/*PAGE
623 *
624 *  _CPU_Save_float_context
625 */
626
627void _CPU_Save_float_context(
628  Context_Control_fp *fp_context
629)
630{
631}
632
633/*PAGE
634 *
635 *  _CPU_Restore_float_context
636 */
637
638void _CPU_Restore_float_context(
639  Context_Control_fp *fp_context
640)
641{
642}
643
644/*PAGE
645 *
646 *  _CPU_ISR_Disable_support
647 */
648
649unsigned32 _CPU_ISR_Disable_support(void)
650{
651  int status;
652  sigset_t  old_mask;
653
654  status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, &old_mask);
655  if ( status )
656    _Internal_error_Occurred(
657      INTERNAL_ERROR_CORE,
658      TRUE,
659      status
660    );
661
662  if (memcmp((void *)&posix_empty_mask, (void *)&old_mask, sizeof(sigset_t)))
663    return 1;
664
665  return 0;
666}
667
668/*PAGE
669 *
670 *  _CPU_ISR_Enable
671 */
672
673void _CPU_ISR_Enable(
674  unsigned32 level
675)
676{
677  int status;
678
679  if (level == 0)
680    status = sigprocmask(SIG_UNBLOCK, &_CPU_Signal_mask, 0);
681  else
682    status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, 0);
683
684  if ( status )
685    _Internal_error_Occurred(
686      INTERNAL_ERROR_CORE,
687      TRUE,
688      status
689    );
690}
691
692/*PAGE
693 *
694 *  _CPU_ISR_Handler
695 *
696 *  External interrupt handler.
697 *  This is installed as a UNIX signal handler.
698 *  It vectors out to specific user interrupt handlers.
699 */
700
701void _CPU_ISR_Handler(int vector)
702{
703  extern void        _Thread_Dispatch(void);
704  extern unsigned32  _Thread_Dispatch_disable_level;
705  extern boolean     _Context_Switch_necessary;
706
707  if (_ISR_Nest_level++ == 0) {
708      /* switch to interrupt stack */
709  }
710
711  _Thread_Dispatch_disable_level++;
712
713  if (_ISR_Vector_table[vector]) {
714     _ISR_Vector_table[vector](vector);
715  } else {
716     _CPU_Stray_signal(vector);
717  }
718
719  if (_ISR_Nest_level-- == 0) {
720      /* switch back to original stack */
721  }
722
723  _Thread_Dispatch_disable_level--;
724
725  if (_Thread_Dispatch_disable_level == 0 &&
726      (_Context_Switch_necessary || _ISR_Signals_to_thread_executing)) {
727      _ISR_Signals_to_thread_executing = FALSE;
728      _CPU_ISR_Enable(0);
729      _Thread_Dispatch();
730  }
731}
732
733/*PAGE
734 *
735 *  _CPU_Stray_signal
736 */
737
738void _CPU_Stray_signal(int sig_num)
739{
740  char buffer[ 4 ];
741
742  /*
743   * print "stray" msg about ones which that might mean something
744   * Avoid using the stdio section of the library.
745   * The following is generally safe.
746   */
747
748  switch (sig_num)
749  {
750      case SIGCLD:
751          break;
752
753      default:
754      {
755        /*
756         *  We avoid using the stdio section of the library.
757         *  The following is generally safe
758         */
759
760        int digit;
761        int number = sig_num;
762        int len = 0;
763
764        digit = number / 100;
765        number %= 100;
766        if (digit) buffer[len++] = '0' + digit;
767
768        digit = number / 10;
769        number %= 10;
770        if (digit || len) buffer[len++] = '0' + digit;
771
772        digit = number;
773        buffer[len++] = '0' + digit;
774
775        buffer[ len++ ] = '\n';
776
777        write( 2, "Stray signal ", 13 );
778        write( 2, buffer, len );
779
780      }
781  }
782
783  /*
784   * If it was a "fatal" signal, then exit here
785   * If app code has installed a hander for one of these, then
786   * we won't call _CPU_Stray_signal, so this is ok.
787   */
788
789  switch (sig_num) {
790      case SIGINT:
791      case SIGHUP:
792      case SIGQUIT:
793      case SIGILL:
794#ifdef SIGEMT
795      case SIGEMT:
796#endif
797      case SIGKILL:
798      case SIGBUS:
799      case SIGSEGV:
800      case SIGTERM:
801      case SIGIOT:
802        _CPU_Fatal_error(0x100 + sig_num);
803  }
804}
805
806/*PAGE
807 *
808 *  _CPU_Fatal_error
809 */
810
811void _CPU_Fatal_error(unsigned32 error)
812{
813  setitimer(ITIMER_REAL, 0, 0);
814
815  if ( error ) {
816#ifdef RTEMS_DEBUG
817    abort();
818#endif
819    if (getenv("RTEMS_DEBUG"))
820      abort();
821  }
822
823  _exit(error);
824}
825
826/*
827 *  Special Purpose Routines to hide the use of UNIX system calls.
828 */
829
830int _CPU_Set_sync_io_handler(
831  int fd,
832  boolean read,
833  boolean write,
834  boolean except,
835  rtems_sync_io_handler handler
836)
837{
838  if ((fd < FD_SETSIZE) && (_CPU_Sync_io_handlers[fd] == NULL)) {
839    if (read)
840      FD_SET(fd, &sync_io_readfds);
841    else
842      FD_CLR(fd, &sync_io_readfds);
843    if (write)
844      FD_SET(fd, &sync_io_writefds);
845    else
846      FD_CLR(fd, &sync_io_writefds);
847    if (except)
848      FD_SET(fd, &sync_io_exceptfds);
849    else
850      FD_CLR(fd, &sync_io_exceptfds);
851    _CPU_Sync_io_handlers[fd] = handler;
852    if ((fd + 1) > sync_io_nfds)
853      sync_io_nfds = fd + 1;
854    return 0;
855  }
856  return -1;
857}
858
859int _CPU_Clear_sync_io_handler(
860  int fd
861)
862{
863  if ((fd < FD_SETSIZE) && _CPU_Sync_io_handlers[fd]) {
864    FD_CLR(fd, &sync_io_readfds);
865    FD_CLR(fd, &sync_io_writefds);
866    FD_CLR(fd, &sync_io_exceptfds);
867    _CPU_Sync_io_handlers[fd] = NULL;
868    sync_io_nfds = 0;
869    for (fd = 0; fd < FD_SETSIZE; fd++)
870      if (FD_ISSET(fd, &sync_io_readfds) ||
871          FD_ISSET(fd, &sync_io_writefds) ||
872          FD_ISSET(fd, &sync_io_exceptfds))
873        sync_io_nfds = fd;
874    return 0;
875  }
876  return -1;
877}
878
879int _CPU_Get_clock_vector( void )
880{
881  return SIGALRM;
882}
883
884void _CPU_Start_clock(
885  int microseconds
886)
887{
888  struct itimerval  new;
889
890  new.it_value.tv_sec = 0;
891  new.it_value.tv_usec = microseconds;
892  new.it_interval.tv_sec = 0;
893  new.it_interval.tv_usec = microseconds;
894
895  setitimer(ITIMER_REAL, &new, 0);
896}
897
898void _CPU_Stop_clock( void )
899{
900  struct itimerval  new;
901  struct sigaction  act;
902
903  /*
904   * Set the SIGALRM signal to ignore any last
905   * signals that might come in while we are
906   * disarming the timer and removing the interrupt
907   * vector.
908   */
909
910  (void) memset(&act, 0, sizeof(act));
911  act.sa_handler = SIG_IGN;
912
913  sigaction(SIGALRM, &act, 0);
914
915  (void) memset(&new, 0, sizeof(new));
916  setitimer(ITIMER_REAL, &new, 0);
917}
918
919int  _CPU_SHM_Semid;
920extern       void fix_syscall_errno( void );
921
922void _CPU_SHM_Init(
923  unsigned32   maximum_nodes,
924  boolean      is_master_node,
925  void       **shm_address,
926  unsigned32  *shm_length
927)
928{
929  int          i;
930  int          shmid;
931  char        *shm_addr;
932  key_t        shm_key;
933  key_t        sem_key;
934  int          status = 0;  /* to avoid unitialized warnings */
935  int          shm_size;
936
937  if (getenv("RTEMS_SHM_KEY"))
938    shm_key = strtol(getenv("RTEMS_SHM_KEY"), 0, 0);
939  else
940#ifdef RTEMS_SHM_KEY
941    shm_key = RTEMS_SHM_KEY;
942#else
943    shm_key = 0xa000;
944#endif
945
946    if (getenv("RTEMS_SHM_SIZE"))
947      shm_size = strtol(getenv("RTEMS_SHM_SIZE"), 0, 0);
948    else
949#ifdef RTEMS_SHM_SIZE
950      shm_size = RTEMS_SHM_SIZE;
951#else
952      shm_size = 64 * 1024;
953#endif
954
955    if (getenv("RTEMS_SHM_SEMAPHORE_KEY"))
956      sem_key = strtol(getenv("RTEMS_SHM_SEMAPHORE_KEY"), 0, 0);
957    else
958#ifdef RTEMS_SHM_SEMAPHORE_KEY
959      sem_key = RTEMS_SHM_SEMAPHORE_KEY;
960#else
961      sem_key = 0xa001;
962#endif
963
964    shmid = shmget(shm_key, shm_size, IPC_CREAT | 0660);
965    if ( shmid == -1 ) {
966      fix_syscall_errno(); /* in case of newlib */
967      perror( "shmget" );
968      _CPU_Fatal_halt( 0xdead0001 );
969    }
970
971    shm_addr = shmat(shmid, (char *)0, SHM_RND);
972    if ( shm_addr == (void *)-1 ) {
973      fix_syscall_errno(); /* in case of newlib */
974      perror( "shmat" );
975      _CPU_Fatal_halt( 0xdead0002 );
976    }
977
978    _CPU_SHM_Semid = semget(sem_key, maximum_nodes + 1, IPC_CREAT | 0660);
979    if ( _CPU_SHM_Semid == -1 ) {
980      fix_syscall_errno(); /* in case of newlib */
981      perror( "semget" );
982      _CPU_Fatal_halt( 0xdead0003 );
983    }
984
985    if ( is_master_node ) {
986      for ( i=0 ; i <= maximum_nodes ; i++ ) {
987#if defined(solaris2)
988        union semun {
989          int val;
990          struct semid_ds *buf;
991          ushort *array;
992        } help;
993
994        help.val = 1;
995        status = semctl( _CPU_SHM_Semid, i, SETVAL, help );
996#elif defined(hpux) || defined(__linux__)
997        status = semctl( _CPU_SHM_Semid, i, SETVAL, 1 );
998#else
999#error "Not a supported unix variant"
1000#endif
1001
1002        fix_syscall_errno(); /* in case of newlib */
1003        if ( status == -1 ) {
1004          _CPU_Fatal_halt( 0xdead0004 );
1005        }
1006      }
1007    }
1008
1009  *shm_address = shm_addr;
1010  *shm_length = shm_size;
1011
1012}
1013
1014int _CPU_Get_pid( void )
1015{
1016  return getpid();
1017}
1018
1019/*
1020 * Define this to use signals for MPCI shared memory driver.
1021 * If undefined, the shared memory driver will poll from the
1022 * clock interrupt.
1023 * Ref: ../shmsupp/getcfg.c
1024 *
1025 * BEWARE:: many UN*X kernels and debuggers become severely confused when
1026 *          debugging programs which use signals.  The problem is *much*
1027 *          worse when using multiple signals, since ptrace(2) tends to
1028 *          drop all signals except 1 in the case of multiples.
1029 *          On hpux9, this problem was so bad, we couldn't use interrupts
1030 *          with the shared memory driver if we ever hoped to debug
1031 *          RTEMS programs.
1032 *          Maybe systems that use /proc don't have this problem...
1033 */
1034
1035
1036int _CPU_SHM_Get_vector( void )
1037{
1038#ifdef CPU_USE_SHM_INTERRUPTS
1039  return SIGUSR1;
1040#else
1041  return 0;
1042#endif
1043}
1044
1045void _CPU_SHM_Send_interrupt(
1046  int pid,
1047  int vector
1048)
1049{
1050  kill((pid_t) pid, vector);
1051}
1052
1053void _CPU_SHM_Lock(
1054  int semaphore
1055)
1056{
1057  struct sembuf sb;
1058
1059  sb.sem_num = semaphore;
1060  sb.sem_op  = -1;
1061  sb.sem_flg = 0;
1062
1063  while (1) {
1064    int status = -1;
1065
1066    status = semop(_CPU_SHM_Semid, &sb, 1);
1067    if ( status >= 0 )
1068      break;
1069    if ( status == -1 ) {
1070       fix_syscall_errno();    /* in case of newlib */
1071        if (errno == EINTR)
1072            continue;
1073        perror("shm lock");
1074        _CPU_Fatal_halt( 0xdead0005 );
1075    }
1076  }
1077
1078}
1079
1080void _CPU_SHM_Unlock(
1081  int semaphore
1082)
1083{
1084  struct sembuf  sb;
1085  int            status;
1086
1087  sb.sem_num = semaphore;
1088  sb.sem_op  = 1;
1089  sb.sem_flg = 0;
1090
1091  while (1) {
1092    status = semop(_CPU_SHM_Semid, &sb, 1);
1093    if ( status >= 0 )
1094      break;
1095
1096    if ( status == -1 ) {
1097      fix_syscall_errno();    /* in case of newlib */
1098      if (errno == EINTR)
1099          continue;
1100      perror("shm unlock");
1101      _CPU_Fatal_halt( 0xdead0006 );
1102    }
1103  }
1104
1105}
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