[ac7d5ef0] | 1 | /* |
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[3652ad35] | 2 | * UNIX Simulator Dependent Source |
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[ac7d5ef0] | 3 | * |
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[e71ce071] | 4 | * COPYRIGHT (c) 1994,95 by Division Incorporated |
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[ac7d5ef0] | 5 | * |
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[98e4ebf5] | 6 | * The license and distribution terms for this file may be |
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| 7 | * found in the file LICENSE in this distribution or at |
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[e71ce071] | 8 | * http://www.OARcorp.com/rtems/license.html. |
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[ac7d5ef0] | 9 | * |
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| 10 | * $Id$ |
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| 11 | */ |
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| 12 | |
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| 13 | #include <rtems/system.h> |
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[5e9b32b] | 14 | #include <rtems/score/isr.h> |
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| 15 | #include <rtems/score/interr.h> |
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[ac7d5ef0] | 16 | |
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[f2545552] | 17 | #if defined(__linux__) |
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[ddf142d] | 18 | #define _XOPEN_SOURCE |
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[37f4c2d] | 19 | #define MALLOC_0_RETURNS_NULL |
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| 20 | #endif |
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[d1193c7] | 21 | |
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[1c964ffa] | 22 | #include <sys/types.h> |
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| 23 | #include <sys/times.h> |
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[ac7d5ef0] | 24 | #include <stdio.h> |
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| 25 | #include <stdlib.h> |
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[37f4c2d] | 26 | #include <setjmp.h> |
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[ac7d5ef0] | 27 | #include <signal.h> |
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| 28 | #include <time.h> |
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[10aed1e3] | 29 | #include <sys/time.h> |
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[37f4c2d] | 30 | #include <errno.h> |
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| 31 | #include <unistd.h> |
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| 32 | #include <sys/ipc.h> |
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| 33 | #include <sys/shm.h> |
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| 34 | #include <sys/sem.h> |
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[cc4c1fe4] | 35 | #include <string.h> /* memset */ |
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[ac7d5ef0] | 36 | |
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[637df35] | 37 | #ifndef SA_RESTART |
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| 38 | #define SA_RESTART 0 |
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| 39 | #endif |
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[ac7d5ef0] | 40 | |
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[37f4c2d] | 41 | typedef struct { |
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| 42 | jmp_buf regs; |
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[a30359bb] | 43 | int isr_level; |
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[37f4c2d] | 44 | } Context_Control_overlay; |
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| 45 | |
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[637df35] | 46 | void _CPU_Signal_initialize(void); |
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| 47 | void _CPU_Stray_signal(int); |
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| 48 | void _CPU_ISR_Handler(int); |
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[ac7d5ef0] | 49 | |
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[d83c39dc] | 50 | static sigset_t _CPU_Signal_mask; |
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[d1193c7] | 51 | static Context_Control_overlay |
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[855edec] | 52 | _CPU_Context_Default_with_ISRs_enabled CPU_STRUCTURE_ALIGNMENT; |
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[d1193c7] | 53 | static Context_Control_overlay |
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[855edec] | 54 | _CPU_Context_Default_with_ISRs_disabled CPU_STRUCTURE_ALIGNMENT; |
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[ac7d5ef0] | 55 | |
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[0a6fb22] | 56 | /* |
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| 57 | * Sync IO support, an entry for each fd that can be set |
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| 58 | */ |
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| 59 | |
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| 60 | void _CPU_Sync_io_Init(); |
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| 61 | |
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| 62 | static rtems_sync_io_handler _CPU_Sync_io_handlers[FD_SETSIZE]; |
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| 63 | static int sync_io_nfds; |
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| 64 | static fd_set sync_io_readfds; |
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| 65 | static fd_set sync_io_writefds; |
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| 66 | static fd_set sync_io_exceptfds; |
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| 67 | |
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[ac7d5ef0] | 68 | /* |
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| 69 | * Which cpu are we? Used by libcpu and libbsp. |
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| 70 | */ |
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| 71 | |
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| 72 | int cpu_number; |
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| 73 | |
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[637df35] | 74 | /*PAGE |
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| 75 | * |
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| 76 | * _CPU_ISR_From_CPU_Init |
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| 77 | */ |
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| 78 | |
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[e7e016f] | 79 | sigset_t posix_empty_mask; |
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| 80 | |
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[637df35] | 81 | void _CPU_ISR_From_CPU_Init() |
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| 82 | { |
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| 83 | unsigned32 i; |
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| 84 | proc_ptr old_handler; |
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| 85 | |
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[e7e016f] | 86 | /* |
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| 87 | * Generate an empty mask to be used by disable_support |
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| 88 | */ |
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[637df35] | 89 | |
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[e7e016f] | 90 | sigemptyset(&posix_empty_mask); |
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[c64e4ed4] | 91 | |
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[637df35] | 92 | /* |
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| 93 | * Block all the signals except SIGTRAP for the debugger |
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[d196e48] | 94 | * and fatal error signals. |
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[637df35] | 95 | */ |
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| 96 | |
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| 97 | (void) sigfillset(&_CPU_Signal_mask); |
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| 98 | (void) sigdelset(&_CPU_Signal_mask, SIGTRAP); |
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| 99 | (void) sigdelset(&_CPU_Signal_mask, SIGABRT); |
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| 100 | (void) sigdelset(&_CPU_Signal_mask, SIGIOT); |
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| 101 | (void) sigdelset(&_CPU_Signal_mask, SIGCONT); |
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[d196e48] | 102 | (void) sigdelset(&_CPU_Signal_mask, SIGSEGV); |
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| 103 | (void) sigdelset(&_CPU_Signal_mask, SIGBUS); |
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| 104 | (void) sigdelset(&_CPU_Signal_mask, SIGFPE); |
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[637df35] | 105 | |
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[e7e016f] | 106 | _CPU_ISR_Enable(1); |
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[637df35] | 107 | |
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| 108 | /* |
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| 109 | * Set the handler for all signals to be signal_handler |
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| 110 | * which will then vector out to the correct handler |
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| 111 | * for whichever signal actually happened. Initially |
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| 112 | * set the vectors to the stray signal handler. |
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| 113 | */ |
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| 114 | |
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| 115 | for (i = 0; i < CPU_INTERRUPT_NUMBER_OF_VECTORS; i++) |
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| 116 | (void)_CPU_ISR_install_vector(i, _CPU_Stray_signal, &old_handler); |
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| 117 | |
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| 118 | _CPU_Signal_initialize(); |
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| 119 | } |
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| 120 | |
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| 121 | void _CPU_Signal_initialize( void ) |
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| 122 | { |
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| 123 | struct sigaction act; |
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| 124 | sigset_t mask; |
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[d1193c7] | 125 | |
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[637df35] | 126 | /* mark them all active except for TraceTrap and Abort */ |
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[d1193c7] | 127 | |
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[d196e48] | 128 | mask = _CPU_Signal_mask; |
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[637df35] | 129 | sigprocmask(SIG_UNBLOCK, &mask, 0); |
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[d1193c7] | 130 | |
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[637df35] | 131 | act.sa_handler = _CPU_ISR_Handler; |
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| 132 | act.sa_mask = mask; |
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| 133 | act.sa_flags = SA_RESTART; |
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[d1193c7] | 134 | |
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[637df35] | 135 | sigaction(SIGHUP, &act, 0); |
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| 136 | sigaction(SIGINT, &act, 0); |
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| 137 | sigaction(SIGQUIT, &act, 0); |
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| 138 | sigaction(SIGILL, &act, 0); |
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[10aed1e3] | 139 | #ifdef SIGEMT |
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[637df35] | 140 | sigaction(SIGEMT, &act, 0); |
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[10aed1e3] | 141 | #endif |
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[637df35] | 142 | sigaction(SIGFPE, &act, 0); |
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| 143 | sigaction(SIGKILL, &act, 0); |
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| 144 | sigaction(SIGBUS, &act, 0); |
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| 145 | sigaction(SIGSEGV, &act, 0); |
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[10aed1e3] | 146 | #ifdef SIGSYS |
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[637df35] | 147 | sigaction(SIGSYS, &act, 0); |
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[10aed1e3] | 148 | #endif |
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[637df35] | 149 | sigaction(SIGPIPE, &act, 0); |
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| 150 | sigaction(SIGALRM, &act, 0); |
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| 151 | sigaction(SIGTERM, &act, 0); |
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| 152 | sigaction(SIGUSR1, &act, 0); |
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| 153 | sigaction(SIGUSR2, &act, 0); |
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| 154 | sigaction(SIGCHLD, &act, 0); |
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[9a6994b4] | 155 | #ifdef SIGCLD |
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[637df35] | 156 | sigaction(SIGCLD, &act, 0); |
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[9a6994b4] | 157 | #endif |
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| 158 | #ifdef SIGPWR |
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[637df35] | 159 | sigaction(SIGPWR, &act, 0); |
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[9a6994b4] | 160 | #endif |
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[637df35] | 161 | sigaction(SIGVTALRM, &act, 0); |
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| 162 | sigaction(SIGPROF, &act, 0); |
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| 163 | sigaction(SIGIO, &act, 0); |
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| 164 | sigaction(SIGWINCH, &act, 0); |
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| 165 | sigaction(SIGSTOP, &act, 0); |
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| 166 | sigaction(SIGTTIN, &act, 0); |
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| 167 | sigaction(SIGTTOU, &act, 0); |
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| 168 | sigaction(SIGURG, &act, 0); |
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[e7e016f] | 169 | #ifdef SIGLOST |
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[637df35] | 170 | sigaction(SIGLOST, &act, 0); |
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| 171 | #endif |
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| 172 | } |
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| 173 | |
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| 174 | /*PAGE |
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| 175 | * |
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| 176 | * _CPU_Context_From_CPU_Init |
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| 177 | */ |
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| 178 | |
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| 179 | void _CPU_Context_From_CPU_Init() |
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| 180 | { |
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| 181 | |
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[3ec7bfc] | 182 | #if defined(__hppa__) && defined(RTEMS_UNIXLIB_SETJMP) |
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[637df35] | 183 | /* |
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| 184 | * HACK - set the _SYSTEM_ID to 0x20c so that setjmp/longjmp |
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| 185 | * will handle the full 32 floating point registers. |
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| 186 | */ |
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| 187 | |
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| 188 | { |
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| 189 | extern unsigned32 _SYSTEM_ID; |
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| 190 | |
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| 191 | _SYSTEM_ID = 0x20c; |
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| 192 | } |
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| 193 | #endif |
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| 194 | |
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| 195 | /* |
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| 196 | * get default values to use in _CPU_Context_Initialize() |
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| 197 | */ |
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| 198 | |
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[d1193c7] | 199 | |
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[cc4c1fe4] | 200 | (void) memset( |
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| 201 | &_CPU_Context_Default_with_ISRs_enabled, |
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| 202 | 0, |
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| 203 | sizeof(Context_Control) |
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| 204 | ); |
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| 205 | (void) memset( |
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| 206 | &_CPU_Context_Default_with_ISRs_disabled, |
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| 207 | 0, |
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| 208 | sizeof(Context_Control) |
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| 209 | ); |
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| 210 | |
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[637df35] | 211 | _CPU_ISR_Set_level( 0 ); |
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[3652ad35] | 212 | _CPU_Context_switch( |
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[d196e48] | 213 | (Context_Control *) &_CPU_Context_Default_with_ISRs_enabled, |
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| 214 | (Context_Control *) &_CPU_Context_Default_with_ISRs_enabled |
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[637df35] | 215 | ); |
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[d1193c7] | 216 | |
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[637df35] | 217 | _CPU_ISR_Set_level( 1 ); |
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[3652ad35] | 218 | _CPU_Context_switch( |
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[d196e48] | 219 | (Context_Control *) &_CPU_Context_Default_with_ISRs_disabled, |
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| 220 | (Context_Control *) &_CPU_Context_Default_with_ISRs_disabled |
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[637df35] | 221 | ); |
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| 222 | } |
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| 223 | |
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[0a6fb22] | 224 | /*PAGE |
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| 225 | * |
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| 226 | * _CPU_Sync_io_Init |
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| 227 | */ |
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| 228 | |
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| 229 | void _CPU_Sync_io_Init() |
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| 230 | { |
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| 231 | int fd; |
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| 232 | |
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| 233 | for (fd = 0; fd < FD_SETSIZE; fd++) |
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| 234 | _CPU_Sync_io_handlers[fd] = NULL; |
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| 235 | |
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| 236 | sync_io_nfds = 0; |
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| 237 | FD_ZERO(&sync_io_readfds); |
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| 238 | FD_ZERO(&sync_io_writefds); |
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| 239 | FD_ZERO(&sync_io_exceptfds); |
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| 240 | } |
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| 241 | |
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[3a4ae6c] | 242 | /*PAGE |
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| 243 | * |
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| 244 | * _CPU_ISR_Get_level |
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| 245 | */ |
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| 246 | |
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| 247 | unsigned32 _CPU_ISR_Get_level( void ) |
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| 248 | { |
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[d196e48] | 249 | sigset_t old_mask; |
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[d1193c7] | 250 | |
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[5e34bf4] | 251 | sigemptyset( &old_mask ); |
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[d196e48] | 252 | sigprocmask(SIG_BLOCK, 0, &old_mask); |
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[d1193c7] | 253 | |
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[d196e48] | 254 | if (memcmp((void *)&posix_empty_mask, (void *)&old_mask, sizeof(sigset_t))) |
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| 255 | return 1; |
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[d1193c7] | 256 | |
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[d196e48] | 257 | return 0; |
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[3a4ae6c] | 258 | } |
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| 259 | |
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[ac7d5ef0] | 260 | /* _CPU_Initialize |
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| 261 | * |
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| 262 | * This routine performs processor dependent initialization. |
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| 263 | * |
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| 264 | * INPUT PARAMETERS: |
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| 265 | * cpu_table - CPU table to initialize |
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| 266 | * thread_dispatch - address of disptaching routine |
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| 267 | */ |
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| 268 | |
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| 269 | |
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| 270 | void _CPU_Initialize( |
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| 271 | rtems_cpu_table *cpu_table, |
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[3a4ae6c] | 272 | void (*thread_dispatch) /* ignored on this CPU */ |
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[ac7d5ef0] | 273 | ) |
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| 274 | { |
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| 275 | /* |
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| 276 | * The thread_dispatch argument is the address of the entry point |
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| 277 | * for the routine called at the end of an ISR once it has been |
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| 278 | * decided a context switch is necessary. On some compilation |
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| 279 | * systems it is difficult to call a high-level language routine |
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| 280 | * from assembly. This allows us to trick these systems. |
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| 281 | * |
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| 282 | * If you encounter this problem save the entry point in a CPU |
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| 283 | * dependent variable. |
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| 284 | */ |
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| 285 | |
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| 286 | _CPU_Thread_dispatch_pointer = thread_dispatch; |
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| 287 | |
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| 288 | /* |
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| 289 | * XXX; If there is not an easy way to initialize the FP context |
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| 290 | * during Context_Initialize, then it is usually easier to |
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| 291 | * save an "uninitialized" FP context here and copy it to |
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| 292 | * the task's during Context_Initialize. |
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| 293 | */ |
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| 294 | |
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| 295 | /* XXX: FP context initialization support */ |
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| 296 | |
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| 297 | _CPU_Table = *cpu_table; |
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| 298 | |
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[637df35] | 299 | _CPU_ISR_From_CPU_Init(); |
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[ac7d5ef0] | 300 | |
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[0a6fb22] | 301 | _CPU_Sync_io_Init(); |
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| 302 | |
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[637df35] | 303 | _CPU_Context_From_CPU_Init(); |
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[ac7d5ef0] | 304 | |
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[637df35] | 305 | } |
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[ac7d5ef0] | 306 | |
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[637df35] | 307 | /*PAGE |
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| 308 | * |
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| 309 | * _CPU_ISR_install_raw_handler |
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| 310 | */ |
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[ac7d5ef0] | 311 | |
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[637df35] | 312 | void _CPU_ISR_install_raw_handler( |
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| 313 | unsigned32 vector, |
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| 314 | proc_ptr new_handler, |
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| 315 | proc_ptr *old_handler |
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| 316 | ) |
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| 317 | { |
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| 318 | _CPU_Fatal_halt( 0xdeaddead ); |
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[ac7d5ef0] | 319 | } |
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| 320 | |
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[637df35] | 321 | /*PAGE |
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| 322 | * |
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| 323 | * _CPU_ISR_install_vector |
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[ac7d5ef0] | 324 | * |
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| 325 | * This kernel routine installs the RTEMS handler for the |
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| 326 | * specified vector. |
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| 327 | * |
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| 328 | * Input parameters: |
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| 329 | * vector - interrupt vector number |
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| 330 | * old_handler - former ISR for this vector number |
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| 331 | * new_handler - replacement ISR for this vector number |
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| 332 | * |
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| 333 | * Output parameters: NONE |
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| 334 | * |
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| 335 | */ |
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| 336 | |
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| 337 | |
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| 338 | void _CPU_ISR_install_vector( |
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| 339 | unsigned32 vector, |
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| 340 | proc_ptr new_handler, |
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| 341 | proc_ptr *old_handler |
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| 342 | ) |
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| 343 | { |
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| 344 | *old_handler = _ISR_Vector_table[ vector ]; |
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| 345 | |
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| 346 | /* |
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| 347 | * If the interrupt vector table is a table of pointer to isr entry |
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| 348 | * points, then we need to install the appropriate RTEMS interrupt |
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| 349 | * handler for this vector number. |
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| 350 | */ |
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| 351 | |
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| 352 | /* |
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| 353 | * We put the actual user ISR address in '_ISR_vector_table'. This will |
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[637df35] | 354 | * be used by the _CPU_ISR_Handler so the user gets control. |
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[ac7d5ef0] | 355 | */ |
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| 356 | |
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| 357 | _ISR_Vector_table[ vector ] = new_handler; |
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| 358 | } |
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| 359 | |
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| 360 | /*PAGE |
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| 361 | * |
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| 362 | * _CPU_Install_interrupt_stack |
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| 363 | */ |
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| 364 | |
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| 365 | void _CPU_Install_interrupt_stack( void ) |
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| 366 | { |
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| 367 | } |
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| 368 | |
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| 369 | /*PAGE |
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| 370 | * |
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[75f09e5] | 371 | * _CPU_Thread_Idle_body |
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[ac7d5ef0] | 372 | * |
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[d1193c7] | 373 | * Stop until we get a signal which is the logically the same thing |
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[9700578] | 374 | * entering low-power or sleep mode on a real processor and waiting for |
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| 375 | * an interrupt. This significantly reduces the consumption of host |
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| 376 | * CPU cycles which is again similar to low power mode. |
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[ac7d5ef0] | 377 | */ |
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| 378 | |
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[75f09e5] | 379 | void _CPU_Thread_Idle_body( void ) |
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[ac7d5ef0] | 380 | { |
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[0a6fb22] | 381 | #if CPU_SYNC_IO |
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| 382 | extern void _Thread_Dispatch(void); |
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| 383 | int fd; |
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| 384 | #endif |
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| 385 | |
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[d196e48] | 386 | while (1) { |
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| 387 | #ifdef RTEMS_DEBUG |
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| 388 | /* interrupts had better be enabled at this point! */ |
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| 389 | if (_CPU_ISR_Get_level() != 0) |
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| 390 | abort(); |
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| 391 | #endif |
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[0a6fb22] | 392 | |
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| 393 | /* |
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| 394 | * Block on a select statement, the CPU interface added allow the |
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| 395 | * user to add new descriptors which are to be blocked on |
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| 396 | */ |
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| 397 | |
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| 398 | #if CPU_SYNC_IO |
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| 399 | if (sync_io_nfds) { |
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| 400 | int result; |
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[b4e3b2b] | 401 | fd_set readfds, writefds, exceptfds; |
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[0a6fb22] | 402 | |
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[b4e3b2b] | 403 | readfds = sync_io_readfds; |
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| 404 | writefds = sync_io_writefds; |
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| 405 | exceptfds = sync_io_exceptfds; |
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[0a6fb22] | 406 | result = select(sync_io_nfds, |
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[b4e3b2b] | 407 | &readfds, |
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| 408 | &writefds, |
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| 409 | &exceptfds, |
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[0a6fb22] | 410 | NULL); |
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| 411 | |
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[b4e3b2b] | 412 | if (result < 0) { |
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| 413 | if (errno != EINTR) |
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| 414 | _CPU_Fatal_error(0x200); /* FIXME : what number should go here !! */ |
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| 415 | _Thread_Dispatch(); |
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| 416 | continue; |
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| 417 | } |
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[0a6fb22] | 418 | |
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| 419 | for (fd = 0; fd < sync_io_nfds; fd++) { |
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[b4e3b2b] | 420 | boolean read = FD_ISSET(fd, &readfds); |
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| 421 | boolean write = FD_ISSET(fd, &writefds); |
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| 422 | boolean except = FD_ISSET(fd, &exceptfds); |
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[0a6fb22] | 423 | |
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| 424 | if (_CPU_Sync_io_handlers[fd] && (read || write || except)) |
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| 425 | _CPU_Sync_io_handlers[fd](fd, read, write, except); |
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| 426 | } |
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[b4e3b2b] | 427 | |
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| 428 | _Thread_Dispatch(); |
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[0a6fb22] | 429 | } else |
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| 430 | pause(); |
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| 431 | #else |
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[637df35] | 432 | pause(); |
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[0a6fb22] | 433 | #endif |
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| 434 | |
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[d196e48] | 435 | } |
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| 436 | |
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[ac7d5ef0] | 437 | } |
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| 438 | |
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[637df35] | 439 | /*PAGE |
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[d1193c7] | 440 | * |
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[637df35] | 441 | * _CPU_Context_Initialize |
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| 442 | */ |
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| 443 | |
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[ac7d5ef0] | 444 | void _CPU_Context_Initialize( |
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| 445 | Context_Control *_the_context, |
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| 446 | unsigned32 *_stack_base, |
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| 447 | unsigned32 _size, |
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| 448 | unsigned32 _new_level, |
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[9700578] | 449 | void *_entry_point, |
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| 450 | boolean _is_fp |
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[ac7d5ef0] | 451 | ) |
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| 452 | { |
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[637df35] | 453 | unsigned32 *addr; |
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| 454 | unsigned32 jmp_addr; |
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| 455 | unsigned32 _stack_low; /* lowest "stack aligned" address */ |
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| 456 | unsigned32 _stack_high; /* highest "stack aligned" address */ |
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| 457 | unsigned32 _the_size; |
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[ac7d5ef0] | 458 | |
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[637df35] | 459 | jmp_addr = (unsigned32) _entry_point; |
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[ac7d5ef0] | 460 | |
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[637df35] | 461 | /* |
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| 462 | * On CPUs with stacks which grow down, we build the stack |
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[d1193c7] | 463 | * based on the _stack_high address. On CPUs with stacks which |
---|
| 464 | * grow up, we build the stack based on the _stack_low address. |
---|
[637df35] | 465 | */ |
---|
[88d594a] | 466 | |
---|
[cc4c1fe4] | 467 | _stack_low = (unsigned32)(_stack_base) + CPU_STACK_ALIGNMENT - 1; |
---|
[637df35] | 468 | _stack_low &= ~(CPU_STACK_ALIGNMENT - 1); |
---|
[88d594a] | 469 | |
---|
[cc4c1fe4] | 470 | _stack_high = (unsigned32)(_stack_base) + _size; |
---|
[637df35] | 471 | _stack_high &= ~(CPU_STACK_ALIGNMENT - 1); |
---|
[ac7d5ef0] | 472 | |
---|
[cc4c1fe4] | 473 | if (_stack_high > _stack_low) |
---|
| 474 | _the_size = _stack_high - _stack_low; |
---|
| 475 | else |
---|
| 476 | _the_size = _stack_low - _stack_high; |
---|
[ac7d5ef0] | 477 | |
---|
[637df35] | 478 | /* |
---|
| 479 | * Slam our jmp_buf template into the context we are creating |
---|
| 480 | */ |
---|
[ac7d5ef0] | 481 | |
---|
[637df35] | 482 | if ( _new_level == 0 ) |
---|
[d196e48] | 483 | *_the_context = *(Context_Control *) |
---|
| 484 | &_CPU_Context_Default_with_ISRs_enabled; |
---|
[637df35] | 485 | else |
---|
[d196e48] | 486 | *_the_context = *(Context_Control *) |
---|
| 487 | &_CPU_Context_Default_with_ISRs_disabled; |
---|
[d1193c7] | 488 | |
---|
[637df35] | 489 | addr = (unsigned32 *)_the_context; |
---|
[ac7d5ef0] | 490 | |
---|
[3ec7bfc] | 491 | #if defined(__hppa__) |
---|
[637df35] | 492 | *(addr + RP_OFF) = jmp_addr; |
---|
| 493 | *(addr + SP_OFF) = (unsigned32)(_stack_low + CPU_FRAME_SIZE); |
---|
[ac7d5ef0] | 494 | |
---|
[637df35] | 495 | /* |
---|
| 496 | * See if we are using shared libraries by checking |
---|
| 497 | * bit 30 in 24 off of newp. If bit 30 is set then |
---|
| 498 | * we are using shared libraries and the jump address |
---|
[cc4c1fe4] | 499 | * points to the pointer, so we put that into rp instead. |
---|
[637df35] | 500 | */ |
---|
[ac7d5ef0] | 501 | |
---|
[637df35] | 502 | if (jmp_addr & 0x40000000) { |
---|
| 503 | jmp_addr &= 0xfffffffc; |
---|
[cc4c1fe4] | 504 | *(addr + RP_OFF) = *(unsigned32 *)jmp_addr; |
---|
[637df35] | 505 | } |
---|
[3ec7bfc] | 506 | #elif defined(__sparc__) |
---|
[ac7d5ef0] | 507 | |
---|
[637df35] | 508 | /* |
---|
| 509 | * See /usr/include/sys/stack.h in Solaris 2.3 for a nice |
---|
| 510 | * diagram of the stack. |
---|
| 511 | */ |
---|
[ac7d5ef0] | 512 | |
---|
[637df35] | 513 | asm ("ta 0x03"); /* flush registers */ |
---|
[ac7d5ef0] | 514 | |
---|
[637df35] | 515 | *(addr + RP_OFF) = jmp_addr + ADDR_ADJ_OFFSET; |
---|
| 516 | *(addr + SP_OFF) = (unsigned32)(_stack_high - CPU_FRAME_SIZE); |
---|
| 517 | *(addr + FP_OFF) = (unsigned32)(_stack_high); |
---|
[8044533] | 518 | |
---|
[3ec7bfc] | 519 | #elif defined(__i386__) |
---|
[d1193c7] | 520 | |
---|
[8044533] | 521 | /* |
---|
| 522 | * This information was gathered by disassembling setjmp(). |
---|
| 523 | */ |
---|
[10aed1e3] | 524 | |
---|
| 525 | { |
---|
| 526 | unsigned32 stack_ptr; |
---|
| 527 | |
---|
| 528 | stack_ptr = _stack_high - CPU_FRAME_SIZE; |
---|
| 529 | |
---|
| 530 | *(addr + EBX_OFF) = 0xFEEDFEED; |
---|
| 531 | *(addr + ESI_OFF) = 0xDEADDEAD; |
---|
| 532 | *(addr + EDI_OFF) = 0xDEAFDEAF; |
---|
| 533 | *(addr + EBP_OFF) = stack_ptr; |
---|
| 534 | *(addr + ESP_OFF) = stack_ptr; |
---|
| 535 | *(addr + RET_OFF) = jmp_addr; |
---|
[d1193c7] | 536 | |
---|
[10aed1e3] | 537 | addr = (unsigned32 *) stack_ptr; |
---|
[d1193c7] | 538 | |
---|
[10aed1e3] | 539 | addr[ 0 ] = jmp_addr; |
---|
| 540 | addr[ 1 ] = (unsigned32) stack_ptr; |
---|
| 541 | addr[ 2 ] = (unsigned32) stack_ptr; |
---|
| 542 | } |
---|
[8044533] | 543 | |
---|
[ac7d5ef0] | 544 | #else |
---|
| 545 | #error "UNKNOWN CPU!!!" |
---|
| 546 | #endif |
---|
| 547 | |
---|
| 548 | } |
---|
| 549 | |
---|
[637df35] | 550 | /*PAGE |
---|
| 551 | * |
---|
| 552 | * _CPU_Context_restore |
---|
| 553 | */ |
---|
| 554 | |
---|
[ac7d5ef0] | 555 | void _CPU_Context_restore( |
---|
| 556 | Context_Control *next |
---|
| 557 | ) |
---|
| 558 | { |
---|
[37f4c2d] | 559 | Context_Control_overlay *nextp = (Context_Control_overlay *)next; |
---|
| 560 | |
---|
[d196e48] | 561 | _CPU_ISR_Enable(nextp->isr_level); |
---|
[37f4c2d] | 562 | longjmp( nextp->regs, 0 ); |
---|
[ac7d5ef0] | 563 | } |
---|
| 564 | |
---|
[637df35] | 565 | /*PAGE |
---|
| 566 | * |
---|
| 567 | * _CPU_Context_switch |
---|
| 568 | */ |
---|
| 569 | |
---|
[d196e48] | 570 | static void do_jump( |
---|
| 571 | Context_Control_overlay *currentp, |
---|
| 572 | Context_Control_overlay *nextp |
---|
| 573 | ); |
---|
| 574 | |
---|
[ac7d5ef0] | 575 | void _CPU_Context_switch( |
---|
| 576 | Context_Control *current, |
---|
| 577 | Context_Control *next |
---|
| 578 | ) |
---|
| 579 | { |
---|
[37f4c2d] | 580 | Context_Control_overlay *currentp = (Context_Control_overlay *)current; |
---|
| 581 | Context_Control_overlay *nextp = (Context_Control_overlay *)next; |
---|
[d196e48] | 582 | #if 0 |
---|
[3652ad35] | 583 | int status; |
---|
[d196e48] | 584 | #endif |
---|
[d1193c7] | 585 | |
---|
[d196e48] | 586 | currentp->isr_level = _CPU_ISR_Disable_support(); |
---|
[d1193c7] | 587 | |
---|
[d196e48] | 588 | do_jump( currentp, nextp ); |
---|
[3652ad35] | 589 | |
---|
[d196e48] | 590 | #if 0 |
---|
| 591 | if (sigsetjmp(currentp->regs, 1) == 0) { /* Save the current context */ |
---|
| 592 | siglongjmp(nextp->regs, 0); /* Switch to the new context */ |
---|
| 593 | _Internal_error_Occurred( |
---|
| 594 | INTERNAL_ERROR_CORE, |
---|
| 595 | TRUE, |
---|
| 596 | status |
---|
| 597 | ); |
---|
| 598 | } |
---|
| 599 | #endif |
---|
[d1193c7] | 600 | |
---|
[d196e48] | 601 | #ifdef RTEMS_DEBUG |
---|
| 602 | if (_CPU_ISR_Get_level() == 0) |
---|
| 603 | abort(); |
---|
| 604 | #endif |
---|
[d1193c7] | 605 | |
---|
[d196e48] | 606 | _CPU_ISR_Enable(currentp->isr_level); |
---|
| 607 | } |
---|
[d1193c7] | 608 | |
---|
| 609 | static void do_jump( |
---|
[d196e48] | 610 | Context_Control_overlay *currentp, |
---|
[d1193c7] | 611 | Context_Control_overlay *nextp |
---|
[d196e48] | 612 | ) |
---|
| 613 | { |
---|
| 614 | int status; |
---|
[ac7d5ef0] | 615 | |
---|
[37f4c2d] | 616 | if (setjmp(currentp->regs) == 0) { /* Save the current context */ |
---|
| 617 | longjmp(nextp->regs, 0); /* Switch to the new context */ |
---|
[d196e48] | 618 | _Internal_error_Occurred( |
---|
[3652ad35] | 619 | INTERNAL_ERROR_CORE, |
---|
| 620 | TRUE, |
---|
| 621 | status |
---|
| 622 | ); |
---|
[637df35] | 623 | } |
---|
[ac7d5ef0] | 624 | } |
---|
[d196e48] | 625 | |
---|
[637df35] | 626 | /*PAGE |
---|
| 627 | * |
---|
| 628 | * _CPU_Save_float_context |
---|
| 629 | */ |
---|
[ac7d5ef0] | 630 | |
---|
| 631 | void _CPU_Save_float_context( |
---|
| 632 | Context_Control_fp *fp_context |
---|
| 633 | ) |
---|
| 634 | { |
---|
| 635 | } |
---|
| 636 | |
---|
[637df35] | 637 | /*PAGE |
---|
| 638 | * |
---|
| 639 | * _CPU_Restore_float_context |
---|
| 640 | */ |
---|
| 641 | |
---|
[ac7d5ef0] | 642 | void _CPU_Restore_float_context( |
---|
| 643 | Context_Control_fp *fp_context |
---|
| 644 | ) |
---|
| 645 | { |
---|
| 646 | } |
---|
| 647 | |
---|
[637df35] | 648 | /*PAGE |
---|
| 649 | * |
---|
| 650 | * _CPU_ISR_Disable_support |
---|
| 651 | */ |
---|
[ac7d5ef0] | 652 | |
---|
[637df35] | 653 | unsigned32 _CPU_ISR_Disable_support(void) |
---|
[ac7d5ef0] | 654 | { |
---|
[3652ad35] | 655 | int status; |
---|
[637df35] | 656 | sigset_t old_mask; |
---|
[ac7d5ef0] | 657 | |
---|
[d83c39dc] | 658 | sigemptyset( &old_mask ); |
---|
[3652ad35] | 659 | status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, &old_mask); |
---|
| 660 | if ( status ) |
---|
| 661 | _Internal_error_Occurred( |
---|
| 662 | INTERNAL_ERROR_CORE, |
---|
| 663 | TRUE, |
---|
| 664 | status |
---|
| 665 | ); |
---|
[ac7d5ef0] | 666 | |
---|
[3652ad35] | 667 | if (memcmp((void *)&posix_empty_mask, (void *)&old_mask, sizeof(sigset_t))) |
---|
[637df35] | 668 | return 1; |
---|
[ac7d5ef0] | 669 | |
---|
[637df35] | 670 | return 0; |
---|
[ac7d5ef0] | 671 | } |
---|
| 672 | |
---|
[637df35] | 673 | /*PAGE |
---|
| 674 | * |
---|
| 675 | * _CPU_ISR_Enable |
---|
| 676 | */ |
---|
[ac7d5ef0] | 677 | |
---|
[637df35] | 678 | void _CPU_ISR_Enable( |
---|
| 679 | unsigned32 level |
---|
| 680 | ) |
---|
[ac7d5ef0] | 681 | { |
---|
[3652ad35] | 682 | int status; |
---|
| 683 | |
---|
[637df35] | 684 | if (level == 0) |
---|
[3652ad35] | 685 | status = sigprocmask(SIG_UNBLOCK, &_CPU_Signal_mask, 0); |
---|
[637df35] | 686 | else |
---|
[3652ad35] | 687 | status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, 0); |
---|
| 688 | |
---|
| 689 | if ( status ) |
---|
| 690 | _Internal_error_Occurred( |
---|
| 691 | INTERNAL_ERROR_CORE, |
---|
| 692 | TRUE, |
---|
| 693 | status |
---|
| 694 | ); |
---|
[ac7d5ef0] | 695 | } |
---|
| 696 | |
---|
[637df35] | 697 | /*PAGE |
---|
[ac7d5ef0] | 698 | * |
---|
[637df35] | 699 | * _CPU_ISR_Handler |
---|
| 700 | * |
---|
| 701 | * External interrupt handler. |
---|
| 702 | * This is installed as a UNIX signal handler. |
---|
| 703 | * It vectors out to specific user interrupt handlers. |
---|
[ac7d5ef0] | 704 | */ |
---|
| 705 | |
---|
[637df35] | 706 | void _CPU_ISR_Handler(int vector) |
---|
[ac7d5ef0] | 707 | { |
---|
[637df35] | 708 | extern void _Thread_Dispatch(void); |
---|
| 709 | extern unsigned32 _Thread_Dispatch_disable_level; |
---|
| 710 | extern boolean _Context_Switch_necessary; |
---|
[ac7d5ef0] | 711 | |
---|
[637df35] | 712 | if (_ISR_Nest_level++ == 0) { |
---|
| 713 | /* switch to interrupt stack */ |
---|
| 714 | } |
---|
[ac7d5ef0] | 715 | |
---|
[637df35] | 716 | _Thread_Dispatch_disable_level++; |
---|
[ac7d5ef0] | 717 | |
---|
[637df35] | 718 | if (_ISR_Vector_table[vector]) { |
---|
| 719 | _ISR_Vector_table[vector](vector); |
---|
| 720 | } else { |
---|
| 721 | _CPU_Stray_signal(vector); |
---|
| 722 | } |
---|
[ac7d5ef0] | 723 | |
---|
[637df35] | 724 | if (_ISR_Nest_level-- == 0) { |
---|
| 725 | /* switch back to original stack */ |
---|
| 726 | } |
---|
[ac7d5ef0] | 727 | |
---|
[637df35] | 728 | _Thread_Dispatch_disable_level--; |
---|
[ac7d5ef0] | 729 | |
---|
[637df35] | 730 | if (_Thread_Dispatch_disable_level == 0 && |
---|
| 731 | (_Context_Switch_necessary || _ISR_Signals_to_thread_executing)) { |
---|
[8a38f3b] | 732 | _ISR_Signals_to_thread_executing = FALSE; |
---|
[637df35] | 733 | _CPU_ISR_Enable(0); |
---|
| 734 | _Thread_Dispatch(); |
---|
| 735 | } |
---|
[ac7d5ef0] | 736 | } |
---|
| 737 | |
---|
[637df35] | 738 | /*PAGE |
---|
| 739 | * |
---|
| 740 | * _CPU_Stray_signal |
---|
| 741 | */ |
---|
[ac7d5ef0] | 742 | |
---|
[637df35] | 743 | void _CPU_Stray_signal(int sig_num) |
---|
[ac7d5ef0] | 744 | { |
---|
[c64e4ed4] | 745 | char buffer[ 4 ]; |
---|
[d1193c7] | 746 | |
---|
[c64e4ed4] | 747 | /* |
---|
| 748 | * print "stray" msg about ones which that might mean something |
---|
| 749 | * Avoid using the stdio section of the library. |
---|
| 750 | * The following is generally safe. |
---|
[637df35] | 751 | */ |
---|
[d1193c7] | 752 | |
---|
[c64e4ed4] | 753 | switch (sig_num) |
---|
| 754 | { |
---|
[9a6994b4] | 755 | #ifdef SIGCLD |
---|
[c64e4ed4] | 756 | case SIGCLD: |
---|
| 757 | break; |
---|
[9a6994b4] | 758 | #endif |
---|
[c64e4ed4] | 759 | default: |
---|
| 760 | { |
---|
[cc4c1fe4] | 761 | /* |
---|
| 762 | * We avoid using the stdio section of the library. |
---|
| 763 | * The following is generally safe |
---|
| 764 | */ |
---|
[d1193c7] | 765 | |
---|
[cc4c1fe4] | 766 | int digit; |
---|
| 767 | int number = sig_num; |
---|
| 768 | int len = 0; |
---|
| 769 | |
---|
| 770 | digit = number / 100; |
---|
| 771 | number %= 100; |
---|
| 772 | if (digit) buffer[len++] = '0' + digit; |
---|
| 773 | |
---|
| 774 | digit = number / 10; |
---|
| 775 | number %= 10; |
---|
| 776 | if (digit || len) buffer[len++] = '0' + digit; |
---|
| 777 | |
---|
| 778 | digit = number; |
---|
| 779 | buffer[len++] = '0' + digit; |
---|
[d1193c7] | 780 | |
---|
[cc4c1fe4] | 781 | buffer[ len++ ] = '\n'; |
---|
[d1193c7] | 782 | |
---|
[cc4c1fe4] | 783 | write( 2, "Stray signal ", 13 ); |
---|
| 784 | write( 2, buffer, len ); |
---|
| 785 | |
---|
[c64e4ed4] | 786 | } |
---|
| 787 | } |
---|
[d1193c7] | 788 | |
---|
[637df35] | 789 | /* |
---|
| 790 | * If it was a "fatal" signal, then exit here |
---|
| 791 | * If app code has installed a hander for one of these, then |
---|
| 792 | * we won't call _CPU_Stray_signal, so this is ok. |
---|
| 793 | */ |
---|
[d1193c7] | 794 | |
---|
[637df35] | 795 | switch (sig_num) { |
---|
| 796 | case SIGINT: |
---|
| 797 | case SIGHUP: |
---|
| 798 | case SIGQUIT: |
---|
| 799 | case SIGILL: |
---|
[10aed1e3] | 800 | #ifdef SIGEMT |
---|
[637df35] | 801 | case SIGEMT: |
---|
[10aed1e3] | 802 | #endif |
---|
[637df35] | 803 | case SIGKILL: |
---|
| 804 | case SIGBUS: |
---|
| 805 | case SIGSEGV: |
---|
| 806 | case SIGTERM: |
---|
[d196e48] | 807 | case SIGIOT: |
---|
[cc4c1fe4] | 808 | _CPU_Fatal_error(0x100 + sig_num); |
---|
[637df35] | 809 | } |
---|
[ac7d5ef0] | 810 | } |
---|
| 811 | |
---|
[637df35] | 812 | /*PAGE |
---|
| 813 | * |
---|
| 814 | * _CPU_Fatal_error |
---|
| 815 | */ |
---|
[ac7d5ef0] | 816 | |
---|
[637df35] | 817 | void _CPU_Fatal_error(unsigned32 error) |
---|
[ac7d5ef0] | 818 | { |
---|
[637df35] | 819 | setitimer(ITIMER_REAL, 0, 0); |
---|
[ac7d5ef0] | 820 | |
---|
[e7e016f] | 821 | if ( error ) { |
---|
| 822 | #ifdef RTEMS_DEBUG |
---|
| 823 | abort(); |
---|
| 824 | #endif |
---|
| 825 | if (getenv("RTEMS_DEBUG")) |
---|
| 826 | abort(); |
---|
| 827 | } |
---|
| 828 | |
---|
[637df35] | 829 | _exit(error); |
---|
[ac7d5ef0] | 830 | } |
---|
| 831 | |
---|
[37f4c2d] | 832 | /* |
---|
| 833 | * Special Purpose Routines to hide the use of UNIX system calls. |
---|
| 834 | */ |
---|
| 835 | |
---|
[0a6fb22] | 836 | int _CPU_Set_sync_io_handler( |
---|
| 837 | int fd, |
---|
| 838 | boolean read, |
---|
| 839 | boolean write, |
---|
| 840 | boolean except, |
---|
| 841 | rtems_sync_io_handler handler |
---|
| 842 | ) |
---|
| 843 | { |
---|
| 844 | if ((fd < FD_SETSIZE) && (_CPU_Sync_io_handlers[fd] == NULL)) { |
---|
| 845 | if (read) |
---|
| 846 | FD_SET(fd, &sync_io_readfds); |
---|
| 847 | else |
---|
| 848 | FD_CLR(fd, &sync_io_readfds); |
---|
| 849 | if (write) |
---|
| 850 | FD_SET(fd, &sync_io_writefds); |
---|
| 851 | else |
---|
| 852 | FD_CLR(fd, &sync_io_writefds); |
---|
| 853 | if (except) |
---|
| 854 | FD_SET(fd, &sync_io_exceptfds); |
---|
| 855 | else |
---|
| 856 | FD_CLR(fd, &sync_io_exceptfds); |
---|
| 857 | _CPU_Sync_io_handlers[fd] = handler; |
---|
| 858 | if ((fd + 1) > sync_io_nfds) |
---|
| 859 | sync_io_nfds = fd + 1; |
---|
| 860 | return 0; |
---|
| 861 | } |
---|
| 862 | return -1; |
---|
| 863 | } |
---|
| 864 | |
---|
| 865 | int _CPU_Clear_sync_io_handler( |
---|
| 866 | int fd |
---|
| 867 | ) |
---|
| 868 | { |
---|
| 869 | if ((fd < FD_SETSIZE) && _CPU_Sync_io_handlers[fd]) { |
---|
| 870 | FD_CLR(fd, &sync_io_readfds); |
---|
| 871 | FD_CLR(fd, &sync_io_writefds); |
---|
| 872 | FD_CLR(fd, &sync_io_exceptfds); |
---|
| 873 | _CPU_Sync_io_handlers[fd] = NULL; |
---|
| 874 | sync_io_nfds = 0; |
---|
| 875 | for (fd = 0; fd < FD_SETSIZE; fd++) |
---|
| 876 | if (FD_ISSET(fd, &sync_io_readfds) || |
---|
| 877 | FD_ISSET(fd, &sync_io_writefds) || |
---|
| 878 | FD_ISSET(fd, &sync_io_exceptfds)) |
---|
[b4e3b2b] | 879 | sync_io_nfds = fd + 1; |
---|
[0a6fb22] | 880 | return 0; |
---|
| 881 | } |
---|
| 882 | return -1; |
---|
| 883 | } |
---|
| 884 | |
---|
[37f4c2d] | 885 | int _CPU_Get_clock_vector( void ) |
---|
| 886 | { |
---|
| 887 | return SIGALRM; |
---|
| 888 | } |
---|
| 889 | |
---|
[d1193c7] | 890 | void _CPU_Start_clock( |
---|
[37f4c2d] | 891 | int microseconds |
---|
| 892 | ) |
---|
| 893 | { |
---|
| 894 | struct itimerval new; |
---|
| 895 | |
---|
| 896 | new.it_value.tv_sec = 0; |
---|
| 897 | new.it_value.tv_usec = microseconds; |
---|
| 898 | new.it_interval.tv_sec = 0; |
---|
| 899 | new.it_interval.tv_usec = microseconds; |
---|
| 900 | |
---|
| 901 | setitimer(ITIMER_REAL, &new, 0); |
---|
| 902 | } |
---|
| 903 | |
---|
| 904 | void _CPU_Stop_clock( void ) |
---|
| 905 | { |
---|
| 906 | struct itimerval new; |
---|
| 907 | struct sigaction act; |
---|
[d1193c7] | 908 | |
---|
[37f4c2d] | 909 | /* |
---|
| 910 | * Set the SIGALRM signal to ignore any last |
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| 911 | * signals that might come in while we are |
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| 912 | * disarming the timer and removing the interrupt |
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| 913 | * vector. |
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| 914 | */ |
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[d1193c7] | 915 | |
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[cc4c1fe4] | 916 | (void) memset(&act, 0, sizeof(act)); |
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[37f4c2d] | 917 | act.sa_handler = SIG_IGN; |
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[d1193c7] | 918 | |
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[cc4c1fe4] | 919 | sigaction(SIGALRM, &act, 0); |
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[d1193c7] | 920 | |
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[cc4c1fe4] | 921 | (void) memset(&new, 0, sizeof(new)); |
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[37f4c2d] | 922 | setitimer(ITIMER_REAL, &new, 0); |
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| 923 | } |
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| 924 | |
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| 925 | int _CPU_SHM_Semid; |
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| 926 | extern void fix_syscall_errno( void ); |
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| 927 | |
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[d1193c7] | 928 | void _CPU_SHM_Init( |
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[37f4c2d] | 929 | unsigned32 maximum_nodes, |
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| 930 | boolean is_master_node, |
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| 931 | void **shm_address, |
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| 932 | unsigned32 *shm_length |
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| 933 | ) |
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| 934 | { |
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| 935 | int i; |
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| 936 | int shmid; |
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| 937 | char *shm_addr; |
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| 938 | key_t shm_key; |
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| 939 | key_t sem_key; |
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[d6ba279] | 940 | int status = 0; /* to avoid unitialized warnings */ |
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[37f4c2d] | 941 | int shm_size; |
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[d1193c7] | 942 | |
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[37f4c2d] | 943 | if (getenv("RTEMS_SHM_KEY")) |
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| 944 | shm_key = strtol(getenv("RTEMS_SHM_KEY"), 0, 0); |
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| 945 | else |
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| 946 | #ifdef RTEMS_SHM_KEY |
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| 947 | shm_key = RTEMS_SHM_KEY; |
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| 948 | #else |
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| 949 | shm_key = 0xa000; |
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| 950 | #endif |
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[d1193c7] | 951 | |
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[37f4c2d] | 952 | if (getenv("RTEMS_SHM_SIZE")) |
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| 953 | shm_size = strtol(getenv("RTEMS_SHM_SIZE"), 0, 0); |
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| 954 | else |
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| 955 | #ifdef RTEMS_SHM_SIZE |
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| 956 | shm_size = RTEMS_SHM_SIZE; |
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| 957 | #else |
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| 958 | shm_size = 64 * 1024; |
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| 959 | #endif |
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[d1193c7] | 960 | |
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[37f4c2d] | 961 | if (getenv("RTEMS_SHM_SEMAPHORE_KEY")) |
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| 962 | sem_key = strtol(getenv("RTEMS_SHM_SEMAPHORE_KEY"), 0, 0); |
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| 963 | else |
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| 964 | #ifdef RTEMS_SHM_SEMAPHORE_KEY |
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| 965 | sem_key = RTEMS_SHM_SEMAPHORE_KEY; |
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| 966 | #else |
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| 967 | sem_key = 0xa001; |
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| 968 | #endif |
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[d1193c7] | 969 | |
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[37f4c2d] | 970 | shmid = shmget(shm_key, shm_size, IPC_CREAT | 0660); |
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| 971 | if ( shmid == -1 ) { |
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| 972 | fix_syscall_errno(); /* in case of newlib */ |
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| 973 | perror( "shmget" ); |
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| 974 | _CPU_Fatal_halt( 0xdead0001 ); |
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| 975 | } |
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[d1193c7] | 976 | |
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[37f4c2d] | 977 | shm_addr = shmat(shmid, (char *)0, SHM_RND); |
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| 978 | if ( shm_addr == (void *)-1 ) { |
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| 979 | fix_syscall_errno(); /* in case of newlib */ |
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| 980 | perror( "shmat" ); |
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| 981 | _CPU_Fatal_halt( 0xdead0002 ); |
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| 982 | } |
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[d1193c7] | 983 | |
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[37f4c2d] | 984 | _CPU_SHM_Semid = semget(sem_key, maximum_nodes + 1, IPC_CREAT | 0660); |
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| 985 | if ( _CPU_SHM_Semid == -1 ) { |
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| 986 | fix_syscall_errno(); /* in case of newlib */ |
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| 987 | perror( "semget" ); |
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| 988 | _CPU_Fatal_halt( 0xdead0003 ); |
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| 989 | } |
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[d1193c7] | 990 | |
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[37f4c2d] | 991 | if ( is_master_node ) { |
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| 992 | for ( i=0 ; i <= maximum_nodes ; i++ ) { |
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[ea562ee9] | 993 | #if !HAS_UNION_SEMUN |
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[37f4c2d] | 994 | union semun { |
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| 995 | int val; |
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| 996 | struct semid_ds *buf; |
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[ea562ee9] | 997 | unsigned short int *array; |
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| 998 | #if defined(__linux__) |
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| 999 | struct seminfo *__buf; |
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| 1000 | #endif |
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| 1001 | } ; |
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| 1002 | #endif |
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| 1003 | union semun help ; |
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[3a85d03d] | 1004 | help.val = 1; |
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| 1005 | status = semctl( _CPU_SHM_Semid, i, SETVAL, help ); |
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[d1193c7] | 1006 | |
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[37f4c2d] | 1007 | fix_syscall_errno(); /* in case of newlib */ |
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| 1008 | if ( status == -1 ) { |
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| 1009 | _CPU_Fatal_halt( 0xdead0004 ); |
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| 1010 | } |
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| 1011 | } |
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| 1012 | } |
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[d1193c7] | 1013 | |
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[37f4c2d] | 1014 | *shm_address = shm_addr; |
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| 1015 | *shm_length = shm_size; |
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| 1016 | |
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| 1017 | } |
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| 1018 | |
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| 1019 | int _CPU_Get_pid( void ) |
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| 1020 | { |
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| 1021 | return getpid(); |
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| 1022 | } |
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| 1023 | |
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| 1024 | /* |
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| 1025 | * Define this to use signals for MPCI shared memory driver. |
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| 1026 | * If undefined, the shared memory driver will poll from the |
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| 1027 | * clock interrupt. |
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| 1028 | * Ref: ../shmsupp/getcfg.c |
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| 1029 | * |
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| 1030 | * BEWARE:: many UN*X kernels and debuggers become severely confused when |
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| 1031 | * debugging programs which use signals. The problem is *much* |
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| 1032 | * worse when using multiple signals, since ptrace(2) tends to |
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| 1033 | * drop all signals except 1 in the case of multiples. |
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| 1034 | * On hpux9, this problem was so bad, we couldn't use interrupts |
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| 1035 | * with the shared memory driver if we ever hoped to debug |
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| 1036 | * RTEMS programs. |
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| 1037 | * Maybe systems that use /proc don't have this problem... |
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| 1038 | */ |
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[d1193c7] | 1039 | |
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| 1040 | |
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[37f4c2d] | 1041 | int _CPU_SHM_Get_vector( void ) |
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| 1042 | { |
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| 1043 | #ifdef CPU_USE_SHM_INTERRUPTS |
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| 1044 | return SIGUSR1; |
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| 1045 | #else |
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| 1046 | return 0; |
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| 1047 | #endif |
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| 1048 | } |
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| 1049 | |
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| 1050 | void _CPU_SHM_Send_interrupt( |
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| 1051 | int pid, |
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| 1052 | int vector |
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| 1053 | ) |
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| 1054 | { |
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| 1055 | kill((pid_t) pid, vector); |
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| 1056 | } |
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| 1057 | |
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[d1193c7] | 1058 | void _CPU_SHM_Lock( |
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[37f4c2d] | 1059 | int semaphore |
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| 1060 | ) |
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| 1061 | { |
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[0a6fb22] | 1062 | struct sembuf sb; |
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[d1193c7] | 1063 | |
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[37f4c2d] | 1064 | sb.sem_num = semaphore; |
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| 1065 | sb.sem_op = -1; |
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| 1066 | sb.sem_flg = 0; |
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[d1193c7] | 1067 | |
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[37f4c2d] | 1068 | while (1) { |
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[0a6fb22] | 1069 | int status = -1; |
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| 1070 | |
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[37f4c2d] | 1071 | status = semop(_CPU_SHM_Semid, &sb, 1); |
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| 1072 | if ( status >= 0 ) |
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| 1073 | break; |
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| 1074 | if ( status == -1 ) { |
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| 1075 | fix_syscall_errno(); /* in case of newlib */ |
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| 1076 | if (errno == EINTR) |
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| 1077 | continue; |
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| 1078 | perror("shm lock"); |
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| 1079 | _CPU_Fatal_halt( 0xdead0005 ); |
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| 1080 | } |
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| 1081 | } |
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| 1082 | |
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| 1083 | } |
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| 1084 | |
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| 1085 | void _CPU_SHM_Unlock( |
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| 1086 | int semaphore |
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| 1087 | ) |
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| 1088 | { |
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| 1089 | struct sembuf sb; |
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| 1090 | int status; |
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[d1193c7] | 1091 | |
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[37f4c2d] | 1092 | sb.sem_num = semaphore; |
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| 1093 | sb.sem_op = 1; |
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| 1094 | sb.sem_flg = 0; |
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[d1193c7] | 1095 | |
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[37f4c2d] | 1096 | while (1) { |
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| 1097 | status = semop(_CPU_SHM_Semid, &sb, 1); |
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| 1098 | if ( status >= 0 ) |
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| 1099 | break; |
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[d1193c7] | 1100 | |
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[37f4c2d] | 1101 | if ( status == -1 ) { |
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| 1102 | fix_syscall_errno(); /* in case of newlib */ |
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| 1103 | if (errno == EINTR) |
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| 1104 | continue; |
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| 1105 | perror("shm unlock"); |
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| 1106 | _CPU_Fatal_halt( 0xdead0006 ); |
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| 1107 | } |
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| 1108 | } |
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| 1109 | |
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| 1110 | } |
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