[ac7d5ef0] | 1 | /* |
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[3652ad35] | 2 | * UNIX Simulator Dependent Source |
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[ac7d5ef0] | 3 | * |
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| 4 | * |
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| 5 | * To anyone who acknowledges that this file is provided "AS IS" |
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| 6 | * without any express or implied warranty: |
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| 7 | * permission to use, copy, modify, and distribute this file |
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| 8 | * for any purpose is hereby granted without fee, provided that |
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| 9 | * the above copyright notice and this notice appears in all |
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| 10 | * copies, and that the name of Division Incorporated not be |
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| 11 | * used in advertising or publicity pertaining to distribution |
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| 12 | * of the software without specific, written prior permission. |
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| 13 | * Division Incorporated makes no representations about the |
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| 14 | * suitability of this software for any purpose. |
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| 15 | * |
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| 16 | * $Id$ |
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| 17 | */ |
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| 18 | |
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| 19 | #include <rtems/system.h> |
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[5e9b32b] | 20 | #include <rtems/score/isr.h> |
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| 21 | #include <rtems/score/interr.h> |
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[ac7d5ef0] | 22 | |
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[37f4c2d] | 23 | #if defined(solaris2) |
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[1ceface] | 24 | /* |
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[37f4c2d] | 25 | #undef _POSIX_C_SOURCE |
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| 26 | #define _POSIX_C_SOURCE 3 |
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| 27 | #undef __STRICT_ANSI__ |
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| 28 | #define __STRICT_ANSI__ |
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[1ceface] | 29 | */ |
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| 30 | #define __EXTENSIONS__ |
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[37f4c2d] | 31 | #endif |
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| 32 | |
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| 33 | #if defined(linux) |
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| 34 | #define MALLOC_0_RETURNS_NULL |
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| 35 | #endif |
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| 36 | |
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[ac7d5ef0] | 37 | #include <stdio.h> |
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| 38 | #include <stdlib.h> |
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[37f4c2d] | 39 | #include <setjmp.h> |
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[ac7d5ef0] | 40 | #include <signal.h> |
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| 41 | #include <time.h> |
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[10aed1e3] | 42 | #include <sys/time.h> |
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[37f4c2d] | 43 | #include <sys/types.h> |
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| 44 | #include <errno.h> |
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| 45 | #include <unistd.h> |
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| 46 | #include <sys/ipc.h> |
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| 47 | #include <sys/shm.h> |
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| 48 | #include <sys/sem.h> |
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[ac7d5ef0] | 49 | |
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[637df35] | 50 | #ifndef SA_RESTART |
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| 51 | #define SA_RESTART 0 |
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| 52 | #endif |
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[ac7d5ef0] | 53 | |
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[37f4c2d] | 54 | typedef struct { |
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| 55 | jmp_buf regs; |
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| 56 | sigset_t isr_level; |
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| 57 | } Context_Control_overlay; |
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| 58 | |
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[637df35] | 59 | void _CPU_Signal_initialize(void); |
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| 60 | void _CPU_Stray_signal(int); |
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| 61 | void _CPU_ISR_Handler(int); |
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[ac7d5ef0] | 62 | |
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[637df35] | 63 | sigset_t _CPU_Signal_mask; |
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| 64 | Context_Control _CPU_Context_Default_with_ISRs_enabled; |
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| 65 | Context_Control _CPU_Context_Default_with_ISRs_disabled; |
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[ac7d5ef0] | 66 | |
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| 67 | /* |
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| 68 | * Which cpu are we? Used by libcpu and libbsp. |
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| 69 | */ |
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| 70 | |
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| 71 | int cpu_number; |
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| 72 | |
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[637df35] | 73 | /*PAGE |
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| 74 | * |
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| 75 | * _CPU_ISR_From_CPU_Init |
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| 76 | */ |
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| 77 | |
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[e7e016f] | 78 | sigset_t posix_empty_mask; |
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| 79 | |
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[637df35] | 80 | void _CPU_ISR_From_CPU_Init() |
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| 81 | { |
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| 82 | unsigned32 i; |
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| 83 | proc_ptr old_handler; |
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| 84 | |
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[e7e016f] | 85 | /* |
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| 86 | * Generate an empty mask to be used by disable_support |
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| 87 | */ |
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[637df35] | 88 | |
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[e7e016f] | 89 | sigemptyset(&posix_empty_mask); |
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[c64e4ed4] | 90 | |
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[637df35] | 91 | /* |
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| 92 | * Block all the signals except SIGTRAP for the debugger |
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| 93 | * and SIGABRT for fatal errors. |
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| 94 | */ |
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| 95 | |
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| 96 | (void) sigfillset(&_CPU_Signal_mask); |
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| 97 | (void) sigdelset(&_CPU_Signal_mask, SIGTRAP); |
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| 98 | (void) sigdelset(&_CPU_Signal_mask, SIGABRT); |
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| 99 | (void) sigdelset(&_CPU_Signal_mask, SIGIOT); |
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| 100 | (void) sigdelset(&_CPU_Signal_mask, SIGCONT); |
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| 101 | |
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[e7e016f] | 102 | _CPU_ISR_Enable(1); |
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[637df35] | 103 | |
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| 104 | /* |
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| 105 | * Set the handler for all signals to be signal_handler |
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| 106 | * which will then vector out to the correct handler |
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| 107 | * for whichever signal actually happened. Initially |
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| 108 | * set the vectors to the stray signal handler. |
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| 109 | */ |
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| 110 | |
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| 111 | for (i = 0; i < CPU_INTERRUPT_NUMBER_OF_VECTORS; i++) |
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| 112 | (void)_CPU_ISR_install_vector(i, _CPU_Stray_signal, &old_handler); |
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| 113 | |
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| 114 | _CPU_Signal_initialize(); |
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| 115 | } |
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| 116 | |
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| 117 | void _CPU_Signal_initialize( void ) |
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| 118 | { |
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| 119 | struct sigaction act; |
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| 120 | sigset_t mask; |
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| 121 | |
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| 122 | /* mark them all active except for TraceTrap and Abort */ |
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| 123 | |
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| 124 | sigfillset(&mask); |
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| 125 | sigdelset(&mask, SIGTRAP); |
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| 126 | sigdelset(&mask, SIGABRT); |
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| 127 | sigdelset(&mask, SIGIOT); |
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| 128 | sigdelset(&mask, SIGCONT); |
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| 129 | sigprocmask(SIG_UNBLOCK, &mask, 0); |
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| 130 | |
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| 131 | act.sa_handler = _CPU_ISR_Handler; |
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| 132 | act.sa_mask = mask; |
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| 133 | act.sa_flags = SA_RESTART; |
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| 134 | |
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| 135 | sigaction(SIGHUP, &act, 0); |
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| 136 | sigaction(SIGINT, &act, 0); |
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| 137 | sigaction(SIGQUIT, &act, 0); |
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| 138 | sigaction(SIGILL, &act, 0); |
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[10aed1e3] | 139 | #ifdef SIGEMT |
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[637df35] | 140 | sigaction(SIGEMT, &act, 0); |
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[10aed1e3] | 141 | #endif |
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[637df35] | 142 | sigaction(SIGFPE, &act, 0); |
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| 143 | sigaction(SIGKILL, &act, 0); |
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| 144 | sigaction(SIGBUS, &act, 0); |
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| 145 | sigaction(SIGSEGV, &act, 0); |
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[10aed1e3] | 146 | #ifdef SIGSYS |
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[637df35] | 147 | sigaction(SIGSYS, &act, 0); |
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[10aed1e3] | 148 | #endif |
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[637df35] | 149 | sigaction(SIGPIPE, &act, 0); |
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| 150 | sigaction(SIGALRM, &act, 0); |
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| 151 | sigaction(SIGTERM, &act, 0); |
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| 152 | sigaction(SIGUSR1, &act, 0); |
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| 153 | sigaction(SIGUSR2, &act, 0); |
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| 154 | sigaction(SIGCHLD, &act, 0); |
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| 155 | sigaction(SIGCLD, &act, 0); |
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| 156 | sigaction(SIGPWR, &act, 0); |
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| 157 | sigaction(SIGVTALRM, &act, 0); |
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| 158 | sigaction(SIGPROF, &act, 0); |
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| 159 | sigaction(SIGIO, &act, 0); |
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| 160 | sigaction(SIGWINCH, &act, 0); |
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| 161 | sigaction(SIGSTOP, &act, 0); |
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| 162 | sigaction(SIGTTIN, &act, 0); |
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| 163 | sigaction(SIGTTOU, &act, 0); |
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| 164 | sigaction(SIGURG, &act, 0); |
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[e7e016f] | 165 | #ifdef SIGLOST |
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[637df35] | 166 | sigaction(SIGLOST, &act, 0); |
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| 167 | #endif |
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| 168 | |
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| 169 | } |
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| 170 | |
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| 171 | /*PAGE |
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| 172 | * |
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| 173 | * _CPU_Context_From_CPU_Init |
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| 174 | */ |
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| 175 | |
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| 176 | void _CPU_Context_From_CPU_Init() |
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| 177 | { |
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| 178 | |
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[11290355] | 179 | #if defined(hppa1_1) && defined(RTEMS_UNIXLIB_SETJMP) |
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[637df35] | 180 | /* |
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| 181 | * HACK - set the _SYSTEM_ID to 0x20c so that setjmp/longjmp |
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| 182 | * will handle the full 32 floating point registers. |
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| 183 | * |
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| 184 | * NOTE: Is this a bug in HPUX9? |
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| 185 | */ |
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| 186 | |
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| 187 | { |
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| 188 | extern unsigned32 _SYSTEM_ID; |
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| 189 | |
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| 190 | _SYSTEM_ID = 0x20c; |
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| 191 | } |
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| 192 | #endif |
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| 193 | |
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| 194 | /* |
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| 195 | * get default values to use in _CPU_Context_Initialize() |
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| 196 | */ |
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| 197 | |
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| 198 | _CPU_ISR_Set_level( 0 ); |
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[3652ad35] | 199 | _CPU_Context_switch( |
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| 200 | &_CPU_Context_Default_with_ISRs_enabled, |
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| 201 | &_CPU_Context_Default_with_ISRs_enabled |
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[637df35] | 202 | ); |
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| 203 | |
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| 204 | _CPU_ISR_Set_level( 1 ); |
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[3652ad35] | 205 | _CPU_Context_switch( |
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| 206 | &_CPU_Context_Default_with_ISRs_disabled, |
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| 207 | &_CPU_Context_Default_with_ISRs_disabled |
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[637df35] | 208 | ); |
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| 209 | } |
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| 210 | |
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[3a4ae6c] | 211 | /*PAGE |
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| 212 | * |
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| 213 | * _CPU_ISR_Get_level |
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| 214 | */ |
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| 215 | |
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[3652ad35] | 216 | sigset_t GET_old_mask; |
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| 217 | |
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[3a4ae6c] | 218 | unsigned32 _CPU_ISR_Get_level( void ) |
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| 219 | { |
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[3652ad35] | 220 | /* sigset_t old_mask; */ |
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| 221 | unsigned32 old_level; |
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[3a4ae6c] | 222 | |
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[3652ad35] | 223 | sigprocmask(0, 0, &GET_old_mask); |
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| 224 | |
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| 225 | if (memcmp((void *)&posix_empty_mask, (void *)&GET_old_mask, sizeof(sigset_t))) |
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| 226 | old_level = 1; |
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| 227 | else |
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| 228 | old_level = 0; |
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[3a4ae6c] | 229 | |
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[3652ad35] | 230 | return old_level; |
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[3a4ae6c] | 231 | } |
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| 232 | |
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[ac7d5ef0] | 233 | /* _CPU_Initialize |
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| 234 | * |
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| 235 | * This routine performs processor dependent initialization. |
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| 236 | * |
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| 237 | * INPUT PARAMETERS: |
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| 238 | * cpu_table - CPU table to initialize |
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| 239 | * thread_dispatch - address of disptaching routine |
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| 240 | */ |
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| 241 | |
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| 242 | |
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| 243 | void _CPU_Initialize( |
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| 244 | rtems_cpu_table *cpu_table, |
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[3a4ae6c] | 245 | void (*thread_dispatch) /* ignored on this CPU */ |
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[ac7d5ef0] | 246 | ) |
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| 247 | { |
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| 248 | /* |
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| 249 | * The thread_dispatch argument is the address of the entry point |
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| 250 | * for the routine called at the end of an ISR once it has been |
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| 251 | * decided a context switch is necessary. On some compilation |
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| 252 | * systems it is difficult to call a high-level language routine |
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| 253 | * from assembly. This allows us to trick these systems. |
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| 254 | * |
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| 255 | * If you encounter this problem save the entry point in a CPU |
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| 256 | * dependent variable. |
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| 257 | */ |
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| 258 | |
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| 259 | _CPU_Thread_dispatch_pointer = thread_dispatch; |
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| 260 | |
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| 261 | /* |
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| 262 | * XXX; If there is not an easy way to initialize the FP context |
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| 263 | * during Context_Initialize, then it is usually easier to |
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| 264 | * save an "uninitialized" FP context here and copy it to |
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| 265 | * the task's during Context_Initialize. |
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| 266 | */ |
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| 267 | |
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| 268 | /* XXX: FP context initialization support */ |
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| 269 | |
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| 270 | _CPU_Table = *cpu_table; |
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| 271 | |
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[637df35] | 272 | _CPU_ISR_From_CPU_Init(); |
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[ac7d5ef0] | 273 | |
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[637df35] | 274 | _CPU_Context_From_CPU_Init(); |
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[ac7d5ef0] | 275 | |
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[637df35] | 276 | } |
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[ac7d5ef0] | 277 | |
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[637df35] | 278 | /*PAGE |
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| 279 | * |
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| 280 | * _CPU_ISR_install_raw_handler |
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| 281 | */ |
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[ac7d5ef0] | 282 | |
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[637df35] | 283 | void _CPU_ISR_install_raw_handler( |
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| 284 | unsigned32 vector, |
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| 285 | proc_ptr new_handler, |
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| 286 | proc_ptr *old_handler |
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| 287 | ) |
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| 288 | { |
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| 289 | _CPU_Fatal_halt( 0xdeaddead ); |
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[ac7d5ef0] | 290 | } |
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| 291 | |
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[637df35] | 292 | /*PAGE |
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| 293 | * |
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| 294 | * _CPU_ISR_install_vector |
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[ac7d5ef0] | 295 | * |
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| 296 | * This kernel routine installs the RTEMS handler for the |
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| 297 | * specified vector. |
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| 298 | * |
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| 299 | * Input parameters: |
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| 300 | * vector - interrupt vector number |
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| 301 | * old_handler - former ISR for this vector number |
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| 302 | * new_handler - replacement ISR for this vector number |
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| 303 | * |
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| 304 | * Output parameters: NONE |
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| 305 | * |
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| 306 | */ |
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| 307 | |
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| 308 | |
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| 309 | void _CPU_ISR_install_vector( |
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| 310 | unsigned32 vector, |
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| 311 | proc_ptr new_handler, |
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| 312 | proc_ptr *old_handler |
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| 313 | ) |
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| 314 | { |
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| 315 | *old_handler = _ISR_Vector_table[ vector ]; |
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| 316 | |
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| 317 | /* |
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| 318 | * If the interrupt vector table is a table of pointer to isr entry |
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| 319 | * points, then we need to install the appropriate RTEMS interrupt |
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| 320 | * handler for this vector number. |
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| 321 | */ |
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| 322 | |
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| 323 | /* |
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| 324 | * We put the actual user ISR address in '_ISR_vector_table'. This will |
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[637df35] | 325 | * be used by the _CPU_ISR_Handler so the user gets control. |
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[ac7d5ef0] | 326 | */ |
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| 327 | |
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| 328 | _ISR_Vector_table[ vector ] = new_handler; |
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| 329 | } |
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| 330 | |
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| 331 | /*PAGE |
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| 332 | * |
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| 333 | * _CPU_Install_interrupt_stack |
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| 334 | */ |
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| 335 | |
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| 336 | void _CPU_Install_interrupt_stack( void ) |
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| 337 | { |
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| 338 | } |
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| 339 | |
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| 340 | /*PAGE |
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| 341 | * |
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| 342 | * _CPU_Internal_threads_Idle_thread_body |
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| 343 | * |
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[9700578] | 344 | * Stop until we get a signal which is the logically the same thing |
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| 345 | * entering low-power or sleep mode on a real processor and waiting for |
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| 346 | * an interrupt. This significantly reduces the consumption of host |
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| 347 | * CPU cycles which is again similar to low power mode. |
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[ac7d5ef0] | 348 | */ |
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| 349 | |
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| 350 | void _CPU_Internal_threads_Idle_thread_body( void ) |
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| 351 | { |
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[637df35] | 352 | while (1) |
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| 353 | pause(); |
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[ac7d5ef0] | 354 | } |
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| 355 | |
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[637df35] | 356 | /*PAGE |
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| 357 | * |
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| 358 | * _CPU_Context_Initialize |
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| 359 | */ |
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| 360 | |
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[ac7d5ef0] | 361 | void _CPU_Context_Initialize( |
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| 362 | Context_Control *_the_context, |
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| 363 | unsigned32 *_stack_base, |
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| 364 | unsigned32 _size, |
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| 365 | unsigned32 _new_level, |
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[9700578] | 366 | void *_entry_point, |
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| 367 | boolean _is_fp |
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[ac7d5ef0] | 368 | ) |
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| 369 | { |
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[637df35] | 370 | void *source; |
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| 371 | unsigned32 *addr; |
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| 372 | unsigned32 jmp_addr; |
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| 373 | unsigned32 _stack_low; /* lowest "stack aligned" address */ |
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| 374 | unsigned32 _stack_high; /* highest "stack aligned" address */ |
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| 375 | unsigned32 _the_size; |
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[ac7d5ef0] | 376 | |
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[637df35] | 377 | jmp_addr = (unsigned32) _entry_point; |
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[ac7d5ef0] | 378 | |
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[637df35] | 379 | /* |
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| 380 | * On CPUs with stacks which grow down, we build the stack |
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| 381 | * based on the _stack_high address. On CPUs with stacks which |
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| 382 | * grow up, we build the stack based on the _stack_low address. |
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| 383 | */ |
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[88d594a] | 384 | |
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[637df35] | 385 | _stack_low = ((unsigned32)(_stack_base) + CPU_STACK_ALIGNMENT); |
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| 386 | _stack_low &= ~(CPU_STACK_ALIGNMENT - 1); |
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[88d594a] | 387 | |
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[637df35] | 388 | _stack_high = ((unsigned32)(_stack_base) + _size); |
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| 389 | _stack_high &= ~(CPU_STACK_ALIGNMENT - 1); |
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[ac7d5ef0] | 390 | |
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[637df35] | 391 | _the_size = _size & ~(CPU_STACK_ALIGNMENT - 1); |
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[ac7d5ef0] | 392 | |
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[637df35] | 393 | /* |
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| 394 | * Slam our jmp_buf template into the context we are creating |
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| 395 | */ |
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[ac7d5ef0] | 396 | |
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[637df35] | 397 | if ( _new_level == 0 ) |
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[37f4c2d] | 398 | source = &_CPU_Context_Default_with_ISRs_enabled; |
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[637df35] | 399 | else |
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[37f4c2d] | 400 | source = &_CPU_Context_Default_with_ISRs_disabled; |
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[637df35] | 401 | |
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[3652ad35] | 402 | memcpy(_the_context, source, sizeof(Context_Control) ); /* sizeof(jmp_buf)); */ |
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[ac7d5ef0] | 403 | |
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[637df35] | 404 | addr = (unsigned32 *)_the_context; |
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[ac7d5ef0] | 405 | |
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| 406 | #if defined(hppa1_1) |
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[637df35] | 407 | *(addr + RP_OFF) = jmp_addr; |
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| 408 | *(addr + SP_OFF) = (unsigned32)(_stack_low + CPU_FRAME_SIZE); |
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[ac7d5ef0] | 409 | |
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[637df35] | 410 | /* |
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| 411 | * See if we are using shared libraries by checking |
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| 412 | * bit 30 in 24 off of newp. If bit 30 is set then |
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| 413 | * we are using shared libraries and the jump address |
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| 414 | * is at what 24 off of newp points to so shove that |
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| 415 | * into 24 off of newp instead. |
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| 416 | */ |
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[ac7d5ef0] | 417 | |
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[637df35] | 418 | if (jmp_addr & 0x40000000) { |
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| 419 | jmp_addr &= 0xfffffffc; |
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| 420 | *(addr + RP_OFF) = (unsigned32)*(unsigned32 *)jmp_addr; |
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| 421 | } |
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[ac7d5ef0] | 422 | #elif defined(sparc) |
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| 423 | |
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[637df35] | 424 | /* |
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| 425 | * See /usr/include/sys/stack.h in Solaris 2.3 for a nice |
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| 426 | * diagram of the stack. |
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| 427 | */ |
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[ac7d5ef0] | 428 | |
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[637df35] | 429 | asm ("ta 0x03"); /* flush registers */ |
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[ac7d5ef0] | 430 | |
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[637df35] | 431 | *(addr + RP_OFF) = jmp_addr + ADDR_ADJ_OFFSET; |
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| 432 | *(addr + SP_OFF) = (unsigned32)(_stack_high - CPU_FRAME_SIZE); |
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| 433 | *(addr + FP_OFF) = (unsigned32)(_stack_high); |
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[8044533] | 434 | |
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| 435 | #elif defined(i386) |
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| 436 | |
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| 437 | /* |
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| 438 | * This information was gathered by disassembling setjmp(). |
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| 439 | */ |
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[10aed1e3] | 440 | |
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| 441 | { |
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| 442 | unsigned32 stack_ptr; |
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| 443 | |
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| 444 | stack_ptr = _stack_high - CPU_FRAME_SIZE; |
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| 445 | |
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| 446 | *(addr + EBX_OFF) = 0xFEEDFEED; |
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| 447 | *(addr + ESI_OFF) = 0xDEADDEAD; |
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| 448 | *(addr + EDI_OFF) = 0xDEAFDEAF; |
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| 449 | *(addr + EBP_OFF) = stack_ptr; |
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| 450 | *(addr + ESP_OFF) = stack_ptr; |
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| 451 | *(addr + RET_OFF) = jmp_addr; |
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[8044533] | 452 | |
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[10aed1e3] | 453 | addr = (unsigned32 *) stack_ptr; |
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[8044533] | 454 | |
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[10aed1e3] | 455 | addr[ 0 ] = jmp_addr; |
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| 456 | addr[ 1 ] = (unsigned32) stack_ptr; |
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| 457 | addr[ 2 ] = (unsigned32) stack_ptr; |
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| 458 | } |
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[8044533] | 459 | |
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[ac7d5ef0] | 460 | #else |
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| 461 | #error "UNKNOWN CPU!!!" |
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| 462 | #endif |
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| 463 | |
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| 464 | } |
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| 465 | |
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[637df35] | 466 | /*PAGE |
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| 467 | * |
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| 468 | * _CPU_Context_restore |
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| 469 | */ |
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| 470 | |
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[ac7d5ef0] | 471 | void _CPU_Context_restore( |
---|
| 472 | Context_Control *next |
---|
| 473 | ) |
---|
| 474 | { |
---|
[37f4c2d] | 475 | Context_Control_overlay *nextp = (Context_Control_overlay *)next; |
---|
| 476 | |
---|
| 477 | sigprocmask( SIG_SETMASK, &nextp->isr_level, 0 ); |
---|
| 478 | longjmp( nextp->regs, 0 ); |
---|
[ac7d5ef0] | 479 | } |
---|
| 480 | |
---|
[637df35] | 481 | /*PAGE |
---|
| 482 | * |
---|
| 483 | * _CPU_Context_switch |
---|
| 484 | */ |
---|
| 485 | |
---|
[ac7d5ef0] | 486 | void _CPU_Context_switch( |
---|
| 487 | Context_Control *current, |
---|
| 488 | Context_Control *next |
---|
| 489 | ) |
---|
| 490 | { |
---|
[37f4c2d] | 491 | Context_Control_overlay *currentp = (Context_Control_overlay *)current; |
---|
| 492 | Context_Control_overlay *nextp = (Context_Control_overlay *)next; |
---|
| 493 | |
---|
[3652ad35] | 494 | int status; |
---|
| 495 | |
---|
[637df35] | 496 | /* |
---|
| 497 | * Switch levels in one operation |
---|
| 498 | */ |
---|
[ac7d5ef0] | 499 | |
---|
[37f4c2d] | 500 | status = sigprocmask( SIG_SETMASK, &nextp->isr_level, ¤tp->isr_level ); |
---|
[3652ad35] | 501 | if ( status ) |
---|
| 502 | _Internal_error_Occurred( |
---|
| 503 | INTERNAL_ERROR_CORE, |
---|
| 504 | TRUE, |
---|
| 505 | status |
---|
| 506 | ); |
---|
[ac7d5ef0] | 507 | |
---|
[37f4c2d] | 508 | if (setjmp(currentp->regs) == 0) { /* Save the current context */ |
---|
| 509 | longjmp(nextp->regs, 0); /* Switch to the new context */ |
---|
[3652ad35] | 510 | if ( status ) |
---|
| 511 | _Internal_error_Occurred( |
---|
| 512 | INTERNAL_ERROR_CORE, |
---|
| 513 | TRUE, |
---|
| 514 | status |
---|
| 515 | ); |
---|
[637df35] | 516 | } |
---|
[3652ad35] | 517 | |
---|
[ac7d5ef0] | 518 | } |
---|
[637df35] | 519 | |
---|
| 520 | /*PAGE |
---|
| 521 | * |
---|
| 522 | * _CPU_Save_float_context |
---|
| 523 | */ |
---|
[ac7d5ef0] | 524 | |
---|
| 525 | void _CPU_Save_float_context( |
---|
| 526 | Context_Control_fp *fp_context |
---|
| 527 | ) |
---|
| 528 | { |
---|
| 529 | } |
---|
| 530 | |
---|
[637df35] | 531 | /*PAGE |
---|
| 532 | * |
---|
| 533 | * _CPU_Restore_float_context |
---|
| 534 | */ |
---|
| 535 | |
---|
[ac7d5ef0] | 536 | void _CPU_Restore_float_context( |
---|
| 537 | Context_Control_fp *fp_context |
---|
| 538 | ) |
---|
| 539 | { |
---|
| 540 | } |
---|
| 541 | |
---|
[637df35] | 542 | /*PAGE |
---|
| 543 | * |
---|
| 544 | * _CPU_ISR_Disable_support |
---|
| 545 | */ |
---|
[ac7d5ef0] | 546 | |
---|
[637df35] | 547 | unsigned32 _CPU_ISR_Disable_support(void) |
---|
[ac7d5ef0] | 548 | { |
---|
[3652ad35] | 549 | int status; |
---|
[637df35] | 550 | sigset_t old_mask; |
---|
[ac7d5ef0] | 551 | |
---|
[3652ad35] | 552 | status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, &old_mask); |
---|
| 553 | if ( status ) |
---|
| 554 | _Internal_error_Occurred( |
---|
| 555 | INTERNAL_ERROR_CORE, |
---|
| 556 | TRUE, |
---|
| 557 | status |
---|
| 558 | ); |
---|
[ac7d5ef0] | 559 | |
---|
[3652ad35] | 560 | if (memcmp((void *)&posix_empty_mask, (void *)&old_mask, sizeof(sigset_t))) |
---|
[637df35] | 561 | return 1; |
---|
[ac7d5ef0] | 562 | |
---|
[637df35] | 563 | return 0; |
---|
[ac7d5ef0] | 564 | } |
---|
| 565 | |
---|
[637df35] | 566 | /*PAGE |
---|
| 567 | * |
---|
| 568 | * _CPU_ISR_Enable |
---|
| 569 | */ |
---|
[ac7d5ef0] | 570 | |
---|
[637df35] | 571 | void _CPU_ISR_Enable( |
---|
| 572 | unsigned32 level |
---|
| 573 | ) |
---|
[ac7d5ef0] | 574 | { |
---|
[3652ad35] | 575 | int status; |
---|
| 576 | |
---|
[637df35] | 577 | if (level == 0) |
---|
[3652ad35] | 578 | status = sigprocmask(SIG_UNBLOCK, &_CPU_Signal_mask, 0); |
---|
[637df35] | 579 | else |
---|
[3652ad35] | 580 | status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, 0); |
---|
| 581 | |
---|
| 582 | if ( status ) |
---|
| 583 | _Internal_error_Occurred( |
---|
| 584 | INTERNAL_ERROR_CORE, |
---|
| 585 | TRUE, |
---|
| 586 | status |
---|
| 587 | ); |
---|
[ac7d5ef0] | 588 | } |
---|
| 589 | |
---|
[637df35] | 590 | /*PAGE |
---|
[ac7d5ef0] | 591 | * |
---|
[637df35] | 592 | * _CPU_ISR_Handler |
---|
| 593 | * |
---|
| 594 | * External interrupt handler. |
---|
| 595 | * This is installed as a UNIX signal handler. |
---|
| 596 | * It vectors out to specific user interrupt handlers. |
---|
[ac7d5ef0] | 597 | */ |
---|
| 598 | |
---|
[637df35] | 599 | void _CPU_ISR_Handler(int vector) |
---|
[ac7d5ef0] | 600 | { |
---|
[637df35] | 601 | extern void _Thread_Dispatch(void); |
---|
| 602 | extern unsigned32 _Thread_Dispatch_disable_level; |
---|
| 603 | extern boolean _Context_Switch_necessary; |
---|
[ac7d5ef0] | 604 | |
---|
[637df35] | 605 | if (_ISR_Nest_level++ == 0) { |
---|
| 606 | /* switch to interrupt stack */ |
---|
| 607 | } |
---|
[ac7d5ef0] | 608 | |
---|
[637df35] | 609 | _Thread_Dispatch_disable_level++; |
---|
[ac7d5ef0] | 610 | |
---|
[637df35] | 611 | if (_ISR_Vector_table[vector]) { |
---|
| 612 | _ISR_Vector_table[vector](vector); |
---|
| 613 | } else { |
---|
| 614 | _CPU_Stray_signal(vector); |
---|
| 615 | } |
---|
[ac7d5ef0] | 616 | |
---|
[637df35] | 617 | if (_ISR_Nest_level-- == 0) { |
---|
| 618 | /* switch back to original stack */ |
---|
| 619 | } |
---|
[ac7d5ef0] | 620 | |
---|
[637df35] | 621 | _Thread_Dispatch_disable_level--; |
---|
[ac7d5ef0] | 622 | |
---|
[637df35] | 623 | if (_Thread_Dispatch_disable_level == 0 && |
---|
| 624 | (_Context_Switch_necessary || _ISR_Signals_to_thread_executing)) { |
---|
| 625 | _CPU_ISR_Enable(0); |
---|
| 626 | _Thread_Dispatch(); |
---|
| 627 | } |
---|
[ac7d5ef0] | 628 | } |
---|
| 629 | |
---|
[637df35] | 630 | /*PAGE |
---|
| 631 | * |
---|
| 632 | * _CPU_Stray_signal |
---|
| 633 | */ |
---|
[ac7d5ef0] | 634 | |
---|
[637df35] | 635 | void _CPU_Stray_signal(int sig_num) |
---|
[ac7d5ef0] | 636 | { |
---|
[c64e4ed4] | 637 | char buffer[ 4 ]; |
---|
| 638 | |
---|
| 639 | /* |
---|
| 640 | * print "stray" msg about ones which that might mean something |
---|
| 641 | * Avoid using the stdio section of the library. |
---|
| 642 | * The following is generally safe. |
---|
[637df35] | 643 | */ |
---|
[c64e4ed4] | 644 | |
---|
| 645 | switch (sig_num) |
---|
| 646 | { |
---|
| 647 | case SIGCLD: |
---|
| 648 | break; |
---|
| 649 | |
---|
| 650 | default: |
---|
| 651 | { |
---|
| 652 | /* |
---|
| 653 | * We avoid using the stdio section of the library. |
---|
| 654 | * The following is generally safe. |
---|
| 655 | */ |
---|
| 656 | |
---|
| 657 | buffer[ 0 ] = (sig_num >> 4) + 0x30; |
---|
| 658 | buffer[ 1 ] = (sig_num & 0xf) + 0x30; |
---|
| 659 | buffer[ 2 ] = '\n'; |
---|
| 660 | |
---|
| 661 | write( 2, "Stray signal 0x", 12 ); |
---|
| 662 | write( 2, buffer, 3 ); |
---|
| 663 | } |
---|
| 664 | } |
---|
[ac7d5ef0] | 665 | |
---|
[637df35] | 666 | /* |
---|
| 667 | * If it was a "fatal" signal, then exit here |
---|
| 668 | * If app code has installed a hander for one of these, then |
---|
| 669 | * we won't call _CPU_Stray_signal, so this is ok. |
---|
| 670 | */ |
---|
[ac7d5ef0] | 671 | |
---|
[637df35] | 672 | switch (sig_num) { |
---|
| 673 | case SIGINT: |
---|
| 674 | case SIGHUP: |
---|
| 675 | case SIGQUIT: |
---|
| 676 | case SIGILL: |
---|
[10aed1e3] | 677 | #ifdef SIGEMT |
---|
[637df35] | 678 | case SIGEMT: |
---|
[10aed1e3] | 679 | #endif |
---|
[637df35] | 680 | case SIGKILL: |
---|
| 681 | case SIGBUS: |
---|
| 682 | case SIGSEGV: |
---|
| 683 | case SIGTERM: |
---|
| 684 | _CPU_Fatal_error(0x100 + sig_num); |
---|
| 685 | } |
---|
[ac7d5ef0] | 686 | } |
---|
| 687 | |
---|
[637df35] | 688 | /*PAGE |
---|
| 689 | * |
---|
| 690 | * _CPU_Fatal_error |
---|
| 691 | */ |
---|
[ac7d5ef0] | 692 | |
---|
[637df35] | 693 | void _CPU_Fatal_error(unsigned32 error) |
---|
[ac7d5ef0] | 694 | { |
---|
[637df35] | 695 | setitimer(ITIMER_REAL, 0, 0); |
---|
[ac7d5ef0] | 696 | |
---|
[e7e016f] | 697 | if ( error ) { |
---|
| 698 | #ifdef RTEMS_DEBUG |
---|
| 699 | abort(); |
---|
| 700 | #endif |
---|
| 701 | if (getenv("RTEMS_DEBUG")) |
---|
| 702 | abort(); |
---|
| 703 | } |
---|
| 704 | |
---|
[637df35] | 705 | _exit(error); |
---|
[ac7d5ef0] | 706 | } |
---|
| 707 | |
---|
[37f4c2d] | 708 | /* |
---|
| 709 | * Special Purpose Routines to hide the use of UNIX system calls. |
---|
| 710 | */ |
---|
| 711 | |
---|
| 712 | int _CPU_Get_clock_vector( void ) |
---|
| 713 | { |
---|
| 714 | return SIGALRM; |
---|
| 715 | } |
---|
| 716 | |
---|
| 717 | void _CPU_Start_clock( |
---|
| 718 | int microseconds |
---|
| 719 | ) |
---|
| 720 | { |
---|
| 721 | struct itimerval new; |
---|
| 722 | |
---|
| 723 | new.it_value.tv_sec = 0; |
---|
| 724 | new.it_value.tv_usec = microseconds; |
---|
| 725 | new.it_interval.tv_sec = 0; |
---|
| 726 | new.it_interval.tv_usec = microseconds; |
---|
| 727 | |
---|
| 728 | setitimer(ITIMER_REAL, &new, 0); |
---|
| 729 | } |
---|
| 730 | |
---|
| 731 | void _CPU_Stop_clock( void ) |
---|
| 732 | { |
---|
| 733 | struct itimerval new; |
---|
| 734 | struct sigaction act; |
---|
| 735 | |
---|
| 736 | /* |
---|
| 737 | * Set the SIGALRM signal to ignore any last |
---|
| 738 | * signals that might come in while we are |
---|
| 739 | * disarming the timer and removing the interrupt |
---|
| 740 | * vector. |
---|
| 741 | */ |
---|
| 742 | |
---|
| 743 | act.sa_handler = SIG_IGN; |
---|
| 744 | |
---|
| 745 | sigaction(SIGALRM, &act, 0); |
---|
| 746 | |
---|
| 747 | new.it_value.tv_sec = 0; |
---|
| 748 | new.it_value.tv_usec = 0; |
---|
| 749 | |
---|
| 750 | setitimer(ITIMER_REAL, &new, 0); |
---|
| 751 | } |
---|
| 752 | |
---|
| 753 | int _CPU_SHM_Semid; |
---|
| 754 | extern void fix_syscall_errno( void ); |
---|
| 755 | |
---|
| 756 | void _CPU_SHM_Init( |
---|
| 757 | unsigned32 maximum_nodes, |
---|
| 758 | boolean is_master_node, |
---|
| 759 | void **shm_address, |
---|
| 760 | unsigned32 *shm_length |
---|
| 761 | ) |
---|
| 762 | { |
---|
| 763 | int i; |
---|
| 764 | int shmid; |
---|
| 765 | char *shm_addr; |
---|
| 766 | key_t shm_key; |
---|
| 767 | key_t sem_key; |
---|
| 768 | int status; |
---|
| 769 | int shm_size; |
---|
| 770 | |
---|
| 771 | if (getenv("RTEMS_SHM_KEY")) |
---|
| 772 | shm_key = strtol(getenv("RTEMS_SHM_KEY"), 0, 0); |
---|
| 773 | else |
---|
| 774 | #ifdef RTEMS_SHM_KEY |
---|
| 775 | shm_key = RTEMS_SHM_KEY; |
---|
| 776 | #else |
---|
| 777 | shm_key = 0xa000; |
---|
| 778 | #endif |
---|
| 779 | |
---|
| 780 | if (getenv("RTEMS_SHM_SIZE")) |
---|
| 781 | shm_size = strtol(getenv("RTEMS_SHM_SIZE"), 0, 0); |
---|
| 782 | else |
---|
| 783 | #ifdef RTEMS_SHM_SIZE |
---|
| 784 | shm_size = RTEMS_SHM_SIZE; |
---|
| 785 | #else |
---|
| 786 | shm_size = 64 * 1024; |
---|
| 787 | #endif |
---|
| 788 | |
---|
| 789 | if (getenv("RTEMS_SHM_SEMAPHORE_KEY")) |
---|
| 790 | sem_key = strtol(getenv("RTEMS_SHM_SEMAPHORE_KEY"), 0, 0); |
---|
| 791 | else |
---|
| 792 | #ifdef RTEMS_SHM_SEMAPHORE_KEY |
---|
| 793 | sem_key = RTEMS_SHM_SEMAPHORE_KEY; |
---|
| 794 | #else |
---|
| 795 | sem_key = 0xa001; |
---|
| 796 | #endif |
---|
| 797 | |
---|
| 798 | shmid = shmget(shm_key, shm_size, IPC_CREAT | 0660); |
---|
| 799 | if ( shmid == -1 ) { |
---|
| 800 | fix_syscall_errno(); /* in case of newlib */ |
---|
| 801 | perror( "shmget" ); |
---|
| 802 | _CPU_Fatal_halt( 0xdead0001 ); |
---|
| 803 | } |
---|
| 804 | |
---|
| 805 | shm_addr = shmat(shmid, (char *)0, SHM_RND); |
---|
| 806 | if ( shm_addr == (void *)-1 ) { |
---|
| 807 | fix_syscall_errno(); /* in case of newlib */ |
---|
| 808 | perror( "shmat" ); |
---|
| 809 | _CPU_Fatal_halt( 0xdead0002 ); |
---|
| 810 | } |
---|
| 811 | |
---|
| 812 | _CPU_SHM_Semid = semget(sem_key, maximum_nodes + 1, IPC_CREAT | 0660); |
---|
| 813 | if ( _CPU_SHM_Semid == -1 ) { |
---|
| 814 | fix_syscall_errno(); /* in case of newlib */ |
---|
| 815 | perror( "semget" ); |
---|
| 816 | _CPU_Fatal_halt( 0xdead0003 ); |
---|
| 817 | } |
---|
| 818 | |
---|
| 819 | if ( is_master_node ) { |
---|
| 820 | for ( i=0 ; i <= maximum_nodes ; i++ ) { |
---|
| 821 | #if defined(solaris2) |
---|
| 822 | union semun { |
---|
| 823 | int val; |
---|
| 824 | struct semid_ds *buf; |
---|
| 825 | ushort *array; |
---|
| 826 | } help; |
---|
| 827 | |
---|
| 828 | help.val = 1; |
---|
| 829 | status = semctl( _CPU_SHM_Semid, i, SETVAL, help ); |
---|
| 830 | #endif |
---|
| 831 | #if defined(hpux) |
---|
| 832 | status = semctl( _CPU_SHM_Semid, i, SETVAL, 1 ); |
---|
| 833 | #endif |
---|
| 834 | |
---|
| 835 | fix_syscall_errno(); /* in case of newlib */ |
---|
| 836 | if ( status == -1 ) { |
---|
| 837 | _CPU_Fatal_halt( 0xdead0004 ); |
---|
| 838 | } |
---|
| 839 | } |
---|
| 840 | } |
---|
| 841 | |
---|
| 842 | *shm_address = shm_addr; |
---|
| 843 | *shm_length = shm_size; |
---|
| 844 | |
---|
| 845 | } |
---|
| 846 | |
---|
| 847 | int _CPU_Get_pid( void ) |
---|
| 848 | { |
---|
| 849 | return getpid(); |
---|
| 850 | } |
---|
| 851 | |
---|
| 852 | /* |
---|
| 853 | * Define this to use signals for MPCI shared memory driver. |
---|
| 854 | * If undefined, the shared memory driver will poll from the |
---|
| 855 | * clock interrupt. |
---|
| 856 | * Ref: ../shmsupp/getcfg.c |
---|
| 857 | * |
---|
| 858 | * BEWARE:: many UN*X kernels and debuggers become severely confused when |
---|
| 859 | * debugging programs which use signals. The problem is *much* |
---|
| 860 | * worse when using multiple signals, since ptrace(2) tends to |
---|
| 861 | * drop all signals except 1 in the case of multiples. |
---|
| 862 | * On hpux9, this problem was so bad, we couldn't use interrupts |
---|
| 863 | * with the shared memory driver if we ever hoped to debug |
---|
| 864 | * RTEMS programs. |
---|
| 865 | * Maybe systems that use /proc don't have this problem... |
---|
| 866 | */ |
---|
| 867 | |
---|
| 868 | |
---|
| 869 | int _CPU_SHM_Get_vector( void ) |
---|
| 870 | { |
---|
| 871 | #ifdef CPU_USE_SHM_INTERRUPTS |
---|
| 872 | return SIGUSR1; |
---|
| 873 | #else |
---|
| 874 | return 0; |
---|
| 875 | #endif |
---|
| 876 | } |
---|
| 877 | |
---|
| 878 | void _CPU_SHM_Send_interrupt( |
---|
| 879 | int pid, |
---|
| 880 | int vector |
---|
| 881 | ) |
---|
| 882 | { |
---|
| 883 | kill((pid_t) pid, vector); |
---|
| 884 | } |
---|
| 885 | |
---|
| 886 | void _CPU_SHM_Lock( |
---|
| 887 | int semaphore |
---|
| 888 | ) |
---|
| 889 | { |
---|
| 890 | struct sembuf sb; |
---|
| 891 | int status; |
---|
| 892 | |
---|
| 893 | sb.sem_num = semaphore; |
---|
| 894 | sb.sem_op = -1; |
---|
| 895 | sb.sem_flg = 0; |
---|
| 896 | |
---|
| 897 | while (1) { |
---|
| 898 | status = semop(_CPU_SHM_Semid, &sb, 1); |
---|
| 899 | if ( status >= 0 ) |
---|
| 900 | break; |
---|
| 901 | if ( status == -1 ) { |
---|
| 902 | fix_syscall_errno(); /* in case of newlib */ |
---|
| 903 | if (errno == EINTR) |
---|
| 904 | continue; |
---|
| 905 | perror("shm lock"); |
---|
| 906 | _CPU_Fatal_halt( 0xdead0005 ); |
---|
| 907 | } |
---|
| 908 | } |
---|
| 909 | |
---|
| 910 | } |
---|
| 911 | |
---|
| 912 | void _CPU_SHM_Unlock( |
---|
| 913 | int semaphore |
---|
| 914 | ) |
---|
| 915 | { |
---|
| 916 | struct sembuf sb; |
---|
| 917 | int status; |
---|
| 918 | |
---|
| 919 | sb.sem_num = semaphore; |
---|
| 920 | sb.sem_op = 1; |
---|
| 921 | sb.sem_flg = 0; |
---|
| 922 | |
---|
| 923 | while (1) { |
---|
| 924 | status = semop(_CPU_SHM_Semid, &sb, 1); |
---|
| 925 | if ( status >= 0 ) |
---|
| 926 | break; |
---|
| 927 | |
---|
| 928 | if ( status == -1 ) { |
---|
| 929 | fix_syscall_errno(); /* in case of newlib */ |
---|
| 930 | if (errno == EINTR) |
---|
| 931 | continue; |
---|
| 932 | perror("shm unlock"); |
---|
| 933 | _CPU_Fatal_halt( 0xdead0006 ); |
---|
| 934 | } |
---|
| 935 | } |
---|
| 936 | |
---|
| 937 | } |
---|