[ac7d5ef0] | 1 | /* |
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[3652ad35] | 2 | * UNIX Simulator Dependent Source |
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[ac7d5ef0] | 3 | * |
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[e71ce071] | 4 | * COPYRIGHT (c) 1994,95 by Division Incorporated |
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[ac7d5ef0] | 5 | * |
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[98e4ebf5] | 6 | * The license and distribution terms for this file may be |
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| 7 | * found in the file LICENSE in this distribution or at |
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[e71ce071] | 8 | * http://www.OARcorp.com/rtems/license.html. |
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[ac7d5ef0] | 9 | * |
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| 10 | * $Id$ |
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| 11 | */ |
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| 12 | |
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| 13 | #include <rtems/system.h> |
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[5e9b32b] | 14 | #include <rtems/score/isr.h> |
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| 15 | #include <rtems/score/interr.h> |
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[ac7d5ef0] | 16 | |
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[f2545552] | 17 | #if defined(__linux__) |
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[37f4c2d] | 18 | #define MALLOC_0_RETURNS_NULL |
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| 19 | #endif |
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[d1193c7] | 20 | |
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[1c964ffa] | 21 | #include <sys/types.h> |
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| 22 | #include <sys/times.h> |
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[ac7d5ef0] | 23 | #include <stdio.h> |
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| 24 | #include <stdlib.h> |
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[37f4c2d] | 25 | #include <setjmp.h> |
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[ac7d5ef0] | 26 | #include <signal.h> |
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| 27 | #include <time.h> |
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[10aed1e3] | 28 | #include <sys/time.h> |
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[37f4c2d] | 29 | #include <errno.h> |
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| 30 | #include <unistd.h> |
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| 31 | #include <sys/ipc.h> |
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| 32 | #include <sys/shm.h> |
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| 33 | #include <sys/sem.h> |
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[cc4c1fe4] | 34 | #include <string.h> /* memset */ |
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[ac7d5ef0] | 35 | |
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[637df35] | 36 | #ifndef SA_RESTART |
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| 37 | #define SA_RESTART 0 |
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| 38 | #endif |
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[ac7d5ef0] | 39 | |
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[37f4c2d] | 40 | typedef struct { |
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| 41 | jmp_buf regs; |
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[d196e48] | 42 | unsigned32 isr_level; |
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[37f4c2d] | 43 | } Context_Control_overlay; |
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| 44 | |
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[637df35] | 45 | void _CPU_Signal_initialize(void); |
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| 46 | void _CPU_Stray_signal(int); |
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| 47 | void _CPU_ISR_Handler(int); |
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[ac7d5ef0] | 48 | |
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[d196e48] | 49 | static sigset_t _CPU_Signal_mask; |
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[d1193c7] | 50 | static Context_Control_overlay |
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[855edec] | 51 | _CPU_Context_Default_with_ISRs_enabled CPU_STRUCTURE_ALIGNMENT; |
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[d1193c7] | 52 | static Context_Control_overlay |
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[855edec] | 53 | _CPU_Context_Default_with_ISRs_disabled CPU_STRUCTURE_ALIGNMENT; |
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[ac7d5ef0] | 54 | |
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[0a6fb22] | 55 | /* |
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| 56 | * Sync IO support, an entry for each fd that can be set |
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| 57 | */ |
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| 58 | |
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| 59 | void _CPU_Sync_io_Init(); |
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| 60 | |
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| 61 | static rtems_sync_io_handler _CPU_Sync_io_handlers[FD_SETSIZE]; |
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| 62 | static int sync_io_nfds; |
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| 63 | static fd_set sync_io_readfds; |
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| 64 | static fd_set sync_io_writefds; |
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| 65 | static fd_set sync_io_exceptfds; |
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| 66 | |
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[ac7d5ef0] | 67 | /* |
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| 68 | * Which cpu are we? Used by libcpu and libbsp. |
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| 69 | */ |
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| 70 | |
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| 71 | int cpu_number; |
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| 72 | |
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[637df35] | 73 | /*PAGE |
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| 74 | * |
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| 75 | * _CPU_ISR_From_CPU_Init |
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| 76 | */ |
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| 77 | |
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[e7e016f] | 78 | sigset_t posix_empty_mask; |
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| 79 | |
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[637df35] | 80 | void _CPU_ISR_From_CPU_Init() |
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| 81 | { |
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| 82 | unsigned32 i; |
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| 83 | proc_ptr old_handler; |
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| 84 | |
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[e7e016f] | 85 | /* |
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| 86 | * Generate an empty mask to be used by disable_support |
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| 87 | */ |
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[637df35] | 88 | |
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[e7e016f] | 89 | sigemptyset(&posix_empty_mask); |
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[c64e4ed4] | 90 | |
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[637df35] | 91 | /* |
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| 92 | * Block all the signals except SIGTRAP for the debugger |
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[d196e48] | 93 | * and fatal error signals. |
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[637df35] | 94 | */ |
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| 95 | |
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| 96 | (void) sigfillset(&_CPU_Signal_mask); |
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| 97 | (void) sigdelset(&_CPU_Signal_mask, SIGTRAP); |
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| 98 | (void) sigdelset(&_CPU_Signal_mask, SIGABRT); |
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| 99 | (void) sigdelset(&_CPU_Signal_mask, SIGIOT); |
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| 100 | (void) sigdelset(&_CPU_Signal_mask, SIGCONT); |
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[d196e48] | 101 | (void) sigdelset(&_CPU_Signal_mask, SIGSEGV); |
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| 102 | (void) sigdelset(&_CPU_Signal_mask, SIGBUS); |
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| 103 | (void) sigdelset(&_CPU_Signal_mask, SIGFPE); |
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[637df35] | 104 | |
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[e7e016f] | 105 | _CPU_ISR_Enable(1); |
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[637df35] | 106 | |
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| 107 | /* |
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| 108 | * Set the handler for all signals to be signal_handler |
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| 109 | * which will then vector out to the correct handler |
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| 110 | * for whichever signal actually happened. Initially |
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| 111 | * set the vectors to the stray signal handler. |
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| 112 | */ |
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| 113 | |
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| 114 | for (i = 0; i < CPU_INTERRUPT_NUMBER_OF_VECTORS; i++) |
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| 115 | (void)_CPU_ISR_install_vector(i, _CPU_Stray_signal, &old_handler); |
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| 116 | |
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| 117 | _CPU_Signal_initialize(); |
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| 118 | } |
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| 119 | |
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| 120 | void _CPU_Signal_initialize( void ) |
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| 121 | { |
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| 122 | struct sigaction act; |
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| 123 | sigset_t mask; |
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[d1193c7] | 124 | |
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[637df35] | 125 | /* mark them all active except for TraceTrap and Abort */ |
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[d1193c7] | 126 | |
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[d196e48] | 127 | mask = _CPU_Signal_mask; |
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[637df35] | 128 | sigprocmask(SIG_UNBLOCK, &mask, 0); |
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[d1193c7] | 129 | |
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[637df35] | 130 | act.sa_handler = _CPU_ISR_Handler; |
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| 131 | act.sa_mask = mask; |
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| 132 | act.sa_flags = SA_RESTART; |
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[d1193c7] | 133 | |
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[637df35] | 134 | sigaction(SIGHUP, &act, 0); |
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| 135 | sigaction(SIGINT, &act, 0); |
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| 136 | sigaction(SIGQUIT, &act, 0); |
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| 137 | sigaction(SIGILL, &act, 0); |
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[10aed1e3] | 138 | #ifdef SIGEMT |
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[637df35] | 139 | sigaction(SIGEMT, &act, 0); |
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[10aed1e3] | 140 | #endif |
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[637df35] | 141 | sigaction(SIGFPE, &act, 0); |
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| 142 | sigaction(SIGKILL, &act, 0); |
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| 143 | sigaction(SIGBUS, &act, 0); |
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| 144 | sigaction(SIGSEGV, &act, 0); |
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[10aed1e3] | 145 | #ifdef SIGSYS |
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[637df35] | 146 | sigaction(SIGSYS, &act, 0); |
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[10aed1e3] | 147 | #endif |
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[637df35] | 148 | sigaction(SIGPIPE, &act, 0); |
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| 149 | sigaction(SIGALRM, &act, 0); |
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| 150 | sigaction(SIGTERM, &act, 0); |
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| 151 | sigaction(SIGUSR1, &act, 0); |
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| 152 | sigaction(SIGUSR2, &act, 0); |
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| 153 | sigaction(SIGCHLD, &act, 0); |
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| 154 | sigaction(SIGCLD, &act, 0); |
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| 155 | sigaction(SIGPWR, &act, 0); |
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| 156 | sigaction(SIGVTALRM, &act, 0); |
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| 157 | sigaction(SIGPROF, &act, 0); |
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| 158 | sigaction(SIGIO, &act, 0); |
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| 159 | sigaction(SIGWINCH, &act, 0); |
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| 160 | sigaction(SIGSTOP, &act, 0); |
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| 161 | sigaction(SIGTTIN, &act, 0); |
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| 162 | sigaction(SIGTTOU, &act, 0); |
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| 163 | sigaction(SIGURG, &act, 0); |
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[e7e016f] | 164 | #ifdef SIGLOST |
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[637df35] | 165 | sigaction(SIGLOST, &act, 0); |
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| 166 | #endif |
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| 167 | } |
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| 168 | |
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| 169 | /*PAGE |
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| 170 | * |
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| 171 | * _CPU_Context_From_CPU_Init |
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| 172 | */ |
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| 173 | |
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| 174 | void _CPU_Context_From_CPU_Init() |
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| 175 | { |
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| 176 | |
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[3ec7bfc] | 177 | #if defined(__hppa__) && defined(RTEMS_UNIXLIB_SETJMP) |
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[637df35] | 178 | /* |
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| 179 | * HACK - set the _SYSTEM_ID to 0x20c so that setjmp/longjmp |
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| 180 | * will handle the full 32 floating point registers. |
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| 181 | */ |
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| 182 | |
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| 183 | { |
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| 184 | extern unsigned32 _SYSTEM_ID; |
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| 185 | |
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| 186 | _SYSTEM_ID = 0x20c; |
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| 187 | } |
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| 188 | #endif |
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| 189 | |
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| 190 | /* |
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| 191 | * get default values to use in _CPU_Context_Initialize() |
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| 192 | */ |
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| 193 | |
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[d1193c7] | 194 | |
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[cc4c1fe4] | 195 | (void) memset( |
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| 196 | &_CPU_Context_Default_with_ISRs_enabled, |
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| 197 | 0, |
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| 198 | sizeof(Context_Control) |
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| 199 | ); |
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| 200 | (void) memset( |
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| 201 | &_CPU_Context_Default_with_ISRs_disabled, |
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| 202 | 0, |
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| 203 | sizeof(Context_Control) |
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| 204 | ); |
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| 205 | |
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[637df35] | 206 | _CPU_ISR_Set_level( 0 ); |
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[3652ad35] | 207 | _CPU_Context_switch( |
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[d196e48] | 208 | (Context_Control *) &_CPU_Context_Default_with_ISRs_enabled, |
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| 209 | (Context_Control *) &_CPU_Context_Default_with_ISRs_enabled |
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[637df35] | 210 | ); |
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[d1193c7] | 211 | |
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[637df35] | 212 | _CPU_ISR_Set_level( 1 ); |
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[3652ad35] | 213 | _CPU_Context_switch( |
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[d196e48] | 214 | (Context_Control *) &_CPU_Context_Default_with_ISRs_disabled, |
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| 215 | (Context_Control *) &_CPU_Context_Default_with_ISRs_disabled |
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[637df35] | 216 | ); |
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| 217 | } |
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| 218 | |
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[0a6fb22] | 219 | /*PAGE |
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| 220 | * |
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| 221 | * _CPU_Sync_io_Init |
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| 222 | */ |
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| 223 | |
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| 224 | void _CPU_Sync_io_Init() |
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| 225 | { |
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| 226 | int fd; |
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| 227 | |
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| 228 | for (fd = 0; fd < FD_SETSIZE; fd++) |
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| 229 | _CPU_Sync_io_handlers[fd] = NULL; |
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| 230 | |
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| 231 | sync_io_nfds = 0; |
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| 232 | FD_ZERO(&sync_io_readfds); |
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| 233 | FD_ZERO(&sync_io_writefds); |
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| 234 | FD_ZERO(&sync_io_exceptfds); |
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| 235 | } |
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| 236 | |
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[3a4ae6c] | 237 | /*PAGE |
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| 238 | * |
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| 239 | * _CPU_ISR_Get_level |
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| 240 | */ |
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| 241 | |
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| 242 | unsigned32 _CPU_ISR_Get_level( void ) |
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| 243 | { |
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[d196e48] | 244 | sigset_t old_mask; |
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[d1193c7] | 245 | |
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[d196e48] | 246 | sigprocmask(SIG_BLOCK, 0, &old_mask); |
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[d1193c7] | 247 | |
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[d196e48] | 248 | if (memcmp((void *)&posix_empty_mask, (void *)&old_mask, sizeof(sigset_t))) |
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| 249 | return 1; |
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[d1193c7] | 250 | |
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[d196e48] | 251 | return 0; |
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[3a4ae6c] | 252 | } |
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| 253 | |
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[ac7d5ef0] | 254 | /* _CPU_Initialize |
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| 255 | * |
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| 256 | * This routine performs processor dependent initialization. |
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| 257 | * |
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| 258 | * INPUT PARAMETERS: |
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| 259 | * cpu_table - CPU table to initialize |
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| 260 | * thread_dispatch - address of disptaching routine |
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| 261 | */ |
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| 262 | |
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| 263 | |
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| 264 | void _CPU_Initialize( |
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| 265 | rtems_cpu_table *cpu_table, |
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[3a4ae6c] | 266 | void (*thread_dispatch) /* ignored on this CPU */ |
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[ac7d5ef0] | 267 | ) |
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| 268 | { |
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| 269 | /* |
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| 270 | * The thread_dispatch argument is the address of the entry point |
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| 271 | * for the routine called at the end of an ISR once it has been |
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| 272 | * decided a context switch is necessary. On some compilation |
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| 273 | * systems it is difficult to call a high-level language routine |
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| 274 | * from assembly. This allows us to trick these systems. |
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| 275 | * |
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| 276 | * If you encounter this problem save the entry point in a CPU |
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| 277 | * dependent variable. |
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| 278 | */ |
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| 279 | |
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| 280 | _CPU_Thread_dispatch_pointer = thread_dispatch; |
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| 281 | |
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| 282 | /* |
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| 283 | * XXX; If there is not an easy way to initialize the FP context |
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| 284 | * during Context_Initialize, then it is usually easier to |
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| 285 | * save an "uninitialized" FP context here and copy it to |
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| 286 | * the task's during Context_Initialize. |
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| 287 | */ |
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| 288 | |
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| 289 | /* XXX: FP context initialization support */ |
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| 290 | |
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| 291 | _CPU_Table = *cpu_table; |
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| 292 | |
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[637df35] | 293 | _CPU_ISR_From_CPU_Init(); |
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[ac7d5ef0] | 294 | |
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[0a6fb22] | 295 | _CPU_Sync_io_Init(); |
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| 296 | |
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[637df35] | 297 | _CPU_Context_From_CPU_Init(); |
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[ac7d5ef0] | 298 | |
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[637df35] | 299 | } |
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[ac7d5ef0] | 300 | |
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[637df35] | 301 | /*PAGE |
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| 302 | * |
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| 303 | * _CPU_ISR_install_raw_handler |
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| 304 | */ |
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[ac7d5ef0] | 305 | |
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[637df35] | 306 | void _CPU_ISR_install_raw_handler( |
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| 307 | unsigned32 vector, |
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| 308 | proc_ptr new_handler, |
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| 309 | proc_ptr *old_handler |
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| 310 | ) |
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| 311 | { |
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| 312 | _CPU_Fatal_halt( 0xdeaddead ); |
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[ac7d5ef0] | 313 | } |
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| 314 | |
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[637df35] | 315 | /*PAGE |
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| 316 | * |
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| 317 | * _CPU_ISR_install_vector |
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[ac7d5ef0] | 318 | * |
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| 319 | * This kernel routine installs the RTEMS handler for the |
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| 320 | * specified vector. |
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| 321 | * |
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| 322 | * Input parameters: |
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| 323 | * vector - interrupt vector number |
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| 324 | * old_handler - former ISR for this vector number |
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| 325 | * new_handler - replacement ISR for this vector number |
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| 326 | * |
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| 327 | * Output parameters: NONE |
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| 328 | * |
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| 329 | */ |
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| 330 | |
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| 331 | |
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| 332 | void _CPU_ISR_install_vector( |
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| 333 | unsigned32 vector, |
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| 334 | proc_ptr new_handler, |
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| 335 | proc_ptr *old_handler |
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| 336 | ) |
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| 337 | { |
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| 338 | *old_handler = _ISR_Vector_table[ vector ]; |
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| 339 | |
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| 340 | /* |
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| 341 | * If the interrupt vector table is a table of pointer to isr entry |
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| 342 | * points, then we need to install the appropriate RTEMS interrupt |
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| 343 | * handler for this vector number. |
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| 344 | */ |
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| 345 | |
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| 346 | /* |
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| 347 | * We put the actual user ISR address in '_ISR_vector_table'. This will |
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[637df35] | 348 | * be used by the _CPU_ISR_Handler so the user gets control. |
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[ac7d5ef0] | 349 | */ |
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| 350 | |
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| 351 | _ISR_Vector_table[ vector ] = new_handler; |
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| 352 | } |
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| 353 | |
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| 354 | /*PAGE |
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| 355 | * |
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| 356 | * _CPU_Install_interrupt_stack |
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| 357 | */ |
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| 358 | |
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| 359 | void _CPU_Install_interrupt_stack( void ) |
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| 360 | { |
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| 361 | } |
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| 362 | |
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| 363 | /*PAGE |
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| 364 | * |
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[75f09e5] | 365 | * _CPU_Thread_Idle_body |
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[ac7d5ef0] | 366 | * |
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[d1193c7] | 367 | * Stop until we get a signal which is the logically the same thing |
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[9700578] | 368 | * entering low-power or sleep mode on a real processor and waiting for |
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| 369 | * an interrupt. This significantly reduces the consumption of host |
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| 370 | * CPU cycles which is again similar to low power mode. |
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[ac7d5ef0] | 371 | */ |
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| 372 | |
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[75f09e5] | 373 | void _CPU_Thread_Idle_body( void ) |
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[ac7d5ef0] | 374 | { |
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[0a6fb22] | 375 | #if CPU_SYNC_IO |
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| 376 | extern void _Thread_Dispatch(void); |
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| 377 | int fd; |
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| 378 | #endif |
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| 379 | |
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[d196e48] | 380 | while (1) { |
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| 381 | #ifdef RTEMS_DEBUG |
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| 382 | /* interrupts had better be enabled at this point! */ |
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| 383 | if (_CPU_ISR_Get_level() != 0) |
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| 384 | abort(); |
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| 385 | #endif |
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[0a6fb22] | 386 | |
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| 387 | /* |
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| 388 | * Block on a select statement, the CPU interface added allow the |
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| 389 | * user to add new descriptors which are to be blocked on |
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| 390 | */ |
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| 391 | |
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| 392 | #if CPU_SYNC_IO |
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| 393 | if (sync_io_nfds) { |
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| 394 | int result; |
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| 395 | |
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| 396 | result = select(sync_io_nfds, |
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| 397 | &sync_io_readfds, |
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| 398 | &sync_io_writefds, |
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| 399 | &sync_io_exceptfds, |
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| 400 | NULL); |
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| 401 | |
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| 402 | if ((result < 0) && (errno != EINTR)) |
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| 403 | _CPU_Fatal_error(0x200); /* FIXME : what number should go here !! */ |
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| 404 | |
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| 405 | for (fd = 0; fd < sync_io_nfds; fd++) { |
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| 406 | boolean read = FD_ISSET(fd, &sync_io_readfds); |
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| 407 | boolean write = FD_ISSET(fd, &sync_io_writefds); |
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| 408 | boolean except = FD_ISSET(fd, &sync_io_exceptfds); |
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| 409 | |
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| 410 | if (_CPU_Sync_io_handlers[fd] && (read || write || except)) |
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| 411 | _CPU_Sync_io_handlers[fd](fd, read, write, except); |
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| 412 | |
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| 413 | _Thread_Dispatch(); |
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| 414 | } |
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| 415 | } else |
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| 416 | pause(); |
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| 417 | #else |
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[637df35] | 418 | pause(); |
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[0a6fb22] | 419 | #endif |
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| 420 | |
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[d196e48] | 421 | } |
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| 422 | |
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[ac7d5ef0] | 423 | } |
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| 424 | |
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[637df35] | 425 | /*PAGE |
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[d1193c7] | 426 | * |
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[637df35] | 427 | * _CPU_Context_Initialize |
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| 428 | */ |
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| 429 | |
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[ac7d5ef0] | 430 | void _CPU_Context_Initialize( |
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| 431 | Context_Control *_the_context, |
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| 432 | unsigned32 *_stack_base, |
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| 433 | unsigned32 _size, |
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| 434 | unsigned32 _new_level, |
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[9700578] | 435 | void *_entry_point, |
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| 436 | boolean _is_fp |
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[ac7d5ef0] | 437 | ) |
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| 438 | { |
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[637df35] | 439 | unsigned32 *addr; |
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| 440 | unsigned32 jmp_addr; |
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| 441 | unsigned32 _stack_low; /* lowest "stack aligned" address */ |
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| 442 | unsigned32 _stack_high; /* highest "stack aligned" address */ |
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| 443 | unsigned32 _the_size; |
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[ac7d5ef0] | 444 | |
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[637df35] | 445 | jmp_addr = (unsigned32) _entry_point; |
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[ac7d5ef0] | 446 | |
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[637df35] | 447 | /* |
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| 448 | * On CPUs with stacks which grow down, we build the stack |
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[d1193c7] | 449 | * based on the _stack_high address. On CPUs with stacks which |
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| 450 | * grow up, we build the stack based on the _stack_low address. |
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[637df35] | 451 | */ |
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[88d594a] | 452 | |
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[cc4c1fe4] | 453 | _stack_low = (unsigned32)(_stack_base) + CPU_STACK_ALIGNMENT - 1; |
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[637df35] | 454 | _stack_low &= ~(CPU_STACK_ALIGNMENT - 1); |
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[88d594a] | 455 | |
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[cc4c1fe4] | 456 | _stack_high = (unsigned32)(_stack_base) + _size; |
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[637df35] | 457 | _stack_high &= ~(CPU_STACK_ALIGNMENT - 1); |
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[ac7d5ef0] | 458 | |
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[cc4c1fe4] | 459 | if (_stack_high > _stack_low) |
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| 460 | _the_size = _stack_high - _stack_low; |
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| 461 | else |
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| 462 | _the_size = _stack_low - _stack_high; |
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[ac7d5ef0] | 463 | |
---|
[637df35] | 464 | /* |
---|
| 465 | * Slam our jmp_buf template into the context we are creating |
---|
| 466 | */ |
---|
[ac7d5ef0] | 467 | |
---|
[637df35] | 468 | if ( _new_level == 0 ) |
---|
[d196e48] | 469 | *_the_context = *(Context_Control *) |
---|
| 470 | &_CPU_Context_Default_with_ISRs_enabled; |
---|
[637df35] | 471 | else |
---|
[d196e48] | 472 | *_the_context = *(Context_Control *) |
---|
| 473 | &_CPU_Context_Default_with_ISRs_disabled; |
---|
[d1193c7] | 474 | |
---|
[637df35] | 475 | addr = (unsigned32 *)_the_context; |
---|
[ac7d5ef0] | 476 | |
---|
[3ec7bfc] | 477 | #if defined(__hppa__) |
---|
[637df35] | 478 | *(addr + RP_OFF) = jmp_addr; |
---|
| 479 | *(addr + SP_OFF) = (unsigned32)(_stack_low + CPU_FRAME_SIZE); |
---|
[ac7d5ef0] | 480 | |
---|
[637df35] | 481 | /* |
---|
| 482 | * See if we are using shared libraries by checking |
---|
| 483 | * bit 30 in 24 off of newp. If bit 30 is set then |
---|
| 484 | * we are using shared libraries and the jump address |
---|
[cc4c1fe4] | 485 | * points to the pointer, so we put that into rp instead. |
---|
[637df35] | 486 | */ |
---|
[ac7d5ef0] | 487 | |
---|
[637df35] | 488 | if (jmp_addr & 0x40000000) { |
---|
| 489 | jmp_addr &= 0xfffffffc; |
---|
[cc4c1fe4] | 490 | *(addr + RP_OFF) = *(unsigned32 *)jmp_addr; |
---|
[637df35] | 491 | } |
---|
[3ec7bfc] | 492 | #elif defined(__sparc__) |
---|
[ac7d5ef0] | 493 | |
---|
[637df35] | 494 | /* |
---|
| 495 | * See /usr/include/sys/stack.h in Solaris 2.3 for a nice |
---|
| 496 | * diagram of the stack. |
---|
| 497 | */ |
---|
[ac7d5ef0] | 498 | |
---|
[637df35] | 499 | asm ("ta 0x03"); /* flush registers */ |
---|
[ac7d5ef0] | 500 | |
---|
[637df35] | 501 | *(addr + RP_OFF) = jmp_addr + ADDR_ADJ_OFFSET; |
---|
| 502 | *(addr + SP_OFF) = (unsigned32)(_stack_high - CPU_FRAME_SIZE); |
---|
| 503 | *(addr + FP_OFF) = (unsigned32)(_stack_high); |
---|
[8044533] | 504 | |
---|
[3ec7bfc] | 505 | #elif defined(__i386__) |
---|
[d1193c7] | 506 | |
---|
[8044533] | 507 | /* |
---|
| 508 | * This information was gathered by disassembling setjmp(). |
---|
| 509 | */ |
---|
[10aed1e3] | 510 | |
---|
| 511 | { |
---|
| 512 | unsigned32 stack_ptr; |
---|
| 513 | |
---|
| 514 | stack_ptr = _stack_high - CPU_FRAME_SIZE; |
---|
| 515 | |
---|
| 516 | *(addr + EBX_OFF) = 0xFEEDFEED; |
---|
| 517 | *(addr + ESI_OFF) = 0xDEADDEAD; |
---|
| 518 | *(addr + EDI_OFF) = 0xDEAFDEAF; |
---|
| 519 | *(addr + EBP_OFF) = stack_ptr; |
---|
| 520 | *(addr + ESP_OFF) = stack_ptr; |
---|
| 521 | *(addr + RET_OFF) = jmp_addr; |
---|
[d1193c7] | 522 | |
---|
[10aed1e3] | 523 | addr = (unsigned32 *) stack_ptr; |
---|
[d1193c7] | 524 | |
---|
[10aed1e3] | 525 | addr[ 0 ] = jmp_addr; |
---|
| 526 | addr[ 1 ] = (unsigned32) stack_ptr; |
---|
| 527 | addr[ 2 ] = (unsigned32) stack_ptr; |
---|
| 528 | } |
---|
[8044533] | 529 | |
---|
[ac7d5ef0] | 530 | #else |
---|
| 531 | #error "UNKNOWN CPU!!!" |
---|
| 532 | #endif |
---|
| 533 | |
---|
| 534 | } |
---|
| 535 | |
---|
[637df35] | 536 | /*PAGE |
---|
| 537 | * |
---|
| 538 | * _CPU_Context_restore |
---|
| 539 | */ |
---|
| 540 | |
---|
[ac7d5ef0] | 541 | void _CPU_Context_restore( |
---|
| 542 | Context_Control *next |
---|
| 543 | ) |
---|
| 544 | { |
---|
[37f4c2d] | 545 | Context_Control_overlay *nextp = (Context_Control_overlay *)next; |
---|
| 546 | |
---|
[d196e48] | 547 | _CPU_ISR_Enable(nextp->isr_level); |
---|
[37f4c2d] | 548 | longjmp( nextp->regs, 0 ); |
---|
[ac7d5ef0] | 549 | } |
---|
| 550 | |
---|
[637df35] | 551 | /*PAGE |
---|
| 552 | * |
---|
| 553 | * _CPU_Context_switch |
---|
| 554 | */ |
---|
| 555 | |
---|
[d196e48] | 556 | static void do_jump( |
---|
| 557 | Context_Control_overlay *currentp, |
---|
| 558 | Context_Control_overlay *nextp |
---|
| 559 | ); |
---|
| 560 | |
---|
[ac7d5ef0] | 561 | void _CPU_Context_switch( |
---|
| 562 | Context_Control *current, |
---|
| 563 | Context_Control *next |
---|
| 564 | ) |
---|
| 565 | { |
---|
[37f4c2d] | 566 | Context_Control_overlay *currentp = (Context_Control_overlay *)current; |
---|
| 567 | Context_Control_overlay *nextp = (Context_Control_overlay *)next; |
---|
[d196e48] | 568 | #if 0 |
---|
[3652ad35] | 569 | int status; |
---|
[d196e48] | 570 | #endif |
---|
[d1193c7] | 571 | |
---|
[d196e48] | 572 | currentp->isr_level = _CPU_ISR_Disable_support(); |
---|
[d1193c7] | 573 | |
---|
[d196e48] | 574 | do_jump( currentp, nextp ); |
---|
[3652ad35] | 575 | |
---|
[d196e48] | 576 | #if 0 |
---|
| 577 | if (sigsetjmp(currentp->regs, 1) == 0) { /* Save the current context */ |
---|
| 578 | siglongjmp(nextp->regs, 0); /* Switch to the new context */ |
---|
| 579 | _Internal_error_Occurred( |
---|
| 580 | INTERNAL_ERROR_CORE, |
---|
| 581 | TRUE, |
---|
| 582 | status |
---|
| 583 | ); |
---|
| 584 | } |
---|
| 585 | #endif |
---|
[d1193c7] | 586 | |
---|
[d196e48] | 587 | #ifdef RTEMS_DEBUG |
---|
| 588 | if (_CPU_ISR_Get_level() == 0) |
---|
| 589 | abort(); |
---|
| 590 | #endif |
---|
[d1193c7] | 591 | |
---|
[d196e48] | 592 | _CPU_ISR_Enable(currentp->isr_level); |
---|
| 593 | } |
---|
[d1193c7] | 594 | |
---|
| 595 | static void do_jump( |
---|
[d196e48] | 596 | Context_Control_overlay *currentp, |
---|
[d1193c7] | 597 | Context_Control_overlay *nextp |
---|
[d196e48] | 598 | ) |
---|
| 599 | { |
---|
| 600 | int status; |
---|
[ac7d5ef0] | 601 | |
---|
[37f4c2d] | 602 | if (setjmp(currentp->regs) == 0) { /* Save the current context */ |
---|
| 603 | longjmp(nextp->regs, 0); /* Switch to the new context */ |
---|
[d196e48] | 604 | _Internal_error_Occurred( |
---|
[3652ad35] | 605 | INTERNAL_ERROR_CORE, |
---|
| 606 | TRUE, |
---|
| 607 | status |
---|
| 608 | ); |
---|
[637df35] | 609 | } |
---|
[ac7d5ef0] | 610 | } |
---|
[d196e48] | 611 | |
---|
[637df35] | 612 | /*PAGE |
---|
| 613 | * |
---|
| 614 | * _CPU_Save_float_context |
---|
| 615 | */ |
---|
[ac7d5ef0] | 616 | |
---|
| 617 | void _CPU_Save_float_context( |
---|
| 618 | Context_Control_fp *fp_context |
---|
| 619 | ) |
---|
| 620 | { |
---|
| 621 | } |
---|
| 622 | |
---|
[637df35] | 623 | /*PAGE |
---|
| 624 | * |
---|
| 625 | * _CPU_Restore_float_context |
---|
| 626 | */ |
---|
| 627 | |
---|
[ac7d5ef0] | 628 | void _CPU_Restore_float_context( |
---|
| 629 | Context_Control_fp *fp_context |
---|
| 630 | ) |
---|
| 631 | { |
---|
| 632 | } |
---|
| 633 | |
---|
[637df35] | 634 | /*PAGE |
---|
| 635 | * |
---|
| 636 | * _CPU_ISR_Disable_support |
---|
| 637 | */ |
---|
[ac7d5ef0] | 638 | |
---|
[637df35] | 639 | unsigned32 _CPU_ISR_Disable_support(void) |
---|
[ac7d5ef0] | 640 | { |
---|
[3652ad35] | 641 | int status; |
---|
[637df35] | 642 | sigset_t old_mask; |
---|
[ac7d5ef0] | 643 | |
---|
[3652ad35] | 644 | status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, &old_mask); |
---|
| 645 | if ( status ) |
---|
| 646 | _Internal_error_Occurred( |
---|
| 647 | INTERNAL_ERROR_CORE, |
---|
| 648 | TRUE, |
---|
| 649 | status |
---|
| 650 | ); |
---|
[ac7d5ef0] | 651 | |
---|
[3652ad35] | 652 | if (memcmp((void *)&posix_empty_mask, (void *)&old_mask, sizeof(sigset_t))) |
---|
[637df35] | 653 | return 1; |
---|
[ac7d5ef0] | 654 | |
---|
[637df35] | 655 | return 0; |
---|
[ac7d5ef0] | 656 | } |
---|
| 657 | |
---|
[637df35] | 658 | /*PAGE |
---|
| 659 | * |
---|
| 660 | * _CPU_ISR_Enable |
---|
| 661 | */ |
---|
[ac7d5ef0] | 662 | |
---|
[637df35] | 663 | void _CPU_ISR_Enable( |
---|
| 664 | unsigned32 level |
---|
| 665 | ) |
---|
[ac7d5ef0] | 666 | { |
---|
[3652ad35] | 667 | int status; |
---|
| 668 | |
---|
[637df35] | 669 | if (level == 0) |
---|
[3652ad35] | 670 | status = sigprocmask(SIG_UNBLOCK, &_CPU_Signal_mask, 0); |
---|
[637df35] | 671 | else |
---|
[3652ad35] | 672 | status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, 0); |
---|
| 673 | |
---|
| 674 | if ( status ) |
---|
| 675 | _Internal_error_Occurred( |
---|
| 676 | INTERNAL_ERROR_CORE, |
---|
| 677 | TRUE, |
---|
| 678 | status |
---|
| 679 | ); |
---|
[ac7d5ef0] | 680 | } |
---|
| 681 | |
---|
[637df35] | 682 | /*PAGE |
---|
[ac7d5ef0] | 683 | * |
---|
[637df35] | 684 | * _CPU_ISR_Handler |
---|
| 685 | * |
---|
| 686 | * External interrupt handler. |
---|
| 687 | * This is installed as a UNIX signal handler. |
---|
| 688 | * It vectors out to specific user interrupt handlers. |
---|
[ac7d5ef0] | 689 | */ |
---|
| 690 | |
---|
[637df35] | 691 | void _CPU_ISR_Handler(int vector) |
---|
[ac7d5ef0] | 692 | { |
---|
[637df35] | 693 | extern void _Thread_Dispatch(void); |
---|
| 694 | extern unsigned32 _Thread_Dispatch_disable_level; |
---|
| 695 | extern boolean _Context_Switch_necessary; |
---|
[ac7d5ef0] | 696 | |
---|
[637df35] | 697 | if (_ISR_Nest_level++ == 0) { |
---|
| 698 | /* switch to interrupt stack */ |
---|
| 699 | } |
---|
[ac7d5ef0] | 700 | |
---|
[637df35] | 701 | _Thread_Dispatch_disable_level++; |
---|
[ac7d5ef0] | 702 | |
---|
[637df35] | 703 | if (_ISR_Vector_table[vector]) { |
---|
| 704 | _ISR_Vector_table[vector](vector); |
---|
| 705 | } else { |
---|
| 706 | _CPU_Stray_signal(vector); |
---|
| 707 | } |
---|
[ac7d5ef0] | 708 | |
---|
[637df35] | 709 | if (_ISR_Nest_level-- == 0) { |
---|
| 710 | /* switch back to original stack */ |
---|
| 711 | } |
---|
[ac7d5ef0] | 712 | |
---|
[637df35] | 713 | _Thread_Dispatch_disable_level--; |
---|
[ac7d5ef0] | 714 | |
---|
[637df35] | 715 | if (_Thread_Dispatch_disable_level == 0 && |
---|
| 716 | (_Context_Switch_necessary || _ISR_Signals_to_thread_executing)) { |
---|
[8a38f3b] | 717 | _ISR_Signals_to_thread_executing = FALSE; |
---|
[637df35] | 718 | _CPU_ISR_Enable(0); |
---|
| 719 | _Thread_Dispatch(); |
---|
| 720 | } |
---|
[ac7d5ef0] | 721 | } |
---|
| 722 | |
---|
[637df35] | 723 | /*PAGE |
---|
| 724 | * |
---|
| 725 | * _CPU_Stray_signal |
---|
| 726 | */ |
---|
[ac7d5ef0] | 727 | |
---|
[637df35] | 728 | void _CPU_Stray_signal(int sig_num) |
---|
[ac7d5ef0] | 729 | { |
---|
[c64e4ed4] | 730 | char buffer[ 4 ]; |
---|
[d1193c7] | 731 | |
---|
[c64e4ed4] | 732 | /* |
---|
| 733 | * print "stray" msg about ones which that might mean something |
---|
| 734 | * Avoid using the stdio section of the library. |
---|
| 735 | * The following is generally safe. |
---|
[637df35] | 736 | */ |
---|
[d1193c7] | 737 | |
---|
[c64e4ed4] | 738 | switch (sig_num) |
---|
| 739 | { |
---|
| 740 | case SIGCLD: |
---|
| 741 | break; |
---|
[d1193c7] | 742 | |
---|
[c64e4ed4] | 743 | default: |
---|
| 744 | { |
---|
[cc4c1fe4] | 745 | /* |
---|
| 746 | * We avoid using the stdio section of the library. |
---|
| 747 | * The following is generally safe |
---|
| 748 | */ |
---|
[d1193c7] | 749 | |
---|
[cc4c1fe4] | 750 | int digit; |
---|
| 751 | int number = sig_num; |
---|
| 752 | int len = 0; |
---|
| 753 | |
---|
| 754 | digit = number / 100; |
---|
| 755 | number %= 100; |
---|
| 756 | if (digit) buffer[len++] = '0' + digit; |
---|
| 757 | |
---|
| 758 | digit = number / 10; |
---|
| 759 | number %= 10; |
---|
| 760 | if (digit || len) buffer[len++] = '0' + digit; |
---|
| 761 | |
---|
| 762 | digit = number; |
---|
| 763 | buffer[len++] = '0' + digit; |
---|
[d1193c7] | 764 | |
---|
[cc4c1fe4] | 765 | buffer[ len++ ] = '\n'; |
---|
[d1193c7] | 766 | |
---|
[cc4c1fe4] | 767 | write( 2, "Stray signal ", 13 ); |
---|
| 768 | write( 2, buffer, len ); |
---|
| 769 | |
---|
[c64e4ed4] | 770 | } |
---|
| 771 | } |
---|
[d1193c7] | 772 | |
---|
[637df35] | 773 | /* |
---|
| 774 | * If it was a "fatal" signal, then exit here |
---|
| 775 | * If app code has installed a hander for one of these, then |
---|
| 776 | * we won't call _CPU_Stray_signal, so this is ok. |
---|
| 777 | */ |
---|
[d1193c7] | 778 | |
---|
[637df35] | 779 | switch (sig_num) { |
---|
| 780 | case SIGINT: |
---|
| 781 | case SIGHUP: |
---|
| 782 | case SIGQUIT: |
---|
| 783 | case SIGILL: |
---|
[10aed1e3] | 784 | #ifdef SIGEMT |
---|
[637df35] | 785 | case SIGEMT: |
---|
[10aed1e3] | 786 | #endif |
---|
[637df35] | 787 | case SIGKILL: |
---|
| 788 | case SIGBUS: |
---|
| 789 | case SIGSEGV: |
---|
| 790 | case SIGTERM: |
---|
[d196e48] | 791 | case SIGIOT: |
---|
[cc4c1fe4] | 792 | _CPU_Fatal_error(0x100 + sig_num); |
---|
[637df35] | 793 | } |
---|
[ac7d5ef0] | 794 | } |
---|
| 795 | |
---|
[637df35] | 796 | /*PAGE |
---|
| 797 | * |
---|
| 798 | * _CPU_Fatal_error |
---|
| 799 | */ |
---|
[ac7d5ef0] | 800 | |
---|
[637df35] | 801 | void _CPU_Fatal_error(unsigned32 error) |
---|
[ac7d5ef0] | 802 | { |
---|
[637df35] | 803 | setitimer(ITIMER_REAL, 0, 0); |
---|
[ac7d5ef0] | 804 | |
---|
[e7e016f] | 805 | if ( error ) { |
---|
| 806 | #ifdef RTEMS_DEBUG |
---|
| 807 | abort(); |
---|
| 808 | #endif |
---|
| 809 | if (getenv("RTEMS_DEBUG")) |
---|
| 810 | abort(); |
---|
| 811 | } |
---|
| 812 | |
---|
[637df35] | 813 | _exit(error); |
---|
[ac7d5ef0] | 814 | } |
---|
| 815 | |
---|
[37f4c2d] | 816 | /* |
---|
| 817 | * Special Purpose Routines to hide the use of UNIX system calls. |
---|
| 818 | */ |
---|
| 819 | |
---|
[0a6fb22] | 820 | int _CPU_Set_sync_io_handler( |
---|
| 821 | int fd, |
---|
| 822 | boolean read, |
---|
| 823 | boolean write, |
---|
| 824 | boolean except, |
---|
| 825 | rtems_sync_io_handler handler |
---|
| 826 | ) |
---|
| 827 | { |
---|
| 828 | if ((fd < FD_SETSIZE) && (_CPU_Sync_io_handlers[fd] == NULL)) { |
---|
| 829 | if (read) |
---|
| 830 | FD_SET(fd, &sync_io_readfds); |
---|
| 831 | else |
---|
| 832 | FD_CLR(fd, &sync_io_readfds); |
---|
| 833 | if (write) |
---|
| 834 | FD_SET(fd, &sync_io_writefds); |
---|
| 835 | else |
---|
| 836 | FD_CLR(fd, &sync_io_writefds); |
---|
| 837 | if (except) |
---|
| 838 | FD_SET(fd, &sync_io_exceptfds); |
---|
| 839 | else |
---|
| 840 | FD_CLR(fd, &sync_io_exceptfds); |
---|
| 841 | _CPU_Sync_io_handlers[fd] = handler; |
---|
| 842 | if ((fd + 1) > sync_io_nfds) |
---|
| 843 | sync_io_nfds = fd + 1; |
---|
| 844 | return 0; |
---|
| 845 | } |
---|
| 846 | return -1; |
---|
| 847 | } |
---|
| 848 | |
---|
| 849 | int _CPU_Clear_sync_io_handler( |
---|
| 850 | int fd |
---|
| 851 | ) |
---|
| 852 | { |
---|
| 853 | if ((fd < FD_SETSIZE) && _CPU_Sync_io_handlers[fd]) { |
---|
| 854 | FD_CLR(fd, &sync_io_readfds); |
---|
| 855 | FD_CLR(fd, &sync_io_writefds); |
---|
| 856 | FD_CLR(fd, &sync_io_exceptfds); |
---|
| 857 | _CPU_Sync_io_handlers[fd] = NULL; |
---|
| 858 | sync_io_nfds = 0; |
---|
| 859 | for (fd = 0; fd < FD_SETSIZE; fd++) |
---|
| 860 | if (FD_ISSET(fd, &sync_io_readfds) || |
---|
| 861 | FD_ISSET(fd, &sync_io_writefds) || |
---|
| 862 | FD_ISSET(fd, &sync_io_exceptfds)) |
---|
| 863 | sync_io_nfds = fd; |
---|
| 864 | return 0; |
---|
| 865 | } |
---|
| 866 | return -1; |
---|
| 867 | } |
---|
| 868 | |
---|
[37f4c2d] | 869 | int _CPU_Get_clock_vector( void ) |
---|
| 870 | { |
---|
| 871 | return SIGALRM; |
---|
| 872 | } |
---|
| 873 | |
---|
[d1193c7] | 874 | void _CPU_Start_clock( |
---|
[37f4c2d] | 875 | int microseconds |
---|
| 876 | ) |
---|
| 877 | { |
---|
| 878 | struct itimerval new; |
---|
| 879 | |
---|
| 880 | new.it_value.tv_sec = 0; |
---|
| 881 | new.it_value.tv_usec = microseconds; |
---|
| 882 | new.it_interval.tv_sec = 0; |
---|
| 883 | new.it_interval.tv_usec = microseconds; |
---|
| 884 | |
---|
| 885 | setitimer(ITIMER_REAL, &new, 0); |
---|
| 886 | } |
---|
| 887 | |
---|
| 888 | void _CPU_Stop_clock( void ) |
---|
| 889 | { |
---|
| 890 | struct itimerval new; |
---|
| 891 | struct sigaction act; |
---|
[d1193c7] | 892 | |
---|
[37f4c2d] | 893 | /* |
---|
| 894 | * Set the SIGALRM signal to ignore any last |
---|
| 895 | * signals that might come in while we are |
---|
| 896 | * disarming the timer and removing the interrupt |
---|
| 897 | * vector. |
---|
| 898 | */ |
---|
[d1193c7] | 899 | |
---|
[cc4c1fe4] | 900 | (void) memset(&act, 0, sizeof(act)); |
---|
[37f4c2d] | 901 | act.sa_handler = SIG_IGN; |
---|
[d1193c7] | 902 | |
---|
[cc4c1fe4] | 903 | sigaction(SIGALRM, &act, 0); |
---|
[d1193c7] | 904 | |
---|
[cc4c1fe4] | 905 | (void) memset(&new, 0, sizeof(new)); |
---|
[37f4c2d] | 906 | setitimer(ITIMER_REAL, &new, 0); |
---|
| 907 | } |
---|
| 908 | |
---|
| 909 | int _CPU_SHM_Semid; |
---|
| 910 | extern void fix_syscall_errno( void ); |
---|
| 911 | |
---|
[d1193c7] | 912 | void _CPU_SHM_Init( |
---|
[37f4c2d] | 913 | unsigned32 maximum_nodes, |
---|
| 914 | boolean is_master_node, |
---|
| 915 | void **shm_address, |
---|
| 916 | unsigned32 *shm_length |
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| 917 | ) |
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| 918 | { |
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| 919 | int i; |
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| 920 | int shmid; |
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| 921 | char *shm_addr; |
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| 922 | key_t shm_key; |
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| 923 | key_t sem_key; |
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[d6ba279] | 924 | int status = 0; /* to avoid unitialized warnings */ |
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[37f4c2d] | 925 | int shm_size; |
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[d1193c7] | 926 | |
---|
[37f4c2d] | 927 | if (getenv("RTEMS_SHM_KEY")) |
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| 928 | shm_key = strtol(getenv("RTEMS_SHM_KEY"), 0, 0); |
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| 929 | else |
---|
| 930 | #ifdef RTEMS_SHM_KEY |
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| 931 | shm_key = RTEMS_SHM_KEY; |
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| 932 | #else |
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| 933 | shm_key = 0xa000; |
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| 934 | #endif |
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[d1193c7] | 935 | |
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[37f4c2d] | 936 | if (getenv("RTEMS_SHM_SIZE")) |
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| 937 | shm_size = strtol(getenv("RTEMS_SHM_SIZE"), 0, 0); |
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| 938 | else |
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| 939 | #ifdef RTEMS_SHM_SIZE |
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| 940 | shm_size = RTEMS_SHM_SIZE; |
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| 941 | #else |
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| 942 | shm_size = 64 * 1024; |
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| 943 | #endif |
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[d1193c7] | 944 | |
---|
[37f4c2d] | 945 | if (getenv("RTEMS_SHM_SEMAPHORE_KEY")) |
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| 946 | sem_key = strtol(getenv("RTEMS_SHM_SEMAPHORE_KEY"), 0, 0); |
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| 947 | else |
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| 948 | #ifdef RTEMS_SHM_SEMAPHORE_KEY |
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| 949 | sem_key = RTEMS_SHM_SEMAPHORE_KEY; |
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| 950 | #else |
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| 951 | sem_key = 0xa001; |
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| 952 | #endif |
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[d1193c7] | 953 | |
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[37f4c2d] | 954 | shmid = shmget(shm_key, shm_size, IPC_CREAT | 0660); |
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| 955 | if ( shmid == -1 ) { |
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| 956 | fix_syscall_errno(); /* in case of newlib */ |
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| 957 | perror( "shmget" ); |
---|
| 958 | _CPU_Fatal_halt( 0xdead0001 ); |
---|
| 959 | } |
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[d1193c7] | 960 | |
---|
[37f4c2d] | 961 | shm_addr = shmat(shmid, (char *)0, SHM_RND); |
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| 962 | if ( shm_addr == (void *)-1 ) { |
---|
| 963 | fix_syscall_errno(); /* in case of newlib */ |
---|
| 964 | perror( "shmat" ); |
---|
| 965 | _CPU_Fatal_halt( 0xdead0002 ); |
---|
| 966 | } |
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[d1193c7] | 967 | |
---|
[37f4c2d] | 968 | _CPU_SHM_Semid = semget(sem_key, maximum_nodes + 1, IPC_CREAT | 0660); |
---|
| 969 | if ( _CPU_SHM_Semid == -1 ) { |
---|
| 970 | fix_syscall_errno(); /* in case of newlib */ |
---|
| 971 | perror( "semget" ); |
---|
| 972 | _CPU_Fatal_halt( 0xdead0003 ); |
---|
| 973 | } |
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[d1193c7] | 974 | |
---|
[37f4c2d] | 975 | if ( is_master_node ) { |
---|
| 976 | for ( i=0 ; i <= maximum_nodes ; i++ ) { |
---|
| 977 | #if defined(solaris2) |
---|
| 978 | union semun { |
---|
| 979 | int val; |
---|
| 980 | struct semid_ds *buf; |
---|
| 981 | ushort *array; |
---|
| 982 | } help; |
---|
[d1193c7] | 983 | |
---|
[37f4c2d] | 984 | help.val = 1; |
---|
| 985 | status = semctl( _CPU_SHM_Semid, i, SETVAL, help ); |
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[3a85d03d] | 986 | #elif defined(__linux__) |
---|
| 987 | union semun help; |
---|
| 988 | |
---|
| 989 | help.val = 1; |
---|
| 990 | status = semctl( _CPU_SHM_Semid, i, SETVAL, help ); |
---|
| 991 | #elif defined(hpux) |
---|
[37f4c2d] | 992 | status = semctl( _CPU_SHM_Semid, i, SETVAL, 1 ); |
---|
[f2545552] | 993 | #else |
---|
| 994 | #error "Not a supported unix variant" |
---|
[37f4c2d] | 995 | #endif |
---|
[d1193c7] | 996 | |
---|
[37f4c2d] | 997 | fix_syscall_errno(); /* in case of newlib */ |
---|
| 998 | if ( status == -1 ) { |
---|
| 999 | _CPU_Fatal_halt( 0xdead0004 ); |
---|
| 1000 | } |
---|
| 1001 | } |
---|
| 1002 | } |
---|
[d1193c7] | 1003 | |
---|
[37f4c2d] | 1004 | *shm_address = shm_addr; |
---|
| 1005 | *shm_length = shm_size; |
---|
| 1006 | |
---|
| 1007 | } |
---|
| 1008 | |
---|
| 1009 | int _CPU_Get_pid( void ) |
---|
| 1010 | { |
---|
| 1011 | return getpid(); |
---|
| 1012 | } |
---|
| 1013 | |
---|
| 1014 | /* |
---|
| 1015 | * Define this to use signals for MPCI shared memory driver. |
---|
| 1016 | * If undefined, the shared memory driver will poll from the |
---|
| 1017 | * clock interrupt. |
---|
| 1018 | * Ref: ../shmsupp/getcfg.c |
---|
| 1019 | * |
---|
| 1020 | * BEWARE:: many UN*X kernels and debuggers become severely confused when |
---|
| 1021 | * debugging programs which use signals. The problem is *much* |
---|
| 1022 | * worse when using multiple signals, since ptrace(2) tends to |
---|
| 1023 | * drop all signals except 1 in the case of multiples. |
---|
| 1024 | * On hpux9, this problem was so bad, we couldn't use interrupts |
---|
| 1025 | * with the shared memory driver if we ever hoped to debug |
---|
| 1026 | * RTEMS programs. |
---|
| 1027 | * Maybe systems that use /proc don't have this problem... |
---|
| 1028 | */ |
---|
[d1193c7] | 1029 | |
---|
| 1030 | |
---|
[37f4c2d] | 1031 | int _CPU_SHM_Get_vector( void ) |
---|
| 1032 | { |
---|
| 1033 | #ifdef CPU_USE_SHM_INTERRUPTS |
---|
| 1034 | return SIGUSR1; |
---|
| 1035 | #else |
---|
| 1036 | return 0; |
---|
| 1037 | #endif |
---|
| 1038 | } |
---|
| 1039 | |
---|
| 1040 | void _CPU_SHM_Send_interrupt( |
---|
| 1041 | int pid, |
---|
| 1042 | int vector |
---|
| 1043 | ) |
---|
| 1044 | { |
---|
| 1045 | kill((pid_t) pid, vector); |
---|
| 1046 | } |
---|
| 1047 | |
---|
[d1193c7] | 1048 | void _CPU_SHM_Lock( |
---|
[37f4c2d] | 1049 | int semaphore |
---|
| 1050 | ) |
---|
| 1051 | { |
---|
[0a6fb22] | 1052 | struct sembuf sb; |
---|
[d1193c7] | 1053 | |
---|
[37f4c2d] | 1054 | sb.sem_num = semaphore; |
---|
| 1055 | sb.sem_op = -1; |
---|
| 1056 | sb.sem_flg = 0; |
---|
[d1193c7] | 1057 | |
---|
[37f4c2d] | 1058 | while (1) { |
---|
[0a6fb22] | 1059 | int status = -1; |
---|
| 1060 | |
---|
[37f4c2d] | 1061 | status = semop(_CPU_SHM_Semid, &sb, 1); |
---|
| 1062 | if ( status >= 0 ) |
---|
| 1063 | break; |
---|
| 1064 | if ( status == -1 ) { |
---|
| 1065 | fix_syscall_errno(); /* in case of newlib */ |
---|
| 1066 | if (errno == EINTR) |
---|
| 1067 | continue; |
---|
| 1068 | perror("shm lock"); |
---|
| 1069 | _CPU_Fatal_halt( 0xdead0005 ); |
---|
| 1070 | } |
---|
| 1071 | } |
---|
| 1072 | |
---|
| 1073 | } |
---|
| 1074 | |
---|
| 1075 | void _CPU_SHM_Unlock( |
---|
| 1076 | int semaphore |
---|
| 1077 | ) |
---|
| 1078 | { |
---|
| 1079 | struct sembuf sb; |
---|
| 1080 | int status; |
---|
[d1193c7] | 1081 | |
---|
[37f4c2d] | 1082 | sb.sem_num = semaphore; |
---|
| 1083 | sb.sem_op = 1; |
---|
| 1084 | sb.sem_flg = 0; |
---|
[d1193c7] | 1085 | |
---|
[37f4c2d] | 1086 | while (1) { |
---|
| 1087 | status = semop(_CPU_SHM_Semid, &sb, 1); |
---|
| 1088 | if ( status >= 0 ) |
---|
| 1089 | break; |
---|
[d1193c7] | 1090 | |
---|
[37f4c2d] | 1091 | if ( status == -1 ) { |
---|
| 1092 | fix_syscall_errno(); /* in case of newlib */ |
---|
| 1093 | if (errno == EINTR) |
---|
| 1094 | continue; |
---|
| 1095 | perror("shm unlock"); |
---|
| 1096 | _CPU_Fatal_halt( 0xdead0006 ); |
---|
| 1097 | } |
---|
| 1098 | } |
---|
| 1099 | |
---|
| 1100 | } |
---|