[ac7d5ef0] | 1 | /* |
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[3652ad35] | 2 | * UNIX Simulator Dependent Source |
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[ac7d5ef0] | 3 | * |
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[e71ce071] | 4 | * COPYRIGHT (c) 1994,95 by Division Incorporated |
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[ac7d5ef0] | 5 | * |
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[98e4ebf5] | 6 | * The license and distribution terms for this file may be |
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| 7 | * found in the file LICENSE in this distribution or at |
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[e71ce071] | 8 | * http://www.OARcorp.com/rtems/license.html. |
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[ac7d5ef0] | 9 | * |
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| 10 | * $Id$ |
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| 11 | */ |
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| 12 | |
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| 13 | #include <rtems/system.h> |
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[5e9b32b] | 14 | #include <rtems/score/isr.h> |
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| 15 | #include <rtems/score/interr.h> |
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[ac7d5ef0] | 16 | |
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[f2545552] | 17 | #if defined(__linux__) |
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[ddf142d] | 18 | #define _XOPEN_SOURCE |
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[37f4c2d] | 19 | #define MALLOC_0_RETURNS_NULL |
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| 20 | #endif |
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[d1193c7] | 21 | |
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[1c964ffa] | 22 | #include <sys/types.h> |
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| 23 | #include <sys/times.h> |
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[ac7d5ef0] | 24 | #include <stdio.h> |
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| 25 | #include <stdlib.h> |
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[37f4c2d] | 26 | #include <setjmp.h> |
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[ac7d5ef0] | 27 | #include <signal.h> |
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| 28 | #include <time.h> |
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[10aed1e3] | 29 | #include <sys/time.h> |
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[37f4c2d] | 30 | #include <errno.h> |
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| 31 | #include <unistd.h> |
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[c094542] | 32 | #if defined(RTEMS_MULTIPROCESSING) |
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[37f4c2d] | 33 | #include <sys/ipc.h> |
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| 34 | #include <sys/shm.h> |
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| 35 | #include <sys/sem.h> |
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[c094542] | 36 | #endif |
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[cc4c1fe4] | 37 | #include <string.h> /* memset */ |
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[ac7d5ef0] | 38 | |
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[637df35] | 39 | #ifndef SA_RESTART |
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| 40 | #define SA_RESTART 0 |
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| 41 | #endif |
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[ac7d5ef0] | 42 | |
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[37f4c2d] | 43 | typedef struct { |
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| 44 | jmp_buf regs; |
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[98165e21] | 45 | int isr_level; |
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[37f4c2d] | 46 | } Context_Control_overlay; |
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| 47 | |
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[637df35] | 48 | void _CPU_Signal_initialize(void); |
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| 49 | void _CPU_Stray_signal(int); |
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| 50 | void _CPU_ISR_Handler(int); |
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[ac7d5ef0] | 51 | |
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[d83c39dc] | 52 | static sigset_t _CPU_Signal_mask; |
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[380b2231] | 53 | static Context_Control_overlay _CPU_Context_Default_with_ISRs_enabled; |
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| 54 | static Context_Control_overlay _CPU_Context_Default_with_ISRs_disabled; |
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[ac7d5ef0] | 55 | |
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[0a6fb22] | 56 | /* |
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| 57 | * Sync IO support, an entry for each fd that can be set |
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| 58 | */ |
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| 59 | |
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| 60 | void _CPU_Sync_io_Init(); |
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| 61 | |
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| 62 | static rtems_sync_io_handler _CPU_Sync_io_handlers[FD_SETSIZE]; |
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| 63 | static int sync_io_nfds; |
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| 64 | static fd_set sync_io_readfds; |
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| 65 | static fd_set sync_io_writefds; |
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| 66 | static fd_set sync_io_exceptfds; |
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| 67 | |
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[ac7d5ef0] | 68 | /* |
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| 69 | * Which cpu are we? Used by libcpu and libbsp. |
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| 70 | */ |
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| 71 | |
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| 72 | int cpu_number; |
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| 73 | |
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[637df35] | 74 | /*PAGE |
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| 75 | * |
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| 76 | * _CPU_ISR_From_CPU_Init |
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| 77 | */ |
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| 78 | |
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[e7e016f] | 79 | sigset_t posix_empty_mask; |
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| 80 | |
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[637df35] | 81 | void _CPU_ISR_From_CPU_Init() |
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| 82 | { |
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| 83 | unsigned32 i; |
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| 84 | proc_ptr old_handler; |
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| 85 | |
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[e7e016f] | 86 | /* |
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| 87 | * Generate an empty mask to be used by disable_support |
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| 88 | */ |
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[637df35] | 89 | |
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[e7e016f] | 90 | sigemptyset(&posix_empty_mask); |
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[c64e4ed4] | 91 | |
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[637df35] | 92 | /* |
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| 93 | * Block all the signals except SIGTRAP for the debugger |
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[d196e48] | 94 | * and fatal error signals. |
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[637df35] | 95 | */ |
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| 96 | |
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| 97 | (void) sigfillset(&_CPU_Signal_mask); |
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| 98 | (void) sigdelset(&_CPU_Signal_mask, SIGTRAP); |
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| 99 | (void) sigdelset(&_CPU_Signal_mask, SIGABRT); |
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[0315b79b] | 100 | #if !defined(__CYGWIN__) |
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[637df35] | 101 | (void) sigdelset(&_CPU_Signal_mask, SIGIOT); |
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[0315b79b] | 102 | #endif |
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[637df35] | 103 | (void) sigdelset(&_CPU_Signal_mask, SIGCONT); |
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[d196e48] | 104 | (void) sigdelset(&_CPU_Signal_mask, SIGSEGV); |
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| 105 | (void) sigdelset(&_CPU_Signal_mask, SIGBUS); |
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| 106 | (void) sigdelset(&_CPU_Signal_mask, SIGFPE); |
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[637df35] | 107 | |
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[e7e016f] | 108 | _CPU_ISR_Enable(1); |
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[637df35] | 109 | |
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| 110 | /* |
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| 111 | * Set the handler for all signals to be signal_handler |
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| 112 | * which will then vector out to the correct handler |
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| 113 | * for whichever signal actually happened. Initially |
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| 114 | * set the vectors to the stray signal handler. |
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| 115 | */ |
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| 116 | |
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| 117 | for (i = 0; i < CPU_INTERRUPT_NUMBER_OF_VECTORS; i++) |
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| 118 | (void)_CPU_ISR_install_vector(i, _CPU_Stray_signal, &old_handler); |
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| 119 | |
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| 120 | _CPU_Signal_initialize(); |
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| 121 | } |
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| 122 | |
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| 123 | void _CPU_Signal_initialize( void ) |
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| 124 | { |
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| 125 | struct sigaction act; |
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| 126 | sigset_t mask; |
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[d1193c7] | 127 | |
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[637df35] | 128 | /* mark them all active except for TraceTrap and Abort */ |
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[d1193c7] | 129 | |
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[d196e48] | 130 | mask = _CPU_Signal_mask; |
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[637df35] | 131 | sigprocmask(SIG_UNBLOCK, &mask, 0); |
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[d1193c7] | 132 | |
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[637df35] | 133 | act.sa_handler = _CPU_ISR_Handler; |
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| 134 | act.sa_mask = mask; |
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| 135 | act.sa_flags = SA_RESTART; |
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[d1193c7] | 136 | |
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[637df35] | 137 | sigaction(SIGHUP, &act, 0); |
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| 138 | sigaction(SIGINT, &act, 0); |
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| 139 | sigaction(SIGQUIT, &act, 0); |
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| 140 | sigaction(SIGILL, &act, 0); |
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[10aed1e3] | 141 | #ifdef SIGEMT |
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[637df35] | 142 | sigaction(SIGEMT, &act, 0); |
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[10aed1e3] | 143 | #endif |
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[637df35] | 144 | sigaction(SIGFPE, &act, 0); |
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| 145 | sigaction(SIGKILL, &act, 0); |
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| 146 | sigaction(SIGBUS, &act, 0); |
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| 147 | sigaction(SIGSEGV, &act, 0); |
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[10aed1e3] | 148 | #ifdef SIGSYS |
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[637df35] | 149 | sigaction(SIGSYS, &act, 0); |
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[10aed1e3] | 150 | #endif |
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[637df35] | 151 | sigaction(SIGPIPE, &act, 0); |
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| 152 | sigaction(SIGALRM, &act, 0); |
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| 153 | sigaction(SIGTERM, &act, 0); |
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| 154 | sigaction(SIGUSR1, &act, 0); |
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| 155 | sigaction(SIGUSR2, &act, 0); |
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| 156 | sigaction(SIGCHLD, &act, 0); |
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[9a6994b4] | 157 | #ifdef SIGCLD |
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[637df35] | 158 | sigaction(SIGCLD, &act, 0); |
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[9a6994b4] | 159 | #endif |
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| 160 | #ifdef SIGPWR |
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[637df35] | 161 | sigaction(SIGPWR, &act, 0); |
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[9a6994b4] | 162 | #endif |
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[637df35] | 163 | sigaction(SIGVTALRM, &act, 0); |
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| 164 | sigaction(SIGPROF, &act, 0); |
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| 165 | sigaction(SIGIO, &act, 0); |
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| 166 | sigaction(SIGWINCH, &act, 0); |
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| 167 | sigaction(SIGSTOP, &act, 0); |
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| 168 | sigaction(SIGTTIN, &act, 0); |
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| 169 | sigaction(SIGTTOU, &act, 0); |
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| 170 | sigaction(SIGURG, &act, 0); |
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[e7e016f] | 171 | #ifdef SIGLOST |
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[637df35] | 172 | sigaction(SIGLOST, &act, 0); |
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| 173 | #endif |
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| 174 | } |
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| 175 | |
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| 176 | /*PAGE |
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| 177 | * |
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| 178 | * _CPU_Context_From_CPU_Init |
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| 179 | */ |
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| 180 | |
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| 181 | void _CPU_Context_From_CPU_Init() |
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| 182 | { |
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| 183 | |
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[3ec7bfc] | 184 | #if defined(__hppa__) && defined(RTEMS_UNIXLIB_SETJMP) |
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[637df35] | 185 | /* |
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| 186 | * HACK - set the _SYSTEM_ID to 0x20c so that setjmp/longjmp |
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| 187 | * will handle the full 32 floating point registers. |
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| 188 | */ |
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| 189 | |
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| 190 | { |
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| 191 | extern unsigned32 _SYSTEM_ID; |
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| 192 | |
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| 193 | _SYSTEM_ID = 0x20c; |
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| 194 | } |
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| 195 | #endif |
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| 196 | |
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| 197 | /* |
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| 198 | * get default values to use in _CPU_Context_Initialize() |
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| 199 | */ |
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| 200 | |
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[380b2231] | 201 | if ( sizeof(Context_Control_overlay) > sizeof(Context_Control) ) |
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| 202 | _CPU_Fatal_halt( 0xdeadf00d ); |
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[98165e21] | 203 | |
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[cc4c1fe4] | 204 | (void) memset( |
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| 205 | &_CPU_Context_Default_with_ISRs_enabled, |
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| 206 | 0, |
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[380b2231] | 207 | sizeof(Context_Control_overlay) |
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[cc4c1fe4] | 208 | ); |
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| 209 | (void) memset( |
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| 210 | &_CPU_Context_Default_with_ISRs_disabled, |
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| 211 | 0, |
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[380b2231] | 212 | sizeof(Context_Control_overlay) |
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[cc4c1fe4] | 213 | ); |
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| 214 | |
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[637df35] | 215 | _CPU_ISR_Set_level( 0 ); |
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[3652ad35] | 216 | _CPU_Context_switch( |
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[d196e48] | 217 | (Context_Control *) &_CPU_Context_Default_with_ISRs_enabled, |
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| 218 | (Context_Control *) &_CPU_Context_Default_with_ISRs_enabled |
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[637df35] | 219 | ); |
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[d1193c7] | 220 | |
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[637df35] | 221 | _CPU_ISR_Set_level( 1 ); |
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[3652ad35] | 222 | _CPU_Context_switch( |
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[d196e48] | 223 | (Context_Control *) &_CPU_Context_Default_with_ISRs_disabled, |
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| 224 | (Context_Control *) &_CPU_Context_Default_with_ISRs_disabled |
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[637df35] | 225 | ); |
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| 226 | } |
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| 227 | |
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[0a6fb22] | 228 | /*PAGE |
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| 229 | * |
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| 230 | * _CPU_Sync_io_Init |
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| 231 | */ |
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| 232 | |
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| 233 | void _CPU_Sync_io_Init() |
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| 234 | { |
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| 235 | int fd; |
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| 236 | |
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| 237 | for (fd = 0; fd < FD_SETSIZE; fd++) |
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| 238 | _CPU_Sync_io_handlers[fd] = NULL; |
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| 239 | |
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| 240 | sync_io_nfds = 0; |
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| 241 | FD_ZERO(&sync_io_readfds); |
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| 242 | FD_ZERO(&sync_io_writefds); |
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| 243 | FD_ZERO(&sync_io_exceptfds); |
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| 244 | } |
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| 245 | |
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[3a4ae6c] | 246 | /*PAGE |
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| 247 | * |
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| 248 | * _CPU_ISR_Get_level |
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| 249 | */ |
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| 250 | |
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| 251 | unsigned32 _CPU_ISR_Get_level( void ) |
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| 252 | { |
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[d196e48] | 253 | sigset_t old_mask; |
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[d1193c7] | 254 | |
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[5e34bf4] | 255 | sigemptyset( &old_mask ); |
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[d196e48] | 256 | sigprocmask(SIG_BLOCK, 0, &old_mask); |
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[d1193c7] | 257 | |
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[d196e48] | 258 | if (memcmp((void *)&posix_empty_mask, (void *)&old_mask, sizeof(sigset_t))) |
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| 259 | return 1; |
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[d1193c7] | 260 | |
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[d196e48] | 261 | return 0; |
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[3a4ae6c] | 262 | } |
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| 263 | |
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[ac7d5ef0] | 264 | /* _CPU_Initialize |
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| 265 | * |
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| 266 | * This routine performs processor dependent initialization. |
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| 267 | * |
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| 268 | * INPUT PARAMETERS: |
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| 269 | * cpu_table - CPU table to initialize |
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| 270 | * thread_dispatch - address of disptaching routine |
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| 271 | */ |
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| 272 | |
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| 273 | |
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| 274 | void _CPU_Initialize( |
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| 275 | rtems_cpu_table *cpu_table, |
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[3a4ae6c] | 276 | void (*thread_dispatch) /* ignored on this CPU */ |
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[ac7d5ef0] | 277 | ) |
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| 278 | { |
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[250edf6] | 279 | /* |
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| 280 | * If something happened where the public Context_Control is not |
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| 281 | * at least as large as the private Context_Control_overlay, then |
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| 282 | * we are in trouble. |
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| 283 | */ |
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| 284 | |
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[459d051b] | 285 | if ( sizeof(Context_Control_overlay) > sizeof(Context_Control) ) |
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[250edf6] | 286 | _CPU_Fatal_error(0x100 + 1); |
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| 287 | |
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[ac7d5ef0] | 288 | /* |
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| 289 | * The thread_dispatch argument is the address of the entry point |
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| 290 | * for the routine called at the end of an ISR once it has been |
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| 291 | * decided a context switch is necessary. On some compilation |
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| 292 | * systems it is difficult to call a high-level language routine |
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| 293 | * from assembly. This allows us to trick these systems. |
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| 294 | * |
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| 295 | * If you encounter this problem save the entry point in a CPU |
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| 296 | * dependent variable. |
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| 297 | */ |
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| 298 | |
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| 299 | _CPU_Thread_dispatch_pointer = thread_dispatch; |
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| 300 | |
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| 301 | /* |
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| 302 | * XXX; If there is not an easy way to initialize the FP context |
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| 303 | * during Context_Initialize, then it is usually easier to |
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| 304 | * save an "uninitialized" FP context here and copy it to |
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| 305 | * the task's during Context_Initialize. |
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| 306 | */ |
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| 307 | |
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| 308 | /* XXX: FP context initialization support */ |
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| 309 | |
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| 310 | _CPU_Table = *cpu_table; |
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| 311 | |
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[637df35] | 312 | _CPU_ISR_From_CPU_Init(); |
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[ac7d5ef0] | 313 | |
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[0a6fb22] | 314 | _CPU_Sync_io_Init(); |
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| 315 | |
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[637df35] | 316 | _CPU_Context_From_CPU_Init(); |
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[ac7d5ef0] | 317 | |
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[637df35] | 318 | } |
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[ac7d5ef0] | 319 | |
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[637df35] | 320 | /*PAGE |
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| 321 | * |
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| 322 | * _CPU_ISR_install_raw_handler |
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| 323 | */ |
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[ac7d5ef0] | 324 | |
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[637df35] | 325 | void _CPU_ISR_install_raw_handler( |
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| 326 | unsigned32 vector, |
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| 327 | proc_ptr new_handler, |
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| 328 | proc_ptr *old_handler |
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| 329 | ) |
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| 330 | { |
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| 331 | _CPU_Fatal_halt( 0xdeaddead ); |
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[ac7d5ef0] | 332 | } |
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| 333 | |
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[637df35] | 334 | /*PAGE |
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| 335 | * |
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| 336 | * _CPU_ISR_install_vector |
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[ac7d5ef0] | 337 | * |
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| 338 | * This kernel routine installs the RTEMS handler for the |
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| 339 | * specified vector. |
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| 340 | * |
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| 341 | * Input parameters: |
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| 342 | * vector - interrupt vector number |
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| 343 | * old_handler - former ISR for this vector number |
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| 344 | * new_handler - replacement ISR for this vector number |
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| 345 | * |
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| 346 | * Output parameters: NONE |
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| 347 | * |
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| 348 | */ |
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| 349 | |
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| 350 | |
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| 351 | void _CPU_ISR_install_vector( |
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| 352 | unsigned32 vector, |
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| 353 | proc_ptr new_handler, |
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| 354 | proc_ptr *old_handler |
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| 355 | ) |
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| 356 | { |
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| 357 | *old_handler = _ISR_Vector_table[ vector ]; |
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| 358 | |
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| 359 | /* |
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| 360 | * If the interrupt vector table is a table of pointer to isr entry |
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| 361 | * points, then we need to install the appropriate RTEMS interrupt |
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| 362 | * handler for this vector number. |
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| 363 | */ |
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| 364 | |
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| 365 | /* |
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| 366 | * We put the actual user ISR address in '_ISR_vector_table'. This will |
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[637df35] | 367 | * be used by the _CPU_ISR_Handler so the user gets control. |
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[ac7d5ef0] | 368 | */ |
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| 369 | |
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| 370 | _ISR_Vector_table[ vector ] = new_handler; |
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| 371 | } |
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| 372 | |
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| 373 | /*PAGE |
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| 374 | * |
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| 375 | * _CPU_Install_interrupt_stack |
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| 376 | */ |
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| 377 | |
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| 378 | void _CPU_Install_interrupt_stack( void ) |
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| 379 | { |
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| 380 | } |
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| 381 | |
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| 382 | /*PAGE |
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| 383 | * |
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[75f09e5] | 384 | * _CPU_Thread_Idle_body |
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[ac7d5ef0] | 385 | * |
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[d1193c7] | 386 | * Stop until we get a signal which is the logically the same thing |
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[9700578] | 387 | * entering low-power or sleep mode on a real processor and waiting for |
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| 388 | * an interrupt. This significantly reduces the consumption of host |
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| 389 | * CPU cycles which is again similar to low power mode. |
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[ac7d5ef0] | 390 | */ |
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| 391 | |
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[75f09e5] | 392 | void _CPU_Thread_Idle_body( void ) |
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[ac7d5ef0] | 393 | { |
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[0a6fb22] | 394 | #if CPU_SYNC_IO |
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| 395 | extern void _Thread_Dispatch(void); |
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| 396 | int fd; |
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| 397 | #endif |
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| 398 | |
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[d196e48] | 399 | while (1) { |
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| 400 | #ifdef RTEMS_DEBUG |
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| 401 | /* interrupts had better be enabled at this point! */ |
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| 402 | if (_CPU_ISR_Get_level() != 0) |
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| 403 | abort(); |
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| 404 | #endif |
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[0a6fb22] | 405 | |
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| 406 | /* |
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| 407 | * Block on a select statement, the CPU interface added allow the |
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| 408 | * user to add new descriptors which are to be blocked on |
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| 409 | */ |
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| 410 | |
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| 411 | #if CPU_SYNC_IO |
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| 412 | if (sync_io_nfds) { |
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| 413 | int result; |
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[b4e3b2b] | 414 | fd_set readfds, writefds, exceptfds; |
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[0a6fb22] | 415 | |
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[b4e3b2b] | 416 | readfds = sync_io_readfds; |
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| 417 | writefds = sync_io_writefds; |
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| 418 | exceptfds = sync_io_exceptfds; |
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[0a6fb22] | 419 | result = select(sync_io_nfds, |
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[b4e3b2b] | 420 | &readfds, |
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| 421 | &writefds, |
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| 422 | &exceptfds, |
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[0a6fb22] | 423 | NULL); |
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| 424 | |
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[b4e3b2b] | 425 | if (result < 0) { |
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| 426 | if (errno != EINTR) |
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| 427 | _CPU_Fatal_error(0x200); /* FIXME : what number should go here !! */ |
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| 428 | _Thread_Dispatch(); |
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| 429 | continue; |
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| 430 | } |
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[0a6fb22] | 431 | |
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| 432 | for (fd = 0; fd < sync_io_nfds; fd++) { |
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[b4e3b2b] | 433 | boolean read = FD_ISSET(fd, &readfds); |
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| 434 | boolean write = FD_ISSET(fd, &writefds); |
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| 435 | boolean except = FD_ISSET(fd, &exceptfds); |
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[0a6fb22] | 436 | |
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| 437 | if (_CPU_Sync_io_handlers[fd] && (read || write || except)) |
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| 438 | _CPU_Sync_io_handlers[fd](fd, read, write, except); |
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| 439 | } |
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[b4e3b2b] | 440 | |
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| 441 | _Thread_Dispatch(); |
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[0a6fb22] | 442 | } else |
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| 443 | pause(); |
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| 444 | #else |
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[637df35] | 445 | pause(); |
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[0a6fb22] | 446 | #endif |
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| 447 | |
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[d196e48] | 448 | } |
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| 449 | |
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[ac7d5ef0] | 450 | } |
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| 451 | |
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[637df35] | 452 | /*PAGE |
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[d1193c7] | 453 | * |
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[637df35] | 454 | * _CPU_Context_Initialize |
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| 455 | */ |
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| 456 | |
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[ac7d5ef0] | 457 | void _CPU_Context_Initialize( |
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| 458 | Context_Control *_the_context, |
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| 459 | unsigned32 *_stack_base, |
---|
| 460 | unsigned32 _size, |
---|
| 461 | unsigned32 _new_level, |
---|
[9700578] | 462 | void *_entry_point, |
---|
| 463 | boolean _is_fp |
---|
[ac7d5ef0] | 464 | ) |
---|
| 465 | { |
---|
[637df35] | 466 | unsigned32 *addr; |
---|
| 467 | unsigned32 jmp_addr; |
---|
| 468 | unsigned32 _stack_low; /* lowest "stack aligned" address */ |
---|
| 469 | unsigned32 _stack_high; /* highest "stack aligned" address */ |
---|
| 470 | unsigned32 _the_size; |
---|
[ac7d5ef0] | 471 | |
---|
[637df35] | 472 | jmp_addr = (unsigned32) _entry_point; |
---|
[ac7d5ef0] | 473 | |
---|
[637df35] | 474 | /* |
---|
| 475 | * On CPUs with stacks which grow down, we build the stack |
---|
[d1193c7] | 476 | * based on the _stack_high address. On CPUs with stacks which |
---|
| 477 | * grow up, we build the stack based on the _stack_low address. |
---|
[637df35] | 478 | */ |
---|
[88d594a] | 479 | |
---|
[cc4c1fe4] | 480 | _stack_low = (unsigned32)(_stack_base) + CPU_STACK_ALIGNMENT - 1; |
---|
[637df35] | 481 | _stack_low &= ~(CPU_STACK_ALIGNMENT - 1); |
---|
[88d594a] | 482 | |
---|
[cc4c1fe4] | 483 | _stack_high = (unsigned32)(_stack_base) + _size; |
---|
[637df35] | 484 | _stack_high &= ~(CPU_STACK_ALIGNMENT - 1); |
---|
[ac7d5ef0] | 485 | |
---|
[cc4c1fe4] | 486 | if (_stack_high > _stack_low) |
---|
| 487 | _the_size = _stack_high - _stack_low; |
---|
| 488 | else |
---|
| 489 | _the_size = _stack_low - _stack_high; |
---|
[ac7d5ef0] | 490 | |
---|
[637df35] | 491 | /* |
---|
| 492 | * Slam our jmp_buf template into the context we are creating |
---|
| 493 | */ |
---|
[ac7d5ef0] | 494 | |
---|
[637df35] | 495 | if ( _new_level == 0 ) |
---|
[250edf6] | 496 | *(Context_Control_overlay *)_the_context = |
---|
| 497 | _CPU_Context_Default_with_ISRs_enabled; |
---|
[637df35] | 498 | else |
---|
[250edf6] | 499 | *(Context_Control_overlay *)_the_context = |
---|
| 500 | _CPU_Context_Default_with_ISRs_disabled; |
---|
[d1193c7] | 501 | |
---|
[637df35] | 502 | addr = (unsigned32 *)_the_context; |
---|
[ac7d5ef0] | 503 | |
---|
[3ec7bfc] | 504 | #if defined(__hppa__) |
---|
[637df35] | 505 | *(addr + RP_OFF) = jmp_addr; |
---|
| 506 | *(addr + SP_OFF) = (unsigned32)(_stack_low + CPU_FRAME_SIZE); |
---|
[ac7d5ef0] | 507 | |
---|
[637df35] | 508 | /* |
---|
| 509 | * See if we are using shared libraries by checking |
---|
| 510 | * bit 30 in 24 off of newp. If bit 30 is set then |
---|
| 511 | * we are using shared libraries and the jump address |
---|
[cc4c1fe4] | 512 | * points to the pointer, so we put that into rp instead. |
---|
[637df35] | 513 | */ |
---|
[ac7d5ef0] | 514 | |
---|
[637df35] | 515 | if (jmp_addr & 0x40000000) { |
---|
| 516 | jmp_addr &= 0xfffffffc; |
---|
[cc4c1fe4] | 517 | *(addr + RP_OFF) = *(unsigned32 *)jmp_addr; |
---|
[637df35] | 518 | } |
---|
[3ec7bfc] | 519 | #elif defined(__sparc__) |
---|
[ac7d5ef0] | 520 | |
---|
[637df35] | 521 | /* |
---|
| 522 | * See /usr/include/sys/stack.h in Solaris 2.3 for a nice |
---|
| 523 | * diagram of the stack. |
---|
| 524 | */ |
---|
[ac7d5ef0] | 525 | |
---|
[637df35] | 526 | asm ("ta 0x03"); /* flush registers */ |
---|
[ac7d5ef0] | 527 | |
---|
[637df35] | 528 | *(addr + RP_OFF) = jmp_addr + ADDR_ADJ_OFFSET; |
---|
| 529 | *(addr + SP_OFF) = (unsigned32)(_stack_high - CPU_FRAME_SIZE); |
---|
| 530 | *(addr + FP_OFF) = (unsigned32)(_stack_high); |
---|
[8044533] | 531 | |
---|
[3ec7bfc] | 532 | #elif defined(__i386__) |
---|
[d1193c7] | 533 | |
---|
[8044533] | 534 | /* |
---|
| 535 | * This information was gathered by disassembling setjmp(). |
---|
| 536 | */ |
---|
[10aed1e3] | 537 | |
---|
| 538 | { |
---|
| 539 | unsigned32 stack_ptr; |
---|
| 540 | |
---|
| 541 | stack_ptr = _stack_high - CPU_FRAME_SIZE; |
---|
| 542 | |
---|
| 543 | *(addr + EBX_OFF) = 0xFEEDFEED; |
---|
| 544 | *(addr + ESI_OFF) = 0xDEADDEAD; |
---|
| 545 | *(addr + EDI_OFF) = 0xDEAFDEAF; |
---|
| 546 | *(addr + EBP_OFF) = stack_ptr; |
---|
| 547 | *(addr + ESP_OFF) = stack_ptr; |
---|
| 548 | *(addr + RET_OFF) = jmp_addr; |
---|
[d1193c7] | 549 | |
---|
[10aed1e3] | 550 | addr = (unsigned32 *) stack_ptr; |
---|
[d1193c7] | 551 | |
---|
[10aed1e3] | 552 | addr[ 0 ] = jmp_addr; |
---|
| 553 | addr[ 1 ] = (unsigned32) stack_ptr; |
---|
| 554 | addr[ 2 ] = (unsigned32) stack_ptr; |
---|
| 555 | } |
---|
[8044533] | 556 | |
---|
[ac7d5ef0] | 557 | #else |
---|
| 558 | #error "UNKNOWN CPU!!!" |
---|
| 559 | #endif |
---|
| 560 | |
---|
| 561 | } |
---|
| 562 | |
---|
[637df35] | 563 | /*PAGE |
---|
| 564 | * |
---|
| 565 | * _CPU_Context_restore |
---|
| 566 | */ |
---|
| 567 | |
---|
[ac7d5ef0] | 568 | void _CPU_Context_restore( |
---|
| 569 | Context_Control *next |
---|
| 570 | ) |
---|
| 571 | { |
---|
[37f4c2d] | 572 | Context_Control_overlay *nextp = (Context_Control_overlay *)next; |
---|
| 573 | |
---|
[d196e48] | 574 | _CPU_ISR_Enable(nextp->isr_level); |
---|
[37f4c2d] | 575 | longjmp( nextp->regs, 0 ); |
---|
[ac7d5ef0] | 576 | } |
---|
| 577 | |
---|
[637df35] | 578 | /*PAGE |
---|
| 579 | * |
---|
| 580 | * _CPU_Context_switch |
---|
| 581 | */ |
---|
| 582 | |
---|
[d196e48] | 583 | static void do_jump( |
---|
| 584 | Context_Control_overlay *currentp, |
---|
| 585 | Context_Control_overlay *nextp |
---|
| 586 | ); |
---|
| 587 | |
---|
[ac7d5ef0] | 588 | void _CPU_Context_switch( |
---|
| 589 | Context_Control *current, |
---|
| 590 | Context_Control *next |
---|
| 591 | ) |
---|
| 592 | { |
---|
[37f4c2d] | 593 | Context_Control_overlay *currentp = (Context_Control_overlay *)current; |
---|
| 594 | Context_Control_overlay *nextp = (Context_Control_overlay *)next; |
---|
[d196e48] | 595 | #if 0 |
---|
[3652ad35] | 596 | int status; |
---|
[d196e48] | 597 | #endif |
---|
[d1193c7] | 598 | |
---|
[d196e48] | 599 | currentp->isr_level = _CPU_ISR_Disable_support(); |
---|
[d1193c7] | 600 | |
---|
[d196e48] | 601 | do_jump( currentp, nextp ); |
---|
[3652ad35] | 602 | |
---|
[d196e48] | 603 | #if 0 |
---|
| 604 | if (sigsetjmp(currentp->regs, 1) == 0) { /* Save the current context */ |
---|
| 605 | siglongjmp(nextp->regs, 0); /* Switch to the new context */ |
---|
| 606 | _Internal_error_Occurred( |
---|
| 607 | INTERNAL_ERROR_CORE, |
---|
| 608 | TRUE, |
---|
| 609 | status |
---|
| 610 | ); |
---|
| 611 | } |
---|
| 612 | #endif |
---|
[d1193c7] | 613 | |
---|
[d196e48] | 614 | #ifdef RTEMS_DEBUG |
---|
| 615 | if (_CPU_ISR_Get_level() == 0) |
---|
| 616 | abort(); |
---|
| 617 | #endif |
---|
[d1193c7] | 618 | |
---|
[d196e48] | 619 | _CPU_ISR_Enable(currentp->isr_level); |
---|
| 620 | } |
---|
[d1193c7] | 621 | |
---|
| 622 | static void do_jump( |
---|
[d196e48] | 623 | Context_Control_overlay *currentp, |
---|
[d1193c7] | 624 | Context_Control_overlay *nextp |
---|
[d196e48] | 625 | ) |
---|
| 626 | { |
---|
| 627 | int status; |
---|
[ac7d5ef0] | 628 | |
---|
[37f4c2d] | 629 | if (setjmp(currentp->regs) == 0) { /* Save the current context */ |
---|
| 630 | longjmp(nextp->regs, 0); /* Switch to the new context */ |
---|
[d196e48] | 631 | _Internal_error_Occurred( |
---|
[3652ad35] | 632 | INTERNAL_ERROR_CORE, |
---|
| 633 | TRUE, |
---|
| 634 | status |
---|
| 635 | ); |
---|
[637df35] | 636 | } |
---|
[ac7d5ef0] | 637 | } |
---|
[d196e48] | 638 | |
---|
[637df35] | 639 | /*PAGE |
---|
| 640 | * |
---|
| 641 | * _CPU_Save_float_context |
---|
| 642 | */ |
---|
[ac7d5ef0] | 643 | |
---|
| 644 | void _CPU_Save_float_context( |
---|
| 645 | Context_Control_fp *fp_context |
---|
| 646 | ) |
---|
| 647 | { |
---|
| 648 | } |
---|
| 649 | |
---|
[637df35] | 650 | /*PAGE |
---|
| 651 | * |
---|
| 652 | * _CPU_Restore_float_context |
---|
| 653 | */ |
---|
| 654 | |
---|
[ac7d5ef0] | 655 | void _CPU_Restore_float_context( |
---|
| 656 | Context_Control_fp *fp_context |
---|
| 657 | ) |
---|
| 658 | { |
---|
| 659 | } |
---|
| 660 | |
---|
[637df35] | 661 | /*PAGE |
---|
| 662 | * |
---|
| 663 | * _CPU_ISR_Disable_support |
---|
| 664 | */ |
---|
[ac7d5ef0] | 665 | |
---|
[637df35] | 666 | unsigned32 _CPU_ISR_Disable_support(void) |
---|
[ac7d5ef0] | 667 | { |
---|
[3652ad35] | 668 | int status; |
---|
[637df35] | 669 | sigset_t old_mask; |
---|
[ac7d5ef0] | 670 | |
---|
[d83c39dc] | 671 | sigemptyset( &old_mask ); |
---|
[3652ad35] | 672 | status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, &old_mask); |
---|
| 673 | if ( status ) |
---|
| 674 | _Internal_error_Occurred( |
---|
| 675 | INTERNAL_ERROR_CORE, |
---|
| 676 | TRUE, |
---|
| 677 | status |
---|
| 678 | ); |
---|
[ac7d5ef0] | 679 | |
---|
[3652ad35] | 680 | if (memcmp((void *)&posix_empty_mask, (void *)&old_mask, sizeof(sigset_t))) |
---|
[637df35] | 681 | return 1; |
---|
[ac7d5ef0] | 682 | |
---|
[637df35] | 683 | return 0; |
---|
[ac7d5ef0] | 684 | } |
---|
| 685 | |
---|
[637df35] | 686 | /*PAGE |
---|
| 687 | * |
---|
| 688 | * _CPU_ISR_Enable |
---|
| 689 | */ |
---|
[ac7d5ef0] | 690 | |
---|
[637df35] | 691 | void _CPU_ISR_Enable( |
---|
| 692 | unsigned32 level |
---|
| 693 | ) |
---|
[ac7d5ef0] | 694 | { |
---|
[3652ad35] | 695 | int status; |
---|
| 696 | |
---|
[637df35] | 697 | if (level == 0) |
---|
[3652ad35] | 698 | status = sigprocmask(SIG_UNBLOCK, &_CPU_Signal_mask, 0); |
---|
[637df35] | 699 | else |
---|
[3652ad35] | 700 | status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, 0); |
---|
| 701 | |
---|
| 702 | if ( status ) |
---|
| 703 | _Internal_error_Occurred( |
---|
| 704 | INTERNAL_ERROR_CORE, |
---|
| 705 | TRUE, |
---|
| 706 | status |
---|
| 707 | ); |
---|
[ac7d5ef0] | 708 | } |
---|
| 709 | |
---|
[637df35] | 710 | /*PAGE |
---|
[ac7d5ef0] | 711 | * |
---|
[637df35] | 712 | * _CPU_ISR_Handler |
---|
| 713 | * |
---|
| 714 | * External interrupt handler. |
---|
| 715 | * This is installed as a UNIX signal handler. |
---|
| 716 | * It vectors out to specific user interrupt handlers. |
---|
[ac7d5ef0] | 717 | */ |
---|
| 718 | |
---|
[637df35] | 719 | void _CPU_ISR_Handler(int vector) |
---|
[ac7d5ef0] | 720 | { |
---|
[637df35] | 721 | extern void _Thread_Dispatch(void); |
---|
| 722 | extern unsigned32 _Thread_Dispatch_disable_level; |
---|
| 723 | extern boolean _Context_Switch_necessary; |
---|
[ac7d5ef0] | 724 | |
---|
[637df35] | 725 | if (_ISR_Nest_level++ == 0) { |
---|
| 726 | /* switch to interrupt stack */ |
---|
| 727 | } |
---|
[ac7d5ef0] | 728 | |
---|
[637df35] | 729 | _Thread_Dispatch_disable_level++; |
---|
[ac7d5ef0] | 730 | |
---|
[637df35] | 731 | if (_ISR_Vector_table[vector]) { |
---|
| 732 | _ISR_Vector_table[vector](vector); |
---|
| 733 | } else { |
---|
| 734 | _CPU_Stray_signal(vector); |
---|
| 735 | } |
---|
[ac7d5ef0] | 736 | |
---|
[637df35] | 737 | if (_ISR_Nest_level-- == 0) { |
---|
| 738 | /* switch back to original stack */ |
---|
| 739 | } |
---|
[ac7d5ef0] | 740 | |
---|
[637df35] | 741 | _Thread_Dispatch_disable_level--; |
---|
[ac7d5ef0] | 742 | |
---|
[637df35] | 743 | if (_Thread_Dispatch_disable_level == 0 && |
---|
| 744 | (_Context_Switch_necessary || _ISR_Signals_to_thread_executing)) { |
---|
[8a38f3b] | 745 | _ISR_Signals_to_thread_executing = FALSE; |
---|
[637df35] | 746 | _CPU_ISR_Enable(0); |
---|
| 747 | _Thread_Dispatch(); |
---|
| 748 | } |
---|
[ac7d5ef0] | 749 | } |
---|
| 750 | |
---|
[637df35] | 751 | /*PAGE |
---|
| 752 | * |
---|
| 753 | * _CPU_Stray_signal |
---|
| 754 | */ |
---|
[ac7d5ef0] | 755 | |
---|
[637df35] | 756 | void _CPU_Stray_signal(int sig_num) |
---|
[ac7d5ef0] | 757 | { |
---|
[c64e4ed4] | 758 | char buffer[ 4 ]; |
---|
[d1193c7] | 759 | |
---|
[c64e4ed4] | 760 | /* |
---|
| 761 | * print "stray" msg about ones which that might mean something |
---|
| 762 | * Avoid using the stdio section of the library. |
---|
| 763 | * The following is generally safe. |
---|
[637df35] | 764 | */ |
---|
[d1193c7] | 765 | |
---|
[c64e4ed4] | 766 | switch (sig_num) |
---|
| 767 | { |
---|
[9a6994b4] | 768 | #ifdef SIGCLD |
---|
[c64e4ed4] | 769 | case SIGCLD: |
---|
| 770 | break; |
---|
[9a6994b4] | 771 | #endif |
---|
[c64e4ed4] | 772 | default: |
---|
| 773 | { |
---|
[cc4c1fe4] | 774 | /* |
---|
| 775 | * We avoid using the stdio section of the library. |
---|
| 776 | * The following is generally safe |
---|
| 777 | */ |
---|
[d1193c7] | 778 | |
---|
[cc4c1fe4] | 779 | int digit; |
---|
| 780 | int number = sig_num; |
---|
| 781 | int len = 0; |
---|
| 782 | |
---|
| 783 | digit = number / 100; |
---|
| 784 | number %= 100; |
---|
| 785 | if (digit) buffer[len++] = '0' + digit; |
---|
| 786 | |
---|
| 787 | digit = number / 10; |
---|
| 788 | number %= 10; |
---|
| 789 | if (digit || len) buffer[len++] = '0' + digit; |
---|
| 790 | |
---|
| 791 | digit = number; |
---|
| 792 | buffer[len++] = '0' + digit; |
---|
[d1193c7] | 793 | |
---|
[cc4c1fe4] | 794 | buffer[ len++ ] = '\n'; |
---|
[d1193c7] | 795 | |
---|
[cc4c1fe4] | 796 | write( 2, "Stray signal ", 13 ); |
---|
| 797 | write( 2, buffer, len ); |
---|
| 798 | |
---|
[c64e4ed4] | 799 | } |
---|
| 800 | } |
---|
[d1193c7] | 801 | |
---|
[637df35] | 802 | /* |
---|
| 803 | * If it was a "fatal" signal, then exit here |
---|
| 804 | * If app code has installed a hander for one of these, then |
---|
| 805 | * we won't call _CPU_Stray_signal, so this is ok. |
---|
| 806 | */ |
---|
[d1193c7] | 807 | |
---|
[637df35] | 808 | switch (sig_num) { |
---|
| 809 | case SIGINT: |
---|
| 810 | case SIGHUP: |
---|
| 811 | case SIGQUIT: |
---|
| 812 | case SIGILL: |
---|
[10aed1e3] | 813 | #ifdef SIGEMT |
---|
[637df35] | 814 | case SIGEMT: |
---|
[10aed1e3] | 815 | #endif |
---|
[637df35] | 816 | case SIGKILL: |
---|
| 817 | case SIGBUS: |
---|
| 818 | case SIGSEGV: |
---|
| 819 | case SIGTERM: |
---|
[0315b79b] | 820 | #if !defined(__CYGWIN__) |
---|
[d196e48] | 821 | case SIGIOT: |
---|
[0315b79b] | 822 | #endif |
---|
[cc4c1fe4] | 823 | _CPU_Fatal_error(0x100 + sig_num); |
---|
[637df35] | 824 | } |
---|
[ac7d5ef0] | 825 | } |
---|
| 826 | |
---|
[637df35] | 827 | /*PAGE |
---|
| 828 | * |
---|
| 829 | * _CPU_Fatal_error |
---|
| 830 | */ |
---|
[ac7d5ef0] | 831 | |
---|
[637df35] | 832 | void _CPU_Fatal_error(unsigned32 error) |
---|
[ac7d5ef0] | 833 | { |
---|
[637df35] | 834 | setitimer(ITIMER_REAL, 0, 0); |
---|
[ac7d5ef0] | 835 | |
---|
[e7e016f] | 836 | if ( error ) { |
---|
| 837 | #ifdef RTEMS_DEBUG |
---|
| 838 | abort(); |
---|
| 839 | #endif |
---|
| 840 | if (getenv("RTEMS_DEBUG")) |
---|
| 841 | abort(); |
---|
| 842 | } |
---|
| 843 | |
---|
[637df35] | 844 | _exit(error); |
---|
[ac7d5ef0] | 845 | } |
---|
| 846 | |
---|
[37f4c2d] | 847 | /* |
---|
| 848 | * Special Purpose Routines to hide the use of UNIX system calls. |
---|
| 849 | */ |
---|
| 850 | |
---|
[0a6fb22] | 851 | int _CPU_Set_sync_io_handler( |
---|
| 852 | int fd, |
---|
| 853 | boolean read, |
---|
| 854 | boolean write, |
---|
| 855 | boolean except, |
---|
| 856 | rtems_sync_io_handler handler |
---|
| 857 | ) |
---|
| 858 | { |
---|
| 859 | if ((fd < FD_SETSIZE) && (_CPU_Sync_io_handlers[fd] == NULL)) { |
---|
| 860 | if (read) |
---|
| 861 | FD_SET(fd, &sync_io_readfds); |
---|
| 862 | else |
---|
| 863 | FD_CLR(fd, &sync_io_readfds); |
---|
| 864 | if (write) |
---|
| 865 | FD_SET(fd, &sync_io_writefds); |
---|
| 866 | else |
---|
| 867 | FD_CLR(fd, &sync_io_writefds); |
---|
| 868 | if (except) |
---|
| 869 | FD_SET(fd, &sync_io_exceptfds); |
---|
| 870 | else |
---|
| 871 | FD_CLR(fd, &sync_io_exceptfds); |
---|
| 872 | _CPU_Sync_io_handlers[fd] = handler; |
---|
| 873 | if ((fd + 1) > sync_io_nfds) |
---|
| 874 | sync_io_nfds = fd + 1; |
---|
| 875 | return 0; |
---|
| 876 | } |
---|
| 877 | return -1; |
---|
| 878 | } |
---|
| 879 | |
---|
| 880 | int _CPU_Clear_sync_io_handler( |
---|
| 881 | int fd |
---|
| 882 | ) |
---|
| 883 | { |
---|
| 884 | if ((fd < FD_SETSIZE) && _CPU_Sync_io_handlers[fd]) { |
---|
| 885 | FD_CLR(fd, &sync_io_readfds); |
---|
| 886 | FD_CLR(fd, &sync_io_writefds); |
---|
| 887 | FD_CLR(fd, &sync_io_exceptfds); |
---|
| 888 | _CPU_Sync_io_handlers[fd] = NULL; |
---|
| 889 | sync_io_nfds = 0; |
---|
| 890 | for (fd = 0; fd < FD_SETSIZE; fd++) |
---|
| 891 | if (FD_ISSET(fd, &sync_io_readfds) || |
---|
| 892 | FD_ISSET(fd, &sync_io_writefds) || |
---|
| 893 | FD_ISSET(fd, &sync_io_exceptfds)) |
---|
[b4e3b2b] | 894 | sync_io_nfds = fd + 1; |
---|
[0a6fb22] | 895 | return 0; |
---|
| 896 | } |
---|
| 897 | return -1; |
---|
| 898 | } |
---|
| 899 | |
---|
[37f4c2d] | 900 | int _CPU_Get_clock_vector( void ) |
---|
| 901 | { |
---|
| 902 | return SIGALRM; |
---|
| 903 | } |
---|
| 904 | |
---|
[d1193c7] | 905 | void _CPU_Start_clock( |
---|
[37f4c2d] | 906 | int microseconds |
---|
| 907 | ) |
---|
| 908 | { |
---|
| 909 | struct itimerval new; |
---|
| 910 | |
---|
| 911 | new.it_value.tv_sec = 0; |
---|
| 912 | new.it_value.tv_usec = microseconds; |
---|
| 913 | new.it_interval.tv_sec = 0; |
---|
| 914 | new.it_interval.tv_usec = microseconds; |
---|
| 915 | |
---|
| 916 | setitimer(ITIMER_REAL, &new, 0); |
---|
| 917 | } |
---|
| 918 | |
---|
| 919 | void _CPU_Stop_clock( void ) |
---|
| 920 | { |
---|
| 921 | struct itimerval new; |
---|
| 922 | struct sigaction act; |
---|
[d1193c7] | 923 | |
---|
[37f4c2d] | 924 | /* |
---|
| 925 | * Set the SIGALRM signal to ignore any last |
---|
| 926 | * signals that might come in while we are |
---|
| 927 | * disarming the timer and removing the interrupt |
---|
| 928 | * vector. |
---|
| 929 | */ |
---|
[d1193c7] | 930 | |
---|
[cc4c1fe4] | 931 | (void) memset(&act, 0, sizeof(act)); |
---|
[37f4c2d] | 932 | act.sa_handler = SIG_IGN; |
---|
[d1193c7] | 933 | |
---|
[cc4c1fe4] | 934 | sigaction(SIGALRM, &act, 0); |
---|
[d1193c7] | 935 | |
---|
[cc4c1fe4] | 936 | (void) memset(&new, 0, sizeof(new)); |
---|
[37f4c2d] | 937 | setitimer(ITIMER_REAL, &new, 0); |
---|
| 938 | } |
---|
| 939 | |
---|
[c094542] | 940 | extern void fix_syscall_errno( void ); |
---|
| 941 | |
---|
| 942 | #if defined(RTEMS_MULTIPROCESSING) |
---|
[37f4c2d] | 943 | int _CPU_SHM_Semid; |
---|
| 944 | |
---|
[d1193c7] | 945 | void _CPU_SHM_Init( |
---|
[37f4c2d] | 946 | unsigned32 maximum_nodes, |
---|
| 947 | boolean is_master_node, |
---|
| 948 | void **shm_address, |
---|
| 949 | unsigned32 *shm_length |
---|
| 950 | ) |
---|
| 951 | { |
---|
| 952 | int i; |
---|
| 953 | int shmid; |
---|
| 954 | char *shm_addr; |
---|
| 955 | key_t shm_key; |
---|
| 956 | key_t sem_key; |
---|
[d6ba279] | 957 | int status = 0; /* to avoid unitialized warnings */ |
---|
[37f4c2d] | 958 | int shm_size; |
---|
[d1193c7] | 959 | |
---|
[37f4c2d] | 960 | if (getenv("RTEMS_SHM_KEY")) |
---|
| 961 | shm_key = strtol(getenv("RTEMS_SHM_KEY"), 0, 0); |
---|
| 962 | else |
---|
| 963 | #ifdef RTEMS_SHM_KEY |
---|
| 964 | shm_key = RTEMS_SHM_KEY; |
---|
| 965 | #else |
---|
| 966 | shm_key = 0xa000; |
---|
| 967 | #endif |
---|
[d1193c7] | 968 | |
---|
[37f4c2d] | 969 | if (getenv("RTEMS_SHM_SIZE")) |
---|
| 970 | shm_size = strtol(getenv("RTEMS_SHM_SIZE"), 0, 0); |
---|
| 971 | else |
---|
| 972 | #ifdef RTEMS_SHM_SIZE |
---|
| 973 | shm_size = RTEMS_SHM_SIZE; |
---|
| 974 | #else |
---|
| 975 | shm_size = 64 * 1024; |
---|
| 976 | #endif |
---|
[d1193c7] | 977 | |
---|
[37f4c2d] | 978 | if (getenv("RTEMS_SHM_SEMAPHORE_KEY")) |
---|
| 979 | sem_key = strtol(getenv("RTEMS_SHM_SEMAPHORE_KEY"), 0, 0); |
---|
| 980 | else |
---|
| 981 | #ifdef RTEMS_SHM_SEMAPHORE_KEY |
---|
| 982 | sem_key = RTEMS_SHM_SEMAPHORE_KEY; |
---|
| 983 | #else |
---|
| 984 | sem_key = 0xa001; |
---|
| 985 | #endif |
---|
[d1193c7] | 986 | |
---|
[37f4c2d] | 987 | shmid = shmget(shm_key, shm_size, IPC_CREAT | 0660); |
---|
| 988 | if ( shmid == -1 ) { |
---|
| 989 | fix_syscall_errno(); /* in case of newlib */ |
---|
| 990 | perror( "shmget" ); |
---|
| 991 | _CPU_Fatal_halt( 0xdead0001 ); |
---|
| 992 | } |
---|
[d1193c7] | 993 | |
---|
[37f4c2d] | 994 | shm_addr = shmat(shmid, (char *)0, SHM_RND); |
---|
| 995 | if ( shm_addr == (void *)-1 ) { |
---|
| 996 | fix_syscall_errno(); /* in case of newlib */ |
---|
| 997 | perror( "shmat" ); |
---|
| 998 | _CPU_Fatal_halt( 0xdead0002 ); |
---|
| 999 | } |
---|
[d1193c7] | 1000 | |
---|
[37f4c2d] | 1001 | _CPU_SHM_Semid = semget(sem_key, maximum_nodes + 1, IPC_CREAT | 0660); |
---|
| 1002 | if ( _CPU_SHM_Semid == -1 ) { |
---|
| 1003 | fix_syscall_errno(); /* in case of newlib */ |
---|
| 1004 | perror( "semget" ); |
---|
| 1005 | _CPU_Fatal_halt( 0xdead0003 ); |
---|
| 1006 | } |
---|
[d1193c7] | 1007 | |
---|
[37f4c2d] | 1008 | if ( is_master_node ) { |
---|
| 1009 | for ( i=0 ; i <= maximum_nodes ; i++ ) { |
---|
[ea562ee9] | 1010 | #if !HAS_UNION_SEMUN |
---|
[37f4c2d] | 1011 | union semun { |
---|
| 1012 | int val; |
---|
| 1013 | struct semid_ds *buf; |
---|
[ea562ee9] | 1014 | unsigned short int *array; |
---|
| 1015 | #if defined(__linux__) |
---|
| 1016 | struct seminfo *__buf; |
---|
| 1017 | #endif |
---|
| 1018 | } ; |
---|
| 1019 | #endif |
---|
| 1020 | union semun help ; |
---|
[3a85d03d] | 1021 | help.val = 1; |
---|
| 1022 | status = semctl( _CPU_SHM_Semid, i, SETVAL, help ); |
---|
[d1193c7] | 1023 | |
---|
[37f4c2d] | 1024 | fix_syscall_errno(); /* in case of newlib */ |
---|
| 1025 | if ( status == -1 ) { |
---|
| 1026 | _CPU_Fatal_halt( 0xdead0004 ); |
---|
| 1027 | } |
---|
| 1028 | } |
---|
| 1029 | } |
---|
[d1193c7] | 1030 | |
---|
[37f4c2d] | 1031 | *shm_address = shm_addr; |
---|
| 1032 | *shm_length = shm_size; |
---|
| 1033 | |
---|
| 1034 | } |
---|
[c094542] | 1035 | #endif |
---|
[37f4c2d] | 1036 | |
---|
| 1037 | int _CPU_Get_pid( void ) |
---|
| 1038 | { |
---|
| 1039 | return getpid(); |
---|
| 1040 | } |
---|
| 1041 | |
---|
[c094542] | 1042 | #if defined(RTEMS_MULTIPROCESSING) |
---|
[37f4c2d] | 1043 | /* |
---|
| 1044 | * Define this to use signals for MPCI shared memory driver. |
---|
| 1045 | * If undefined, the shared memory driver will poll from the |
---|
| 1046 | * clock interrupt. |
---|
| 1047 | * Ref: ../shmsupp/getcfg.c |
---|
| 1048 | * |
---|
| 1049 | * BEWARE:: many UN*X kernels and debuggers become severely confused when |
---|
| 1050 | * debugging programs which use signals. The problem is *much* |
---|
| 1051 | * worse when using multiple signals, since ptrace(2) tends to |
---|
| 1052 | * drop all signals except 1 in the case of multiples. |
---|
| 1053 | * On hpux9, this problem was so bad, we couldn't use interrupts |
---|
| 1054 | * with the shared memory driver if we ever hoped to debug |
---|
| 1055 | * RTEMS programs. |
---|
| 1056 | * Maybe systems that use /proc don't have this problem... |
---|
| 1057 | */ |
---|
[d1193c7] | 1058 | |
---|
| 1059 | |
---|
[37f4c2d] | 1060 | int _CPU_SHM_Get_vector( void ) |
---|
| 1061 | { |
---|
| 1062 | #ifdef CPU_USE_SHM_INTERRUPTS |
---|
| 1063 | return SIGUSR1; |
---|
| 1064 | #else |
---|
| 1065 | return 0; |
---|
| 1066 | #endif |
---|
| 1067 | } |
---|
| 1068 | |
---|
| 1069 | void _CPU_SHM_Send_interrupt( |
---|
| 1070 | int pid, |
---|
| 1071 | int vector |
---|
| 1072 | ) |
---|
| 1073 | { |
---|
| 1074 | kill((pid_t) pid, vector); |
---|
| 1075 | } |
---|
| 1076 | |
---|
[d1193c7] | 1077 | void _CPU_SHM_Lock( |
---|
[37f4c2d] | 1078 | int semaphore |
---|
| 1079 | ) |
---|
| 1080 | { |
---|
[0a6fb22] | 1081 | struct sembuf sb; |
---|
[d1193c7] | 1082 | |
---|
[37f4c2d] | 1083 | sb.sem_num = semaphore; |
---|
| 1084 | sb.sem_op = -1; |
---|
| 1085 | sb.sem_flg = 0; |
---|
[d1193c7] | 1086 | |
---|
[37f4c2d] | 1087 | while (1) { |
---|
[0a6fb22] | 1088 | int status = -1; |
---|
| 1089 | |
---|
[37f4c2d] | 1090 | status = semop(_CPU_SHM_Semid, &sb, 1); |
---|
| 1091 | if ( status >= 0 ) |
---|
| 1092 | break; |
---|
| 1093 | if ( status == -1 ) { |
---|
| 1094 | fix_syscall_errno(); /* in case of newlib */ |
---|
| 1095 | if (errno == EINTR) |
---|
| 1096 | continue; |
---|
| 1097 | perror("shm lock"); |
---|
| 1098 | _CPU_Fatal_halt( 0xdead0005 ); |
---|
| 1099 | } |
---|
| 1100 | } |
---|
| 1101 | |
---|
| 1102 | } |
---|
| 1103 | |
---|
| 1104 | void _CPU_SHM_Unlock( |
---|
| 1105 | int semaphore |
---|
| 1106 | ) |
---|
| 1107 | { |
---|
| 1108 | struct sembuf sb; |
---|
| 1109 | int status; |
---|
[d1193c7] | 1110 | |
---|
[37f4c2d] | 1111 | sb.sem_num = semaphore; |
---|
| 1112 | sb.sem_op = 1; |
---|
| 1113 | sb.sem_flg = 0; |
---|
[d1193c7] | 1114 | |
---|
[37f4c2d] | 1115 | while (1) { |
---|
| 1116 | status = semop(_CPU_SHM_Semid, &sb, 1); |
---|
| 1117 | if ( status >= 0 ) |
---|
| 1118 | break; |
---|
[d1193c7] | 1119 | |
---|
[37f4c2d] | 1120 | if ( status == -1 ) { |
---|
| 1121 | fix_syscall_errno(); /* in case of newlib */ |
---|
| 1122 | if (errno == EINTR) |
---|
| 1123 | continue; |
---|
| 1124 | perror("shm unlock"); |
---|
| 1125 | _CPU_Fatal_halt( 0xdead0006 ); |
---|
| 1126 | } |
---|
| 1127 | } |
---|
| 1128 | |
---|
| 1129 | } |
---|
[c094542] | 1130 | #endif |
---|