source: rtems/c/src/exec/score/cpu/sh/rtems/score/sh.h @ 7046cdd

4.104.114.84.95
Last change on this file since 7046cdd was 7046cdd, checked in by Joel Sherrill <joel.sherrill@…>, on 10/28/99 at 16:01:41

Patch rtems-rc-19991011-3.diff from Ralf Corsepius.

  • Property mode set to 100644
File size: 3.4 KB
Line 
1/*  sh.h
2 *
3 *  This include file contains information pertaining to the Hitachi SH
4 *  processor.
5 *
6 *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
7 *           Bernd Becker (becker@faw.uni-ulm.de)
8 *
9 *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
10 *
11 *  This program is distributed in the hope that it will be useful,
12 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE
14 *
15 *
16 *  COPYRIGHT (c) 1998.
17 *  On-Line Applications Research Corporation (OAR).
18 *  Copyright assigned to U.S. Government, 1994.
19 *
20 *  The license and distribution terms for this file may be
21 *  found in the file LICENSE in this distribution or at
22 *  http://www.OARcorp.com/rtems/license.html.
23 *
24 *  $Id$
25 */
26
27#ifndef _sh_h
28#define _sh_h
29
30#ifdef __cplusplus
31extern "C" {
32#endif
33
34/*
35 *  This file contains the information required to build
36 *  RTEMS for a particular member of the "SH" family.
37 * 
38 *  It does  this by setting variables to indicate which implementation
39 *  dependent features are present in a particular member of the family.
40 */
41 
42#if defined(sh7032)
43
44#define CPU_MODEL_NAME  "SH 7032"
45
46#define SH_HAS_FPU      0
47
48/*
49 * If the following macro is set to 0 there will be no software irq stack
50 */
51#define SH_HAS_SEPARATE_STACKS 1
52
53#else
54 
55#error "Unsupported CPU Model"
56 
57#endif
58
59/*
60 *  Define the name of the CPU family.
61 */
62
63#define CPU_NAME "Hitachi SH"
64
65#ifndef ASM
66
67/*
68 * Mask for disabling interrupts
69 */
70#define SH_IRQDIS_VALUE 0xf0
71
72#define sh_disable_interrupts( _level ) \
73  asm volatile ( \
74    "stc sr,%0\n\t" \
75    "ldc %1,sr\n\t"\
76  : "=r" (_level ) \
77  : "r" (SH_IRQDIS_VALUE) );
78
79#define sh_enable_interrupts( _level ) \
80  asm volatile( "ldc %0,sr\n\t" \
81    "nop\n\t" \
82    :: "r" (_level) );
83
84/*
85 *  This temporarily restores the interrupt to _level before immediately
86 *  disabling them again.  This is used to divide long RTEMS critical
87 *  sections into two or more parts.  The parameter _level is not
88 *  modified.
89 */
90     
91#define sh_flash_interrupts( _level ) \
92  asm volatile( \
93    "ldc %1,sr\n\t" \
94    "nop\n\t" \
95    "ldc %0,sr\n\t" \
96    "nop\n\t" \
97    : : "r" (SH_IRQDIS_VALUE), "r" (_level) );
98
99#define sh_get_interrupt_level( _level ) \
100{ \
101  register unsigned32 _tmpsr ; \
102  \
103  asm volatile( "stc sr, %0" : "=r" (_tmpsr) ); \
104  _level = (_tmpsr & 0xf0) >> 4 ; \
105}
106
107#define sh_set_interrupt_level( _newlevel ) \
108{ \
109  register unsigned32 _tmpsr; \
110  \
111  asm volatile ( "stc sr, %0" : "=r" (_tmpsr) ); \
112  _tmpsr = ( _tmpsr & ~0xf0 ) | ((_newlevel) << 4) ; \
113  asm  volatile( "ldc %0,sr" :: "r" (_tmpsr) ); \
114}
115
116/*
117 *  The following routine swaps the endian format of an unsigned int.
118 *  It must be static because it is referenced indirectly.
119 */
120 
121static inline unsigned int sh_swap_u32(
122  unsigned int value
123)
124{
125  register unsigned int swapped;
126 
127  asm volatile (
128    "swap.b %1,%0; "
129    "swap.w %0,%0; "
130    "swap.b %0,%0"
131    : "=r" (swapped)
132    : "r"  (value) );
133
134  return( swapped );
135}
136
137static inline unsigned int sh_swap_u16(
138  unsigned int value
139)
140{
141  register unsigned int swapped ;
142
143  asm volatile ( "swap.b %1,%0" : "=r" (swapped) : "r"  (value) );
144
145  return( swapped );
146}
147
148#define CPU_swap_u32( value ) sh_swap_u32( value )
149#define CPU_swap_u16( value ) sh_swap_u16( value )
150
151extern unsigned int sh_set_irq_priority(
152  unsigned int irq,
153  unsigned int prio );
154
155#endif /* !ASM */
156
157#ifdef __cplusplus
158}
159#endif
160
161#endif
Note: See TracBrowser for help on using the repository browser.