source: rtems/c/src/exec/score/cpu/no_cpu/cpu_asm.c @ 8a38f3b

4.104.114.84.95
Last change on this file since 8a38f3b was 8a38f3b, checked in by Joel Sherrill <joel.sherrill@…>, on Feb 9, 1996 at 2:21:37 PM

added clear of _ISR_Signals_to_thread_executing

  • Property mode set to 100644
File size: 4.8 KB
Line 
1/*  cpu_asm.c  ===> cpu_asm.S or cpu_asm.s
2 *
3 *  This file contains the basic algorithms for all assembly code used
4 *  in an specific CPU port of RTEMS.  These algorithms must be implemented
5 *  in assembly language
6 *
7 *  NOTE:  This is supposed to be a .S or .s file NOT a C file.
8 *
9 *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
10 *  On-Line Applications Research Corporation (OAR).
11 *  All rights assigned to U.S. Government, 1994.
12 *
13 *  This material may be reproduced by or for the U.S. Government pursuant
14 *  to the copyright license under the clause at DFARS 252.227-7013.  This
15 *  notice must appear in all copies of this file and its derivatives.
16 *
17 *  $Id$
18 */
19
20/*
21 *  This is supposed to be an assembly file.  This means that system.h
22 *  and cpu.h should not be included in a "real" cpu_asm file.  An
23 *  implementation in assembly should include "cpu_asm.h>
24 */
25
26#include <rtems/system.h>
27#include <rtems/score/cpu.h>
28/* #include "cpu_asm.h> */
29
30/*
31 *  _CPU_Context_save_fp_context
32 *
33 *  This routine is responsible for saving the FP context
34 *  at *fp_context_ptr.  If the point to load the FP context
35 *  from is changed then the pointer is modified by this routine.
36 *
37 *  Sometimes a macro implementation of this is in cpu.h which dereferences
38 *  the ** and a similarly named routine in this file is passed something
39 *  like a (Context_Control_fp *).  The general rule on making this decision
40 *  is to avoid writing assembly language.
41 */
42
43void _CPU_Context_save_fp(
44  void **fp_context_ptr
45)
46{
47}
48
49/*
50 *  _CPU_Context_restore_fp_context
51 *
52 *  This routine is responsible for restoring the FP context
53 *  at *fp_context_ptr.  If the point to load the FP context
54 *  from is changed then the pointer is modified by this routine.
55 *
56 *  Sometimes a macro implementation of this is in cpu.h which dereferences
57 *  the ** and a similarly named routine in this file is passed something
58 *  like a (Context_Control_fp *).  The general rule on making this decision
59 *  is to avoid writing assembly language.
60 */
61
62void _CPU_Context_restore_fp(
63  void **fp_context_ptr
64)
65{
66}
67
68/*  _CPU_Context_switch
69 *
70 *  This routine performs a normal non-FP context switch.
71 */
72
73void _CPU_Context_switch(
74  Context_Control  *run,
75  Context_Control  *heir
76)
77{
78}
79
80/*
81 *  _CPU_Context_restore
82 *
83 *  This routine is generallu used only to restart self in an
84 *  efficient manner.  It may simply be a label in _CPU_Context_switch.
85 *
86 *  NOTE: May be unnecessary to reload some registers.
87 */
88
89void _CPU_Context_restore(
90  Context_Control *new_context
91)
92{
93}
94
95/*  void __ISR_Handler()
96 *
97 *  This routine provides the RTEMS interrupt management.
98 *
99 */
100
101void _ISR_Handler()
102{
103   /*
104    *  This discussion ignores a lot of the ugly details in a real
105    *  implementation such as saving enough registers/state to be
106    *  able to do something real.  Keep in mind that the goal is
107    *  to invoke a user's ISR handler which is written in C and
108    *  uses a certain set of registers.
109    *
110    *  Also note that the exact order is to a large extent flexible.
111    *  Hardware will dictate a sequence for a certain subset of
112    *  _ISR_Handler while requirements for setting
113    */
114
115  /*
116   *  At entry to "common" _ISR_Handler, the vector number must be
117   *  available.  On some CPUs the hardware puts either the vector
118   *  number or the offset into the vector table for this ISR in a
119   *  known place.  If the hardware does not give us this information,
120   *  then the assembly portion of RTEMS for this port will contain
121   *  a set of distinct interrupt entry points which somehow place
122   *  the vector number in a known place (which is safe if another
123   *  interrupt nests this one) and branches to _ISR_Handler.
124   *
125   *  save some or all context on stack
126   *  may need to save some special interrupt information for exit
127   *
128   *  #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE )
129   *    if ( _ISR_Nest_level == 0 )
130   *      switch to software interrupt stack
131   *  #endif
132   *
133   *  _ISR_Nest_level++;
134   *
135   *  _Thread_Dispatch_disable_level++;
136   *
137   *  (*_ISR_Vector_table[ vector ])( vector );
138   *
139   *  --_ISR_Nest_level;
140   *
141   *  if ( _ISR_Nest_level )
142   *    goto the label "exit interrupt (simple case)"
143   *
144   *  #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE )
145   *    restore stack
146   *  #endif
147   * 
148   *  if ( !_Context_Switch_necessary )
149   *    goto the label "exit interrupt (simple case)"
150   * 
151   *  if ( !_ISR_Signals_to_thread_executing )
152   *    _ISR_Signals_to_thread_executing = FALSE;
153   *    goto the label "exit interrupt (simple case)"
154   *
155   *  call _Thread_Dispatch() or prepare to return to _ISR_Dispatch
156   *
157   *  prepare to get out of interrupt
158   *  return from interrupt  (maybe to _ISR_Dispatch)
159   *
160   *  LABEL "exit interrupt (simple case):
161   *  prepare to get out of interrupt
162   *  return from interrupt
163   */
164}
165
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