| 1 | 2001-12-20 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 2 | |
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| 3 | * configure.ac: Use RTEMS_ENV_RTEMSCPU. |
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| 4 | |
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| 5 | 2001-12-19 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 6 | |
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| 7 | * Makefile.am: Add multilib support. |
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| 8 | |
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| 9 | 2001-11-28 Joel Sherrill <joel@OARcorp.com>, |
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| 10 | |
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| 11 | This was tracked as PR91. |
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| 12 | * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which |
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| 13 | is used to specify if the port uses the standard macro for this (FALSE). |
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| 14 | A TRUE setting indicates the port provides its own implementation. |
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| 15 | |
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| 16 | 2001-10-12 Joel Sherrill <joel@OARcorp.com> |
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| 17 | |
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| 18 | * cpu_asm.S: _CPU_Context_save_fp in was incorrectly in conditional |
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| 19 | compilation block with (CPU_HARDWARE_FP == FALSE). Reported by |
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| 20 | Wayne Bullaughey <wayne@wmi.com>. |
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| 21 | |
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| 22 | 2001-10-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 23 | |
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| 24 | * .cvsignore: Add autom4te.cache for autoconf > 2.52. |
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| 25 | * configure.in: Remove. |
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| 26 | * configure.ac: New file, generated from configure.in by autoupdate. |
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| 27 | |
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| 28 | 2001-09-23 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 29 | |
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| 30 | * rtems/score/Makefile.am: Use 'PREINSTALL_FILES ='. |
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| 31 | * Makefile.am: Use 'PREINSTALL_FILES ='. |
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| 32 | |
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| 33 | 2001-07-03 Joel Sherrill <joel@OARcorp.com> |
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| 34 | |
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| 35 | * cpu.c: Fixed typo. |
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| 36 | |
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| 37 | 2000-05-24 Joel Sherrill <joel@OARcorp.com> |
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| 38 | |
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| 39 | * rtems/score/mips.h: Added constants for MIPS exception numbers. |
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| 40 | All exceptions should be given low numbers and thus can be installed |
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| 41 | and processed in a uniform manner. Variances between various MIPS |
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| 42 | ISA levels were not accounted for. |
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| 43 | |
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| 44 | 2001-05-24 Greg Menke <gregory.menke@gsfc.nasa.gov> |
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| 45 | |
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| 46 | * Assisted in design and debug by Joel Sherrill <joel@OARcorp.com>. |
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| 47 | * cpu_asm.S: Now works on Mongoose-V. Missed in previous patch. |
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| 48 | |
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| 49 | 2001-05-22 Greg Menke <gregory.menke@gsfc.nasa.gov> |
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| 50 | |
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| 51 | * rtems/score/cpu.h: Add the interrupt stack structure and enhance |
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| 52 | the context initialization to account for floating point tasks. |
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| 53 | * rtems/score/mips.h: Added the routines mips_set_cause(), |
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| 54 | mips_get_fcr31(), and mips_set_fcr31(). |
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| 55 | * Assisted in design and debug by Joel Sherrill <joel@OARcorp.com>. |
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| 56 | |
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| 57 | 2001-05-07 Joel Sherrill <joel@OARcorp.com> |
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| 58 | |
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| 59 | * cpu_asm.S: Merged patches from Gregory Menke |
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| 60 | <Gregory.D.Menke.1@gsfc.nasa.gov> that clean up |
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| 61 | stack usage and include nops in the delay slots. |
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| 62 | |
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| 63 | 2001-04-20 Joel Sherrill <joel@OARcorp.com> |
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| 64 | |
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| 65 | * cpu_asm.S: Added code to save and restore SR and EPC to |
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| 66 | properly support nested interrupts. Note that the ISR |
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| 67 | (not RTEMS) enables interrupts allowing the nesting to occur. |
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| 68 | |
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| 69 | 2001-03-14 Joel Sherrill <joel@OARcorp.com> |
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| 70 | |
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| 71 | * cpu.c, rtems/score/cpu.h, rtems/score/mipstypes.h: |
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| 72 | Removed unused variable _CPU_Thread_dispatch_pointer |
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| 73 | and cleaned numerous comments. |
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| 74 | |
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| 75 | 2001-03-13 Joel Sherrill <joel@OARcorp.com> |
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| 76 | |
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| 77 | * cpu.c, cpu_asm.S, iregdef.h, rtems/score/cpu.h, rtems/score/mips.h: |
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| 78 | Merged MIPS1 and MIPS3 code reducing the number of lines of assembly. |
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| 79 | Also reimplemented some assembly routines in C further reducing |
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| 80 | the amount of assembly and increasing maintainability. |
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| 81 | |
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| 82 | 2001-02-04 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 83 | |
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| 84 | * Makefile.am, rtems/score/Makefile.am: |
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| 85 | Apply include_*HEADERS instead of H_FILES. |
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| 86 | |
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| 87 | 2001-01-12 Joel Sherrill <joel@OARcorp.com> |
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| 88 | |
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| 89 | * rtems/score/mips.h (mips_get_sr, mips_set_sr): Corrected |
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| 90 | register constraints from "general" to "register". |
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| 91 | |
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| 92 | 2001-01-09 Joel Sherrill <joel@OARcorp.com> |
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| 93 | |
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| 94 | * cpu_asm.S: Use SR_INTERRUPT_ENABLE_BITS instead of SR_XXX constants |
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| 95 | to make it easier to conditionalize the code for various ISA levels. |
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| 96 | |
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| 97 | 2001-01-08 Joel Sherrill <joel@OARcorp.com> |
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| 98 | |
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| 99 | * idtcpu.h: Commented out definition of "wait". It was stupid to |
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| 100 | use such a common word as a macro. |
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| 101 | * rtems/score/cpu.h (_CPU_ISR_Disable): Fixed for mips ISA 3. |
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| 102 | * rtems/score/mips.h: Added include of <idtcpu.h>. |
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| 103 | * rtems/score/mips.h (mips_enable_in_interrupt_mask): Corrected. |
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| 104 | |
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| 105 | 2001-01-03 Joel Sherrill <joel@OARcorp.com> |
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| 106 | |
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| 107 | * rtems/score/cpu.h: Added _CPU_Initialize_vectors(). |
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| 108 | * cpu_asm.S: Eliminated warning for duplicate definition of EXTERN. |
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| 109 | |
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| 110 | 2000-12-19 Joel Sherrill <joel@OARcorp.com> |
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| 111 | |
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| 112 | * cpu_asm.S (_ISR_Handler): Return to the address in the EPC register. |
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| 113 | Previous code resulting in the interrupted immediately returning |
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| 114 | to the caller of the routine it was inside. |
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| 115 | |
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| 116 | 2000-12-19 Joel Sherrill <joel@OARcorp.com> |
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| 117 | |
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| 118 | * cpu.c (_CPU_Initialize): Do not initialize _ISR_Vector_table() here |
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| 119 | because it has not been allocated yet. |
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| 120 | |
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| 121 | 2000-12-13 Joel Sherrill <joel@OARcorp.com> |
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| 122 | |
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| 123 | * cpu.c: Removed duplicate declaration for _ISR_Vector_table. |
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| 124 | * cpu_asm.S: Removed assembly language to vector ISR handler |
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| 125 | on MIPS ISA I. Now call mips_vector_isr_handlers() in libcpu or BSP. |
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| 126 | * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): No |
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| 127 | longer a constant -- get the real value from libcpu. |
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| 128 | |
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| 129 | 2000-12-13 Joel Sherrill <joel@OARcorp.com> |
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| 130 | |
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| 131 | * cpu_asm.h: Removed. |
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| 132 | * Makefile.am: Remove cpu_asm.h. |
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| 133 | * rtems/score/mips64orion.h: Renamed mips.h. |
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| 134 | * rtems/score/mips.h: New file, formerly mips64orion.h. |
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| 135 | Header rewritten. |
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| 136 | (mips_get_sr, mips_set_sr, mips_enable_in_interrupt_mask, |
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| 137 | mips_disable_in_interrupt_mask): New macros. |
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| 138 | * rtems/score/Makefile.am: Reflect renaming mips64orion.h. |
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| 139 | * asm.h: Include <mips.h> not <mips64orion.h>. Now includes the |
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| 140 | few defines that were in <cpu_asm.h>. |
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| 141 | * cpu.c (_CPU_ISR_Get_level): Added MIPS ISA I version of this routine. |
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| 142 | MIPS ISA 3 is still in assembly for now. |
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| 143 | (_CPU_Thread_Idle_body): Rewrote in C. |
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| 144 | * cpu_asm.S: Rewrote file header. |
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| 145 | (FRAME,ENDFRAME) now in asm.h. |
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| 146 | (_CPU_ISR_Get_level): Removed ISA I version and rewrote in C. |
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| 147 | (_CPU_ISR_Set_level): Removed ISA I version and rewrote in C. |
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| 148 | (_CPU_Context_switch): MIPS ISA I now manages preserves SR_IEC and |
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| 149 | leaves other bits in SR alone on task switch. |
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| 150 | (mips_enable_interrupts,mips_disable_interrupts, |
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| 151 | mips_enable_global_interrupts,mips_disable_global_interrupts, |
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| 152 | disable_int, enable_int): Removed. |
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| 153 | (mips_get_sr): Rewritten as C macro. |
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| 154 | (_CPU_Thread_Idle_body): Rewritten in C. |
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| 155 | (init_exc_vecs): Rewritten in C as mips_install_isr_entries() and |
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| 156 | placed in libcpu. |
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| 157 | (exc_tlb_code, exc_xtlb_code, exc_cache_code, exc_norm_code): Moved |
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| 158 | to libcpu/mips/shared/interrupts. |
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| 159 | (general): Cleaned up comment blocks and #if 0 areas. |
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| 160 | * idtcpu.h: Made ifdef report an error. |
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| 161 | * iregdef.h: Removed warning. |
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| 162 | * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): Now a variable |
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| 163 | number defined by libcpu. |
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| 164 | (_CPU_ISR_Disable, _CPU_ISR_Enable): Rewritten to use new routines |
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| 165 | to access SR. |
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| 166 | (_CPU_ISR_Set_level): Rewritten as macro for ISA I. |
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| 167 | (_CPU_Context_Initialize): Honor ISR level in task initialization. |
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| 168 | (_CPU_Fatal_halt): Use new _CPU_ISR_Disable() macro. |
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| 169 | |
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| 170 | 2000-12-06 Joel Sherrill <joel@OARcorp.com> |
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| 171 | |
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| 172 | * rtems/score/cpu.h: When mips ISA level is 1, registers in the |
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| 173 | context should be 32 not 64 bits. |
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| 174 | |
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| 175 | 2000-11-30 Joel Sherrill <joel@OARcorp.com> |
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| 176 | |
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| 177 | * cpu_asm.S: Changed "_CPU_Ccontext_switch_restore: typo to |
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| 178 | correct name of _CPU_Context_switch_restore. Added dummy |
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| 179 | version of exc_utlb_code() so applications would link. |
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| 180 | |
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| 181 | 2000-11-09 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 182 | |
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| 183 | * Makefile.am: Use ... instead of RTEMS_TOPdir in ACLOCAL_AMFLAGS. |
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| 184 | |
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| 185 | 2000-11-02 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 186 | |
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| 187 | * Makefile.am: Switch to ACLOCAL_AMFLAGS = -I $(RTEMS_TOPdir)/aclocal. |
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| 188 | |
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| 189 | 2000-10-25 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 190 | |
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| 191 | * Makefile.am: ACLOCAL_AMFLAGS= -I $(RTEMS_TOPdir)/macros. |
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| 192 | Switch to GNU canonicalization. |
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| 193 | |
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| 194 | 2000-10-24 Alan Cudmore <alanc@linuxstart.com> and |
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| 195 | Joel Sherrill <joel@OARcorp.com> |
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| 196 | |
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| 197 | * This is a major reworking of the mips64orion port to use |
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| 198 | gcc predefines as much as possible and a big push to multilib |
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| 199 | the mips port. The mips64orion port was copied/renamed to mips |
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| 200 | to be more like other GNU tools. Alan did most of the technical |
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| 201 | work of determining how to map old macro names used by the mips64orion |
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| 202 | port to standard compiler macro definitions. Joel did the merge |
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| 203 | with CVS magic to keep individual file history and did the BSP |
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| 204 | modifications. Details follow: |
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| 205 | * Makefile.am: idtmon.h in mips64orion port not present. |
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| 206 | * asm.h: MIPS64ORION replaced with MIPS. Frame setup macros added. |
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| 207 | * cpu.c: Comments added. |
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| 208 | * cpu_asm.S: Conditionals changed. MIPS ISA level 1 support added. |
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| 209 | First attempt at exception/interrupt processing for ISA level 1 |
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| 210 | and minus any use of IDT/MON added. |
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| 211 | * idtcpu.h: Conditionals changed to use gcc predefines. |
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| 212 | * iregdef.h: Ditto. |
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| 213 | * cpu_asm.h: No real change. Merger required commit. |
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| 214 | * rtems/Makefile.am: Ditto. |
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| 215 | * rtems/score/Makefile.am: Ditto. |
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| 216 | * rtems/score/cpu.h: Change MIPS64ORION to MIPS. |
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| 217 | * rtems/score/mips64orion.h: Change MIPS64ORION to MIPS. Convert |
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| 218 | from using RTEMS_CPU_MODEL to gcc predefines to figre things out. |
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| 219 | |
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| 220 | 2000-09-04 Ralf Corsepius <corsepiu@faw.uni-ulm.de> |
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| 221 | |
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| 222 | * Makefile.am: Include compile.am. |
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| 223 | |
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| 224 | 2000-08-10 Joel Sherrill <joel@OARcorp.com> |
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| 225 | |
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| 226 | * ChangeLog: New file. |
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