source: rtems/c/src/exec/score/cpu/mips/ChangeLog @ c556d0ba

4.104.114.84.95
Last change on this file since c556d0ba was c556d0ba, checked in by Joel Sherrill <joel.sherrill@…>, on May 7, 2001 at 1:06:56 PM

2001-05-07 Joel Sherrill <joel@…>

  • cpu_asm.S: Merged patches from Gregory Menke <Gregory.D.Menke.1@…> that clean up stack usage and include nops in the delay slots.
  • Property mode set to 100644
File size: 6.6 KB
Line 
12001-05-07      Joel Sherrill <joel@OARcorp.com>
2
3        * cpu_asm.S: Merged patches from Gregory Menke
4        <Gregory.D.Menke.1@gsfc.nasa.gov> that clean up
5        stack usage and include nops in the delay slots.
6
72001-04-20      Joel Sherrill <joel@OARcorp.com>
8
9        * cpu_asm.S: Added code to save and restore SR and EPC to
10        properly support nested interrupts.  Note that the ISR
11        (not RTEMS) enables interrupts allowing the nesting to occur.
12
132001-03-14      Joel Sherrill <joel@OARcorp.com>
14
15        * cpu.c, rtems/score/cpu.h, rtems/score/mipstypes.h:
16        Removed unused variable _CPU_Thread_dispatch_pointer
17        and cleaned numerous comments.
18       
192001-03-13      Joel Sherrill <joel@OARcorp.com>
20
21        * cpu.c, cpu_asm.S, iregdef.h, rtems/score/cpu.h, rtems/score/mips.h:
22        Merged MIPS1 and MIPS3 code reducing the number of lines of assembly.
23        Also reimplemented some assembly routines in C further reducing
24        the amount of assembly and increasing maintainability.
25
262001-02-04      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
27
28        * Makefile.am, rtems/score/Makefile.am:
29        Apply include_*HEADERS instead of H_FILES.
30
312001-01-12      Joel Sherrill <joel@OARcorp.com>
32
33        * rtems/score/mips.h (mips_get_sr, mips_set_sr): Corrected
34        register constraints from "general" to "register".
35
362001-01-09      Joel Sherrill <joel@OARcorp.com>
37
38        * cpu_asm.S: Use SR_INTERRUPT_ENABLE_BITS instead of SR_XXX constants
39        to make it easier to conditionalize the code for various ISA levels.
40
412001-01-08      Joel Sherrill <joel@OARcorp.com>
42
43        * idtcpu.h: Commented out definition of "wait".  It was stupid to
44        use such a common word as a macro.
45        * rtems/score/cpu.h (_CPU_ISR_Disable): Fixed for mips ISA 3.
46        * rtems/score/mips.h: Added include of <idtcpu.h>.
47        * rtems/score/mips.h (mips_enable_in_interrupt_mask): Corrected.
48
492001-01-03      Joel Sherrill <joel@OARcorp.com>
50
51        * rtems/score/cpu.h: Added _CPU_Initialize_vectors().
52        * cpu_asm.S: Eliminated warning for duplicate definition of EXTERN.
53
542000-12-19      Joel Sherrill <joel@OARcorp.com>
55
56        * cpu_asm.S (_ISR_Handler): Return to the address in the EPC register.
57        Previous code resulting in the interrupted immediately returning
58        to the caller of the routine it was inside.
59
602000-12-19      Joel Sherrill <joel@OARcorp.com>
61
62        * cpu.c (_CPU_Initialize): Do not initialize _ISR_Vector_table() here
63        because it has not been allocated yet.
64
652000-12-13      Joel Sherrill <joel@OARcorp.com>
66
67        * cpu.c: Removed duplicate declaration for _ISR_Vector_table.
68        * cpu_asm.S: Removed assembly language to vector ISR handler
69        on MIPS ISA I.  Now call mips_vector_isr_handlers() in libcpu or BSP.
70        * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): No
71        longer a constant -- get the real value from libcpu.
72
732000-12-13      Joel Sherrill <joel@OARcorp.com>
74
75        * cpu_asm.h: Removed.
76        * Makefile.am: Remove cpu_asm.h.
77        * rtems/score/mips64orion.h: Renamed mips.h.
78        * rtems/score/mips.h: New file, formerly mips64orion.h.
79        Header rewritten.
80        (mips_get_sr, mips_set_sr, mips_enable_in_interrupt_mask,
81        mips_disable_in_interrupt_mask): New macros.
82        * rtems/score/Makefile.am: Reflect renaming mips64orion.h.
83        * asm.h: Include <mips.h> not <mips64orion.h>. Now includes the
84        few defines that were in <cpu_asm.h>.
85        * cpu.c (_CPU_ISR_Get_level): Added MIPS ISA I version of this routine.
86        MIPS ISA 3 is still in assembly for now.
87        (_CPU_Thread_Idle_body): Rewrote in C.
88        * cpu_asm.S: Rewrote file header.
89        (FRAME,ENDFRAME) now in asm.h.
90        (_CPU_ISR_Get_level): Removed ISA I version and rewrote in C.
91        (_CPU_ISR_Set_level): Removed ISA I version and rewrote in C.
92        (_CPU_Context_switch): MIPS ISA I now manages preserves SR_IEC and
93        leaves other bits in SR alone on task switch.
94        (mips_enable_interrupts,mips_disable_interrupts,
95        mips_enable_global_interrupts,mips_disable_global_interrupts,
96        disable_int, enable_int): Removed.
97        (mips_get_sr): Rewritten as C macro.
98        (_CPU_Thread_Idle_body): Rewritten in C.
99        (init_exc_vecs): Rewritten in C as mips_install_isr_entries() and
100        placed in libcpu.
101        (exc_tlb_code, exc_xtlb_code, exc_cache_code, exc_norm_code): Moved
102        to libcpu/mips/shared/interrupts.
103        (general): Cleaned up comment blocks and #if 0 areas.
104        * idtcpu.h: Made ifdef report an error.
105        * iregdef.h: Removed warning.
106        * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): Now a variable
107        number defined by libcpu.
108        (_CPU_ISR_Disable, _CPU_ISR_Enable): Rewritten to use new routines
109        to access SR.
110        (_CPU_ISR_Set_level): Rewritten as macro for ISA I.
111        (_CPU_Context_Initialize): Honor ISR level in task initialization.
112        (_CPU_Fatal_halt): Use new _CPU_ISR_Disable() macro.
113
1142000-12-06      Joel Sherrill <joel@OARcorp.com>
115
116        * rtems/score/cpu.h: When mips ISA level is 1, registers in the
117        context should be 32 not 64 bits.
118
1192000-11-30      Joel Sherrill <joel@OARcorp.com>
120
121        * cpu_asm.S: Changed "_CPU_Ccontext_switch_restore: typo to
122        correct name of _CPU_Context_switch_restore.  Added dummy
123        version of exc_utlb_code() so applications would link.
124
1252000-11-09      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
126
127        * Makefile.am: Use ... instead of RTEMS_TOPdir in ACLOCAL_AMFLAGS.
128
1292000-11-02      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
130
131        * Makefile.am: Switch to ACLOCAL_AMFLAGS = -I $(RTEMS_TOPdir)/aclocal.
132
1332000-10-25      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
134
135        * Makefile.am: ACLOCAL_AMFLAGS= -I $(RTEMS_TOPdir)/macros.
136        Switch to GNU canonicalization.
137
1382000-10-24      Alan Cudmore <alanc@linuxstart.com> and
139        Joel Sherrill <joel@OARcorp.com>
140
141        * This is a major reworking of the mips64orion port to use
142        gcc predefines as much as possible and a big push to multilib
143        the mips port.  The mips64orion port was copied/renamed to mips
144        to be more like other GNU tools.  Alan did most of the technical
145        work of determining how to map old macro names used by the mips64orion
146        port to standard compiler macro definitions.  Joel did the merge
147        with CVS magic to keep individual file history and did the BSP
148        modifications. Details follow:
149        * Makefile.am: idtmon.h in mips64orion port not present.
150        * asm.h: MIPS64ORION replaced with MIPS. Frame setup macros added.
151        * cpu.c: Comments added.
152        * cpu_asm.S: Conditionals changed.  MIPS ISA level 1 support added.
153        First attempt at exception/interrupt processing for ISA level 1
154        and minus any use of IDT/MON added.
155        * idtcpu.h: Conditionals changed to use gcc predefines.
156        * iregdef.h: Ditto.
157        * cpu_asm.h: No real change.  Merger required commit.
158        * rtems/Makefile.am: Ditto.
159        * rtems/score/Makefile.am: Ditto.
160        * rtems/score/cpu.h: Change MIPS64ORION to MIPS.
161        * rtems/score/mips64orion.h: Change MIPS64ORION to MIPS.  Convert
162        from using RTEMS_CPU_MODEL to gcc predefines to figre things out.
163
1642000-09-04      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
165
166        * Makefile.am: Include compile.am.
167
1682000-08-10      Joel Sherrill <joel@OARcorp.com>
169
170        * ChangeLog: New file.
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