1 | /* m68k.h |
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2 | * |
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3 | * This include file contains information pertaining to the Motorola |
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4 | * m68xxx processor family. |
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5 | * |
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6 | * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. |
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7 | * On-Line Applications Research Corporation (OAR). |
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8 | * All rights assigned to U.S. Government, 1994. |
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9 | * |
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10 | * This material may be reproduced by or for the U.S. Government pursuant |
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11 | * to the copyright license under the clause at DFARS 252.227-7013. This |
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12 | * notice must appear in all copies of this file and its derivatives. |
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13 | * |
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14 | * $Id$ |
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15 | */ |
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16 | |
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17 | #ifndef __M68k_h |
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18 | #define __M68k_h |
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19 | |
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20 | #ifdef __cplusplus |
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21 | extern "C" { |
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22 | #endif |
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23 | |
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24 | /* |
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25 | * The following define the CPU Family and Model within the family |
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26 | * |
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27 | * NOTE: The string "REPLACE_THIS_WITH_THE_CPU_MODEL" is replaced |
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28 | * with the name of the appropriate macro for this target CPU. |
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29 | */ |
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30 | |
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31 | #ifdef m68k |
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32 | #undef m68k |
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33 | #endif |
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34 | #define m68k |
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35 | |
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36 | #ifdef REPLACE_THIS_WITH_THE_CPU_MODEL |
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37 | #undef REPLACE_THIS_WITH_THE_CPU_MODEL |
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38 | #endif |
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39 | #define REPLACE_THIS_WITH_THE_CPU_MODEL |
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40 | |
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41 | #ifdef REPLACE_THIS_WITH_THE_BSP |
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42 | #undef REPLACE_THIS_WITH_THE_BSP |
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43 | #endif |
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44 | #define REPLACE_THIS_WITH_THE_BSP |
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45 | |
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46 | /* |
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47 | * This section contains the information required to build |
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48 | * RTEMS for a particular member of the Motorola MC68xxx |
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49 | * family. It does this by setting variables to indicate |
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50 | * which implementation dependent features are present in |
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51 | * a particular member of the family. |
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52 | * |
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53 | * Currently recognized: |
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54 | * m68000 (no FP) |
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55 | * m68020 (implies FP) |
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56 | * m68020_nofp (no FP) |
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57 | * m68030 (implies FP) |
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58 | * m68040 (implies FP) |
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59 | * m68lc040 (no FP) |
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60 | * m68ec040 (no FP) |
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61 | * |
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62 | * Primary difference (for RTEMS) between m68040, m680lc040, and |
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63 | * m68ec040 is the presence or abscense of the FPU. |
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64 | * |
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65 | * Here is some information on the 040 variants (courtesy of Doug McBride, |
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66 | * mcbride@rodin.colorado.edu): |
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67 | * |
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68 | * "The 68040 is a superset of the 68EC040 and the 68LC040. The |
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69 | * 68EC040 and 68LC040 do not have FPU's. The 68LC040 and the |
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70 | * 68EC040 have renamed the DLE pin as JS0 which must be tied to |
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71 | * Gnd or Vcc. The 68EC040 has renamed the MDIS pin as JS1. The |
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72 | * 68EC040 has access control units instead of memory management units. |
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73 | * The 68EC040 should not have the PFLUSH or PTEST instructions executed |
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74 | * (cause an indeterminate result). The 68EC040 and 68LC040 do not |
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75 | * implement the DLE or multiplexed bus modes. The 68EC040 does not |
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76 | * implement the output buffer impedance selection mode of operation." |
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77 | */ |
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78 | |
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79 | #if defined(m68000) |
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80 | |
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81 | #define RTEMS_MODEL_NAME "m68000" |
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82 | #define M68K_HAS_VBR 0 |
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83 | #define M68K_HAS_SEPARATE_STACKS 0 |
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84 | #define M68K_HAS_FPU 0 |
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85 | #define M68K_HAS_BFFFO 0 |
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86 | #define M68K_HAS_PREINDEXING 0 |
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87 | |
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88 | #elif defined(m68020) |
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89 | |
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90 | #define RTEMS_MODEL_NAME "m68020" |
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91 | #define M68K_HAS_VBR 1 |
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92 | #define M68K_HAS_SEPARATE_STACKS 1 |
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93 | #define M68K_HAS_FPU 1 |
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94 | #define M68K_HAS_BFFFO 1 |
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95 | #define M68K_HAS_PREINDEXING 1 |
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96 | |
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97 | #elif defined(m68020_nofp) |
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98 | |
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99 | #define RTEMS_MODEL_NAME "m68020 w/o fp" |
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100 | #define M68K_HAS_VBR 1 |
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101 | #define M68K_HAS_SEPARATE_STACKS 1 |
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102 | #define M68K_HAS_FPU 0 |
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103 | #define M68K_HAS_BFFFO 1 |
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104 | #define M68K_HAS_PREINDEXING 1 |
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105 | |
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106 | #elif defined(m68030) |
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107 | |
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108 | #define RTEMS_MODEL_NAME "m68030" |
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109 | #define M68K_HAS_VBR 1 |
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110 | #define M68K_HAS_SEPARATE_STACKS 1 |
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111 | #define M68K_HAS_FPU 1 |
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112 | #define M68K_HAS_BFFFO 1 |
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113 | #define M68K_HAS_PREINDEXING 1 |
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114 | |
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115 | #elif defined(m68040) |
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116 | |
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117 | #define RTEMS_MODEL_NAME "m68040" |
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118 | #define M68K_HAS_VBR 1 |
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119 | #define M68K_HAS_SEPARATE_STACKS 1 |
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120 | #define M68K_HAS_FPU 1 |
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121 | #define M68K_HAS_BFFFO 1 |
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122 | #define M68K_HAS_PREINDEXING 1 |
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123 | |
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124 | #elif defined(m68lc040) |
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125 | |
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126 | #define RTEMS_MODEL_NAME "m68lc040" |
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127 | #define M68K_HAS_VBR 1 |
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128 | #define M68K_HAS_SEPARATE_STACKS 1 |
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129 | #define M68K_HAS_FPU 0 |
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130 | #define M68K_HAS_BFFFO 1 |
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131 | #define M68K_HAS_PREINDEXING 1 |
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132 | |
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133 | #elif defined(m68ec040) |
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134 | |
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135 | #define RTEMS_MODEL_NAME "m68ec040" |
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136 | #define M68K_HAS_VBR 1 |
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137 | #define M68K_HAS_SEPARATE_STACKS 1 |
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138 | #define M68K_HAS_FPU 0 |
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139 | #define M68K_HAS_BFFFO 1 |
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140 | #define M68K_HAS_PREINDEXING 1 |
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141 | |
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142 | #elif defined(m68332) |
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143 | |
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144 | #define RTEMS_MODEL_NAME "m68332" |
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145 | #define M68K_HAS_VBR 1 |
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146 | #define M68K_HAS_SEPARATE_STACKS 0 |
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147 | #define M68K_HAS_FPU 0 |
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148 | #define M68K_HAS_BFFFO 0 |
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149 | #define M68K_HAS_PREINDEXING 0 |
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150 | |
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151 | #else |
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152 | |
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153 | #error "Unsupported CPU Model" |
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154 | |
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155 | #endif |
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156 | |
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157 | /* |
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158 | * If defined, this causes some of the macros to initialize their |
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159 | * variables to zero before doing inline assembly. This gets rid |
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160 | * of compile time warnings at the cost of a little execution time |
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161 | * in some time critical routines. |
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162 | */ |
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163 | |
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164 | #define NO_UNINITIALIZED_WARNINGS |
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165 | |
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166 | /* |
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167 | * Define the name of the CPU family. |
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168 | */ |
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169 | |
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170 | #define CPU_NAME "Motorola MC68xxx" |
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171 | |
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172 | #ifndef ASM |
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173 | |
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174 | #ifdef NO_UNINITIALIZED_WARNINGS |
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175 | #define m68k_disable_interrupts( _level ) \ |
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176 | { \ |
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177 | (_level) = 0; /* avoids warnings */ \ |
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178 | asm volatile ( "movew %%sr,%0 ; \ |
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179 | orw #0x0700,%%sr" \ |
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180 | : "=d" ((_level)) : "0" ((_level)) \ |
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181 | ); \ |
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182 | } |
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183 | #else |
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184 | #define m68k_disable_interrupts( _level ) \ |
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185 | { \ |
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186 | asm volatile ( "movew %%sr,%0 ; \ |
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187 | orw #0x0700,%%sr" \ |
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188 | : "=d" ((_level)) : "0" ((_level)) \ |
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189 | ); \ |
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190 | } |
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191 | #endif |
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192 | |
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193 | #define m68k_enable_interrupts( _level ) \ |
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194 | { \ |
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195 | asm volatile ( "movew %0,%%sr " \ |
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196 | : "=d" ((_level)) : "0" ((_level)) \ |
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197 | ); \ |
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198 | } |
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199 | |
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200 | #define m68k_flash_interrupts( _level ) \ |
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201 | { \ |
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202 | asm volatile ( "movew %0,%%sr ; \ |
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203 | orw #0x0700,%%sr" \ |
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204 | : "=d" ((_level)) : "0" ((_level)) \ |
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205 | ); \ |
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206 | } |
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207 | |
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208 | #define m68k_get_interrupt_level( _level ) \ |
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209 | do { \ |
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210 | register unsigned32 _tmpsr = 0; \ |
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211 | \ |
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212 | asm volatile( "movw %%sr,%0" \ |
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213 | : "=d" (_tmpsr) : "0" (_tmpsr) \ |
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214 | ); \ |
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215 | \ |
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216 | _level = (_tmpsr & 0x0700) >> 8; \ |
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217 | } while (0) |
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218 | |
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219 | #define m68k_set_interrupt_level( _newlevel ) \ |
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220 | { \ |
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221 | register unsigned32 _tmpsr = 0; \ |
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222 | \ |
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223 | asm volatile( "movw %%sr,%0" \ |
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224 | : "=d" (_tmpsr) : "0" (_tmpsr) \ |
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225 | ); \ |
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226 | \ |
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227 | _tmpsr = (_tmpsr & 0xf8ff) | ((_newlevel) << 8); \ |
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228 | \ |
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229 | asm volatile( "movw %0,%%sr" \ |
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230 | : "=d" (_tmpsr) : "0" (_tmpsr) \ |
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231 | ); \ |
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232 | } |
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233 | |
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234 | #if ( M68K_HAS_VBR == 1 ) |
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235 | #define m68k_get_vbr( vbr ) \ |
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236 | { (vbr) = 0; \ |
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237 | asm volatile ( "movec %%vbr,%0 " \ |
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238 | : "=r" (vbr) : "0" (vbr) ); \ |
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239 | } |
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240 | |
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241 | #define m68k_set_vbr( vbr ) \ |
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242 | { register m68k_isr *_vbr= (m68k_isr *)(vbr); \ |
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243 | asm volatile ( "movec %0,%%vbr " \ |
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244 | : "=a" (_vbr) : "0" (_vbr) ); \ |
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245 | } |
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246 | #else |
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247 | #define m68k_get_vbr( _vbr ) _vbr = (void *)_VBR |
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248 | #define m68k_set_vbr( _vbr ) |
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249 | #endif |
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250 | |
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251 | /* |
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252 | * The following routine swaps the endian format of an unsigned int. |
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253 | * It must be static because it is referenced indirectly. |
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254 | */ |
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255 | |
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256 | static inline unsigned int m68k_swap_u32( |
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257 | unsigned int value |
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258 | ) |
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259 | { |
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260 | unsigned int swapped = value; |
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261 | |
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262 | asm volatile( "rorw #8,%0" : "=d" (swapped) : "0" (swapped) ); |
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263 | asm volatile( "swap %0" : "=d" (swapped) : "0" (swapped) ); |
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264 | asm volatile( "rorw #8,%0" : "=d" (swapped) : "0" (swapped) ); |
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265 | |
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266 | return( swapped ); |
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267 | } |
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268 | |
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269 | /* XXX this is only valid for some m68k family members and should be fixed */ |
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270 | |
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271 | #define m68k_enable_caching() \ |
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272 | { register unsigned32 _ctl=0x01; \ |
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273 | asm volatile ( "movec %0,%%cacr" \ |
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274 | : "=d" (_ctl) : "0" (_ctl) ); \ |
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275 | } |
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276 | |
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277 | #define CPU_swap_u32( value ) m68k_swap_u32( value ) |
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278 | |
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279 | #ifdef __cplusplus |
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280 | } |
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281 | #endif |
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282 | |
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283 | #endif /* !ASM */ |
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284 | |
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285 | #endif |
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286 | /* end of include file */ |
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