source: rtems/c/src/exec/score/cpu/m68k/m68k.h @ 110f4ff7

4.104.114.84.95
Last change on this file since 110f4ff7 was 110f4ff7, checked in by Joel Sherrill <joel.sherrill@…>, on Mar 6, 1996 at 10:23:56 PM

Added 68360 support submitted by W. Eric Norum (eric@…).
Also increased minimum stack size from 1K to 2K.

  • Property mode set to 100644
File size: 7.7 KB
Line 
1/*  m68k.h
2 *
3 *  This include file contains information pertaining to the Motorola
4 *  m68xxx processor family.
5 *
6 *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
7 *  On-Line Applications Research Corporation (OAR).
8 *  All rights assigned to U.S. Government, 1994.
9 *
10 *  This material may be reproduced by or for the U.S. Government pursuant
11 *  to the copyright license under the clause at DFARS 252.227-7013.  This
12 *  notice must appear in all copies of this file and its derivatives.
13 *
14 *  $Id$
15 */
16
17#ifndef __M68k_h
18#define __M68k_h
19
20#ifdef __cplusplus
21extern "C" {
22#endif
23
24/*
25 *  The following define the CPU Family and Model within the family
26 *
27 *  NOTE: The string "REPLACE_THIS_WITH_THE_CPU_MODEL" is replaced
28 *        with the name of the appropriate macro for this target CPU.
29 */
30 
31#ifdef m68k
32#undef m68k
33#endif
34#define m68k
35
36#ifdef REPLACE_THIS_WITH_THE_CPU_MODEL
37#undef REPLACE_THIS_WITH_THE_CPU_MODEL
38#endif
39#define REPLACE_THIS_WITH_THE_CPU_MODEL
40
41#ifdef REPLACE_THIS_WITH_THE_BSP
42#undef REPLACE_THIS_WITH_THE_BSP
43#endif
44#define REPLACE_THIS_WITH_THE_BSP
45
46/*
47 *  This section contains the information required to build
48 *  RTEMS for a particular member of the Motorola MC68xxx
49 *  family.  It does this by setting variables to indicate
50 *  which implementation dependent features are present in
51 *  a particular member of the family.
52 *
53 *  Currently recognized:
54 *     m68000        (no FP)
55 *     m68020        (implies FP)
56 *     m68020_nofp   (no FP)
57 *     m68030        (implies FP)
58 *     m68040        (implies FP)
59 *     m68lc040      (no FP)
60 *     m68ec040      (no FP)
61 *     m68360        (no FP)
62 *
63 *  Primary difference (for RTEMS) between m68040, m680lc040, and
64 *  m68ec040 is the presence or absence of the FPU.
65 *
66 *  Here is some information on the 040 variants (courtesy of Doug McBride,
67 *  mcbride@rodin.colorado.edu):
68 *
69 *    "The 68040 is a superset of the 68EC040 and the 68LC040.  The
70 *    68EC040 and 68LC040 do not have FPU's.  The 68LC040 and the
71 *    68EC040 have renamed the DLE pin as JS0 which must be tied to
72 *    Gnd or Vcc. The 68EC040 has renamed the MDIS pin as JS1.  The
73 *    68EC040 has access control units instead of memory management units.
74 *    The 68EC040 should not have the PFLUSH or PTEST instructions executed
75 *    (cause an indeterminate result).  The 68EC040 and 68LC040 do not
76 *    implement the DLE or multiplexed bus modes.  The 68EC040 does not
77 *    implement the output buffer impedance selection mode of operation."
78 */
79 
80#if defined(m68000)
81 
82#define CPU_MODEL_NAME         "m68000"
83#define M68K_HAS_VBR             0
84#define M68K_HAS_SEPARATE_STACKS 0
85#define M68K_HAS_FPU             0
86#define M68K_HAS_BFFFO           0
87#define M68K_HAS_PREINDEXING     0
88
89#elif defined(m68020)
90 
91#define CPU_MODEL_NAME         "m68020"
92#define M68K_HAS_VBR             1
93#define M68K_HAS_SEPARATE_STACKS 1
94#define M68K_HAS_FPU             1
95#define M68K_HAS_BFFFO           1
96#define M68K_HAS_PREINDEXING     1
97 
98#elif defined(m68020_nofp)
99 
100#define CPU_MODEL_NAME         "m68020 w/o fp"
101#define M68K_HAS_VBR             1
102#define M68K_HAS_SEPARATE_STACKS 1
103#define M68K_HAS_FPU             0
104#define M68K_HAS_BFFFO           1
105#define M68K_HAS_PREINDEXING     1
106 
107#elif defined(m68030)
108 
109#define CPU_MODEL_NAME         "m68030"
110#define M68K_HAS_VBR             1
111#define M68K_HAS_SEPARATE_STACKS 1
112#define M68K_HAS_FPU             1
113#define M68K_HAS_BFFFO           1
114#define M68K_HAS_PREINDEXING     1
115 
116#elif defined(m68040)
117
118#define CPU_MODEL_NAME         "m68040"
119#define M68K_HAS_VBR             1
120#define M68K_HAS_SEPARATE_STACKS 1
121#define M68K_HAS_FPU             1
122#define M68K_HAS_BFFFO           1
123#define M68K_HAS_PREINDEXING     1
124 
125#elif defined(m68lc040)
126
127#define CPU_MODEL_NAME         "m68lc040"
128#define M68K_HAS_VBR             1
129#define M68K_HAS_SEPARATE_STACKS 1
130#define M68K_HAS_FPU             0
131#define M68K_HAS_BFFFO           1
132#define M68K_HAS_PREINDEXING     1
133 
134#elif defined(m68ec040)
135
136#define CPU_MODEL_NAME         "m68ec040"
137#define M68K_HAS_VBR             1
138#define M68K_HAS_SEPARATE_STACKS 1
139#define M68K_HAS_FPU             0
140#define M68K_HAS_BFFFO           1
141#define M68K_HAS_PREINDEXING     1
142
143#elif defined(m68332)
144 
145#define CPU_MODEL_NAME         "m68332"
146#define M68K_HAS_VBR             1
147#define M68K_HAS_SEPARATE_STACKS 0
148#define M68K_HAS_FPU             0
149#define M68K_HAS_BFFFO           0
150#define M68K_HAS_PREINDEXING     0
151
152#elif defined(m68360)
153 
154#define CPU_MODEL_NAME         "m68360"
155#define M68K_HAS_VBR             1
156#define M68K_HAS_SEPARATE_STACKS 0
157#define M68K_HAS_FPU             0
158#define M68K_HAS_BFFFO           0
159#define M68K_HAS_PREINDEXING     1
160
161#else
162
163#error "Unsupported CPU Model"
164
165#endif
166
167/*
168 *  If defined, this causes some of the macros to initialize their
169 *  variables to zero before doing inline assembly.  This gets rid
170 *  of compile time warnings at the cost of a little execution time
171 *  in some time critical routines.
172 */
173
174#define NO_UNINITIALIZED_WARNINGS
175
176/*
177 *  Define the name of the CPU family.
178 */
179
180#define CPU_NAME "Motorola MC68xxx"
181
182#ifndef ASM
183
184#ifdef NO_UNINITIALIZED_WARNINGS
185#define m68k_disable_interrupts( _level ) \
186  { \
187    (_level) = 0;  /* avoids warnings */ \
188    asm volatile ( "movew   %%sr,%0 ; \
189                    orw     #0x0700,%%sr" \
190                    : "=d" ((_level)) : "0" ((_level)) \
191    ); \
192  }
193#else
194#define m68k_disable_interrupts( _level ) \
195  { \
196    asm volatile ( "movew   %%sr,%0 ; \
197                    orw     #0x0700,%%sr" \
198                    : "=d" ((_level)) : "0" ((_level)) \
199    ); \
200  }
201#endif
202
203#define m68k_enable_interrupts( _level ) \
204  { \
205    asm volatile ( "movew   %0,%%sr " \
206                   : "=d" ((_level)) : "0" ((_level)) \
207    ); \
208  }
209
210#define m68k_flash_interrupts( _level ) \
211  { \
212    asm volatile ( "movew   %0,%%sr ; \
213                    orw     #0x0700,%%sr" \
214                    : "=d" ((_level)) : "0" ((_level)) \
215    ); \
216  }
217
218#define m68k_get_interrupt_level( _level ) \
219  do { \
220    register unsigned32 _tmpsr = 0; \
221    \
222    asm volatile( "movw  %%sr,%0" \
223                   : "=d" (_tmpsr) : "0" (_tmpsr) \
224    ); \
225    \
226    _level = (_tmpsr & 0x0700) >> 8; \
227  } while (0)
228   
229#define m68k_set_interrupt_level( _newlevel ) \
230  { \
231    register unsigned32 _tmpsr = 0; \
232    \
233    asm volatile( "movw  %%sr,%0" \
234                   : "=d" (_tmpsr) : "0" (_tmpsr) \
235    ); \
236    \
237    _tmpsr = (_tmpsr & 0xf8ff) | ((_newlevel) << 8); \
238    \
239    asm volatile( "movw  %0,%%sr" \
240                   : "=d" (_tmpsr) : "0" (_tmpsr) \
241    ); \
242  }
243
244#if ( M68K_HAS_VBR == 1 )
245#define m68k_get_vbr( vbr ) \
246  { (vbr) = 0; \
247    asm volatile ( "movec   %%vbr,%0 " \
248                       : "=r" (vbr) : "0" (vbr) ); \
249  }
250
251#define m68k_set_vbr( vbr ) \
252  { register m68k_isr *_vbr= (m68k_isr *)(vbr); \
253    asm volatile ( "movec   %0,%%vbr " \
254                       : "=a" (_vbr) : "0" (_vbr) ); \
255  }
256#else
257#define m68k_get_vbr( _vbr ) _vbr = (void *)_VBR
258#define m68k_set_vbr( _vbr )
259#endif
260
261/*
262 *  The following routine swaps the endian format of an unsigned int.
263 *  It must be static because it is referenced indirectly.
264 */
265
266static inline unsigned int m68k_swap_u32(
267  unsigned int value
268)
269{
270  unsigned int swapped = value;
271
272  asm volatile( "rorw  #8,%0" : "=d" (swapped) : "0" (swapped) );
273  asm volatile( "swap  %0"    : "=d" (swapped) : "0" (swapped) );
274  asm volatile( "rorw  #8,%0" : "=d" (swapped) : "0" (swapped) );
275
276  return( swapped );
277}
278
279/* XXX this is only valid for some m68k family members and should be fixed */
280
281#define m68k_enable_caching() \
282  { register unsigned32 _ctl=0x01; \
283    asm volatile ( "movec   %0,%%cacr" \
284                       : "=d" (_ctl) : "0" (_ctl) ); \
285  }
286
287#define CPU_swap_u32( value )  m68k_swap_u32( value )
288
289#ifdef __cplusplus
290}
291#endif
292
293#endif  /* !ASM */
294
295#endif
296/* end of include file */
Note: See TracBrowser for help on using the repository browser.