source: rtems/c/src/exec/score/cpu/m68k/cpu_asm.s @ b22b1294

4.104.114.84.95
Last change on this file since b22b1294 was b22b1294, checked in by Joel Sherrill <joel.sherrill@…>, on 06/25/98 at 16:26:43

Coldfire support patch from David Fiddes <D.J.Fiddes@…>.

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File size: 10.5 KB
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1/*  cpu_asm.s
2 *
3 *  This file contains all assembly code for the MC68020 implementation
4 *  of RTEMS.
5 *
6 *  COPYRIGHT (c) 1989-1998.
7 *  On-Line Applications Research Corporation (OAR).
8 *  Copyright assigned to U.S. Government, 1994.
9 *
10 *  The license and distribution terms for this file may be
11 *  found in the file LICENSE in this distribution or at
12 *  http://www.OARcorp.com/rtems/license.html.
13 *
14 *  $Id$
15 */
16
17
18#include <asm.h>
19
20        .text
21
22/*  void _CPU_Context_switch( run_context, heir_context )
23 *
24 *  This routine performs a normal non-FP context.
25 */
26
27        .align  4
28        .global SYM (_CPU_Context_switch)
29
30.set RUNCONTEXT_ARG,   4                   | save context argument
31.set HEIRCONTEXT_ARG,  8                   | restore context argument
32
33SYM (_CPU_Context_switch):
34          moval    a7@(RUNCONTEXT_ARG),a0| a0 = running thread context
35          movw     sr,d1                 | d1 = status register
36          movml    d1-d7/a2-a7,a0@       | save context
37
38          moval    a7@(HEIRCONTEXT_ARG),a0| a0 = heir thread context
39restore:  movml    a0@,d1-d7/a2-a7     | restore context
40          movw     d1,sr                  | restore status register
41          rts
42
43/*PAGE
44 *  void __CPU_Context_save_fp_context( &fp_context_ptr )
45 *  void __CPU_Context_restore_fp_context( &fp_context_ptr )
46 *
47 *  These routines are used to context switch a MC68881 or MC68882.
48 *
49 *  NOTE:  Context save and restore code is based upon the code shown
50 *         on page 6-38 of the MC68881/68882 Users Manual (rev 1).
51 *
52 *         CPU_FP_CONTEXT_SIZE is higher than expected to account for the
53 *         -1 pushed at end of this sequence.
54 *
55 *         Neither of these entries is required if we have software FPU
56 *         emulation.  But if we don't have an FPU or emulation, then
57 *         we need the stub versions of these routines.
58 */
59
60#if (CPU_SOFTWARE_FP == FALSE)
61
62.set FPCONTEXT_ARG,   4                    | save FP context argument
63
64        .align  4
65        .global SYM (_CPU_Context_save_fp)
66SYM (_CPU_Context_save_fp):
67#if ( M68K_HAS_FPU == 1 )
68        moval    a7@(FPCONTEXT_ARG),a1    | a1 = &ptr to context area
69        moval    a1@,a0                   | a0 = Save context area
70        fsave    a0@-                     | save 68881/68882 state frame
71        tstb     a0@                      | check for a null frame
72        beq      nosv                     | Yes, skip save of user model
73        fmovem   fp0-fp7,a0@-             | save data registers (fp0-fp7)
74        fmovem   fpc/fps/fpi,a0@-         | and save control registers
75        movl     #-1,a0@-                 | place not-null flag on stack
76nosv:   movl     a0,a1@                   | save pointer to saved context
77#endif
78        rts
79
80        .align  4
81        .global SYM (_CPU_Context_restore_fp)
82SYM (_CPU_Context_restore_fp):
83#if ( M68K_HAS_FPU == 1 )
84        moval    a7@(FPCONTEXT_ARG),a1    | a1 = &ptr to context area
85        moval    a1@,a0                   | a0 = address of saved context
86        tstb     a0@                      | Null context frame?
87        beq      norst                    | Yes, skip fp restore
88        addql    #4,a0                    | throwaway non-null flag
89        fmovem   a0@+,fpc/fps/fpi         | restore control registers
90        fmovem   a0@+,fp0-fp7             | restore data regs (fp0-fp7)
91norst:  frestore a0@+                     | restore the fp state frame
92        movl     a0,a1@                   | save pointer to saved context
93#endif
94        rts
95#endif
96
97/*PAGE
98 *  void _ISR_Handler()
99 *
100 *  This routine provides the RTEMS interrupt management.
101 *
102 *  NOTE:
103 *    Upon entry, the master stack will contain an interrupt stack frame
104 *    back to the interrupted thread and the interrupt stack will contain
105 *    a throwaway interrupt stack frame.  If dispatching is enabled, this
106 *    is the outer most interrupt, and (a context switch is necessary or
107 *    the current thread has signals), then set up the master stack to
108 *    transfer control to the interrupt dispatcher.
109 */
110
111/*
112 *  With this approach, lower priority interrupts may
113 *  execute twice if a higher priority interrupt is
114 *  acknowledged before _Thread_Dispatch_disable is
115 *  incremented and the higher priority interrupt
116 *  performs a context switch after executing. The lower
117 *  priority interrupt will execute (1) at the end of the
118 *  higher priority interrupt in the new context if
119 *  permitted by the new interrupt level mask, and (2) when
120 *  the original context regains the cpu.
121 */
122 
123#if ( M68K_COLDFIRE_ARCH == 1 )
124.set SR_OFFSET,    2                     | Status register offset
125.set PC_OFFSET,    4                     | Program Counter offset
126.set FVO_OFFSET,   0                     | Format/vector offset
127#elif ( M68K_HAS_VBR == 1)
128.set SR_OFFSET,    0                     | Status register offset
129.set PC_OFFSET,    2                     | Program Counter offset
130.set FVO_OFFSET,   6                     | Format/vector offset
131#else
132.set SR_OFFSET,    2                     | Status register offset
133.set PC_OFFSET,    4                     | Program Counter offset
134.set FVO_OFFSET,   0                     | Format/vector offset placed in the stack
135#endif /* M68K_HAS_VBR */
136 
137.set SAVED,        16                    | space for saved registers
138
139        .align  4
140        .global SYM (_ISR_Handler)
141
142SYM (_ISR_Handler):
143        addql   #1,SYM (_Thread_Dispatch_disable_level) | disable multitasking
144#if ( M68K_COLDFIRE_ARCH == 0 )
145        moveml  d0-d1/a0-a1,a7@-         | save d0-d1,a0-a1
146        movew   a7@(SAVED+FVO_OFFSET),d0 | d0 = F/VO
147        andl    #0x0fff,d0               | d0 = vector offset in vbr
148#else
149        lea     a7@(-SAVED),a7
150        movm.l  d0-d1/a0-a1,a7@          | save d0-d1,a0-a1
151        movew   a7@(SAVED+FVO_OFFSET),d0 | d0 = F/VO
152        andl    #0x0ffc,d0               | d0 = vector offset in vbr
153#endif
154
155
156#if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == 1 )
157  #if ( M68K_COLDFIRE_ARCH == 0 )
158        movew   sr,d1                   | Save status register
159        oriw    #0x700,sr               | Disable interrupts
160  #else
161        move.l  d0,a7@-                 | Save d0 value
162        move.l  0x700,d0                | Load in disable ints value
163        move.w  sr,d1                   | Grab SR
164        or.l    d1,d0                   | Create new SR
165        move.w  d0,sr                   | Disable interrupts
166        move.l  a7@+,d0                 | Restore d0 value
167  #endif
168 
169        tstl    SYM (_ISR_Nest_level)   | Interrupting an interrupt handler?
170        bne     1f                      | Yes, just skip over stack switch code
171        movel   SYM(_CPU_Interrupt_stack_high),a0       | End of interrupt stack
172        movel   a7,a0@-                 | Save task stack pointer
173        movel   a0,a7                   | Switch to interrupt stack
1741:
175        addql   #1,SYM(_ISR_Nest_level) | one nest level deeper
176        movew   d1,sr                   | Restore status register
177#else
178        addql   #1,SYM (_ISR_Nest_level) | one nest level deeper
179#endif /* CPU_HAS_SOFTWARE_INTERRUPT_STACK == 1 */
180
181#if ( M68K_HAS_PREINDEXING == 1 )
182        movel   @( SYM (_ISR_Vector_table),d0:w:1),a0| fetch the ISR
183#else
184        movel   # SYM (_ISR_Vector_table),a0   | a0 = base of RTEMS table
185        addal   d0,a0                    | a0 = address of vector
186        movel   (a0),a0                  | a0 = address of user routine
187#endif
188
189        lsrl    #2,d0                    | d0 = vector number
190        movel   d0,a7@-                  | push vector number
191        jbsr    a0@                      | invoke the user ISR
192        addql   #4,a7                    | remove vector number
193
194#if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == 1 )
195  #if ( M68K_COLDFIRE_ARCH == 0 )
196        movew   sr,d0                   | Save status register
197        oriw    #0x700,sr               | Disable interrupts
198  #else
199        move.l  0x700,d1                | Load in disable int value
200        move.w  sr,d0                   | Grab SR
201        or.l    d0,d1                   | Create new SR
202        move.w  d1,sr                   | Load to disable interrupts
203  #endif
204
205        subql   #1,SYM(_ISR_Nest_level) | Reduce interrupt-nesting count
206        bne     1f                      | Skip if return to interrupt
207        movel   (a7),a7                 | Restore task stack pointer
2081:
209        movew   d0,sr                   | Restore status register
210#else
211        subql   #1,SYM (_ISR_Nest_level) | one less nest level
212#endif /* CPU_HAS_SOFTWARE_INTERRUPT_STACK == 1 */
213
214        subql   #1,SYM (_Thread_Dispatch_disable_level)
215                                         | unnest multitasking
216        bne     exit                     | If dispatch disabled, exit
217
218#if ( M68K_HAS_SEPARATE_STACKS == 1 )
219        movew   #0xf000,d0               | isolate format nibble
220        andw    a7@(SAVED+FVO_OFFSET),d0 | get F/VO
221        cmpiw   #0x1000,d0               | is it a throwaway isf?
222        bne     exit                     | NOT outer level, so branch
223#endif
224
225        tstl    SYM (_Context_Switch_necessary)
226                                         | Is thread switch necessary?
227        bne     bframe                   | Yes, invoke dispatcher
228
229        tstl    SYM (_ISR_Signals_to_thread_executing)
230                                         | signals sent to Run_thread
231                                         |   while in interrupt handler?
232        beq     exit                     | No, then exit
233
234
235bframe: clrl    SYM (_ISR_Signals_to_thread_executing)
236                                         | If sent, will be processed
237#if ( M68K_HAS_SEPARATE_STACKS == 1 )
238        movec   msp,a0                   | a0 = master stack pointer
239        movew   #0,a0@-                  | push format word
240        movel   #SYM(_ISR_Dispatch),a0@- | push return addr
241        movew   sr,a0@-                  | push existing sr
242        movec   a0,msp                   | set master stack pointer
243#else
244        jsr SYM (_Thread_Dispatch)       | Perform context switch
245#endif
246
247#if ( M68K_COLDFIRE_ARCH == 0 )
248exit:   moveml  a7@+,d0-d1/a0-a1         | restore d0-d1,a0-a1
249#else
250exit:   moveml  a7@,d0-d1/a0-a1          | restore d0-d1,a0-a1
251        lea     a7@(SAVED),a7
252#endif
253
254#if ( M68K_HAS_VBR == 0 )
255        addql   #2,a7                    | pop format/id
256#endif /* M68K_HAS_VBR */
257        rte                              | return to thread
258                                         |   OR _Isr_dispatch
259
260/*PAGE
261 *  void _ISR_Dispatch()
262 *
263 *  Entry point from the outermost interrupt service routine exit.
264 *  The current stack is the supervisor mode stack if this processor
265 *  has separate stacks.
266 *
267 *    1.  save all registers not preserved across C calls.
268 *    2.  invoke the _Thread_Dispatch routine to switch tasks
269 *        or a signal to the currently executing task.
270 *    3.  restore all registers not preserved across C calls.
271 *    4.  return from interrupt
272 */
273
274        .global SYM (_ISR_Dispatch)
275SYM (_ISR_Dispatch):
276#if ( M68K_COLDFIRE_ARCH == 0 )
277        movml   d0-d1/a0-a1,a7@-
278        jsr     SYM (_Thread_Dispatch)
279        movml   a7@+,d0-d1/a0-a1
280#else
281        lea     a7@(-SAVED),a7
282        movml   d0-d1/a0-a1,a7@
283        jsr     SYM (_Thread_Dispatch)
284        movml   a7@,d0-d1/a0-a1
285        lea     a7@(SAVED),a7
286#endif
287
288#if ( M68K_HAS_VBR == 0 )
289        addql   #2,a7                    | pop format/id
290#endif /* M68K_HAS_VBR */
291        rte
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