source: rtems/c/src/exec/score/cpu/m68k/cpu_asm.s @ ac7d5ef0

4.104.114.84.95
Last change on this file since ac7d5ef0 was ac7d5ef0, checked in by Joel Sherrill <joel.sherrill@…>, on May 11, 1995 at 5:39:37 PM

Initial revision

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1/*  cpu_asm.s
2 *
3 *  This file contains all assembly code for the MC68020 implementation
4 *  of RTEMS.
5 *
6 *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
7 *  On-Line Applications Research Corporation (OAR).
8 *  All rights assigned to U.S. Government, 1994.
9 *
10 *  This material may be reproduced by or for the U.S. Government pursuant
11 *  to the copyright license under the clause at DFARS 252.227-7013.  This
12 *  notice must appear in all copies of this file and its derivatives.
13 *
14 *  $Id$
15 */
16
17
18#include <asm.h>
19
20        .text
21
22/*  void _CPU_Context_switch( run_context, heir_context )
23 *
24 *  This routine performs a normal non-FP context.
25 */
26
27        .align  4
28        .global SYM (_CPU_Context_switch)
29
30.set RUNCONTEXT_ARG,   4                   | save context argument
31.set HEIRCONTEXT_ARG,  8                   | restore context argument
32
33SYM (_CPU_Context_switch):
34          moval    a7@(RUNCONTEXT_ARG),a0| a0 = running thread context
35          movw     sr,d1                 | d1 = status register
36          movml    d1-d7/a2-a7,a0@       | save context
37
38          moval    a7@(HEIRCONTEXT_ARG),a0| a0 = heir thread context
39restore:  movml    a0@,d1-d7/a2-a7     | restore context
40          movw     d1,sr                  | restore status register
41          rts
42
43/*PAGE
44 *  void __CPU_Context_save_fp_context( &fp_context_ptr )
45 *  void __CPU_Context_restore_fp_context( &fp_context_ptr )
46 *
47 *  These routines are used to context switch a MC68881 or MC68882.
48 *
49 *  NOTE:  Context save and restore code is based upon the code shown
50 *         on page 6-38 of the MC68881/68882 Users Manual (rev 1).
51 *
52 *         CPU_FP_CONTEXT_SIZE is higher than expected to account for the
53 *         -1 pushed at end of this sequence.
54 */
55
56.set FPCONTEXT_ARG,   4                    | save FP context argument
57
58        .align  4
59        .global SYM (_CPU_Context_save_fp)
60SYM (_CPU_Context_save_fp):
61#if ( M68K_HAS_FPU == 1 )
62        moval    a7@(FPCONTEXT_ARG),a1   | a1 = &ptr to context area
63        moval    a1@,a0                  | a0 = Save context area
64        fsave    a0@-                     | save 68881/68882 state frame
65        tstb     a0@                      | check for a null frame
66        beq      nosv                      | Yes, skip save of user model
67        fmovem   fp0-fp7,a0@-           | save data registers (fp0-fp7)
68        fmovem   fpc/fps/fpi,a0@-      | and save control registers
69        movl     #-1,a0@-                 | place not-null flag on stack
70nosv:   movl     a0,a1@                  | save pointer to saved context
71#endif
72        rts
73
74        .align  4
75        .global SYM (_CPU_Context_restore_fp)
76SYM (_CPU_Context_restore_fp):
77#if ( M68K_HAS_FPU == 1 )
78        moval    a7@(FPCONTEXT_ARG),a1   | a1 = &ptr to context area
79        moval    a1@,a0                  | a0 = address of saved context
80        tstb     a0@                      | Null context frame?
81        beq      norst                     | Yes, skip fp restore
82        addql    #4,a0                    | throwaway non-null flag
83        fmovem   a0@+,fpc/fps/fpi      | restore control registers
84        fmovem   a0@+,fp0-fp7           | restore data regs (fp0-fp7)
85norst:  frestore a0@+                     | restore the fp state frame
86        movl     a0,a1@                  | save pointer to saved context
87#endif
88        rts
89
90/*PAGE
91 *  void _ISR_Handler()
92 *
93 *  This routine provides the RTEMS interrupt management.
94 *
95 *  NOTE:
96 *    Upon entry, the master stack will contain an interrupt stack frame
97 *    back to the interrupted thread and the interrupt stack will contain
98 *    a throwaway interrupt stack frame.  If dispatching is enabled, this
99 *    is the outer most interrupt, and (a context switch is necessary or
100 *    the current thread has signals), then set up the master stack to
101 *    transfer control to the interrupt dispatcher.
102 */
103
104.set SR_OFFSET,    0                     | Status register offset
105.set PC_OFFSET,    2                     | Program Counter offset
106.set FVO_OFFSET,   6                     | Format/vector offset
107
108.set SAVED,        16                    | space for saved registers
109
110        .align  4
111        .global SYM (_ISR_Handler)
112
113SYM (_ISR_Handler):
114        moveml  d0-d1/a0-a1,a7@-    | save d0-d1,a0-a1
115        addql   #1,SYM (_ISR_Nest_level)       | one nest level deeper
116        addql   #1,SYM (_Thread_Dispatch_disable_level)
117                                         | disable multitasking
118        movew   a7@(SAVED+FVO_OFFSET),d0 | d0 = F/VO
119        andl    #0x0fff,d0              | d0 = vector offset in vbr
120
121#if ( M68K_HAS_PREINDEXING == 1 )
122        movel   @( SYM (_ISR_Vector_table),d0:w:1),a0| fetch the ISR
123#else
124        movel   # SYM (_ISR_Vector_table),a0   | a0 = base of RTEMS table
125        addal   d0,a0                  | a0 = address of vector
126        movel   @(a0),a0               | a0 = address of user routine
127#warning "UNTESTED CODE!!!"
128#endif
129
130        lsrl    #2,d0                   | d0 = vector number
131        movel   d0,a7@-                | push vector number
132        jbsr    a0@                     | invoke the user ISR
133        addql   #4,a7                   | remove vector number
134
135        subql   #1,SYM (_ISR_Nest_level)       | one less nest level
136        subql   #1,SYM (_Thread_Dispatch_disable_level)
137                                         | unnest multitasking
138        bne     exit                     | If dispatch disabled, exit
139
140        movew   #0xf000,d0              | isolate format nibble
141        andw    a7@(SAVED+FVO_OFFSET),d0 | get F/VO
142        cmpiw   #0x1000,d0              | is it a throwaway isf?
143        bne     exit                     | NOT outer level, so branch
144
145        tstl    SYM (_Context_Switch_necessary)
146                                         | Is thread switch necessary?
147        bne     bframe                   | Yes, invoke dispatcher
148
149        tstl    SYM (_ISR_Signals_to_thread_executing)
150                                         | signals sent to Run_thread
151                                         |   while in interrupt handler?
152        beq     exit                     | No, then exit
153
154
155bframe: clrl    SYM (_ISR_Signals_to_thread_executing)
156                                         | If sent, will be processed
157#if ( M68K_HAS_SEPARATE_STACKS == 1 )
158        movec   msp,a0                 | a0 = master stack pointer
159        movew   #0,a0@-                 | push format word
160        movel   # SYM (_ISR_Dispatch),a0@-    | push return addr
161        movew   a0@(6+SR_OFFSET),a0@-  | push thread sr
162        movec   a0,msp                 | set master stack pointer
163#else
164#warning "FIX ME ... HOW DO I DISPATCH FROM AN INTERRUPT?"
165/* probably will simply need to push the _ISR_Dispatch frame */
166#endif
167
168exit:   moveml  a7@+,d0-d1/a0-a1    | restore d0-d1,a0-a1
169        rte                              | return to thread
170                                         |   OR _Isr_dispatch
171
172/*PAGE
173 *  void _ISR_Dispatch()
174 *
175 *  Entry point from the outermost interrupt service routine exit.
176 *  The current stack is the supervisor mode stack if this processor
177 *  has separate stacks.
178 *
179 *    1.  save all registers not preserved across C calls.
180 *    2.  invoke the _Thread_Dispatch routine to switch tasks
181 *        or a signal to the currently executing task.
182 *    3.  restore all registers not preserved across C calls.
183 *    4.  return from interrupt
184 */
185
186        .global SYM (_ISR_Dispatch)
187SYM (_ISR_Dispatch):
188        movml   d0-d1/a0-a1,a7@-
189        jsr     SYM (_Thread_Dispatch)
190        movml   a7@+,d0-d1/a0-a1
191        rte
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