1 | /* |
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2 | * Motorola MC68020 Dependent Source |
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3 | * |
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4 | * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. |
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5 | * On-Line Applications Research Corporation (OAR). |
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6 | * All rights assigned to U.S. Government, 1994. |
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7 | * |
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8 | * This material may be reproduced by or for the U.S. Government pursuant |
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9 | * to the copyright license under the clause at DFARS 252.227-7013. This |
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10 | * notice must appear in all copies of this file and its derivatives. |
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11 | * |
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12 | * $Id$ |
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13 | */ |
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14 | |
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15 | #include <rtems/system.h> |
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16 | #include <rtems/fatal.h> |
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17 | #include <rtems/isr.h> |
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18 | |
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19 | /* _CPU_Initialize |
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20 | * |
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21 | * This routine performs processor dependent initialization. |
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22 | * |
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23 | * INPUT PARAMETERS: |
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24 | * cpu_table - CPU table to initialize |
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25 | * thread_dispatch - entry pointer to thread dispatcher |
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26 | * |
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27 | * OUTPUT PARAMETERS: NONE |
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28 | */ |
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29 | |
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30 | void _CPU_Initialize( |
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31 | rtems_cpu_table *cpu_table, |
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32 | void (*thread_dispatch) /* ignored on this CPU */ |
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33 | ) |
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34 | { |
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35 | |
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36 | if ( cpu_table == NULL ) |
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37 | rtems_fatal_error_occurred( RTEMS_NOT_CONFIGURED ); |
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38 | |
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39 | _CPU_Table = *cpu_table; |
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40 | |
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41 | } |
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42 | |
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43 | /*PAGE |
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44 | * |
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45 | * _CPU_ISR_install_raw_handler |
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46 | */ |
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47 | |
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48 | void _CPU_ISR_install_raw_handler( |
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49 | unsigned32 vector, |
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50 | proc_ptr new_handler, |
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51 | proc_ptr *old_handler |
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52 | ) |
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53 | { |
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54 | proc_ptr *interrupt_table = NULL; |
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55 | |
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56 | m68k_get_vbr( interrupt_table ); |
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57 | |
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58 | *old_handler = interrupt_table[ vector ]; |
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59 | |
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60 | interrupt_table[ vector ] = new_handler; |
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61 | } |
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62 | |
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63 | /*PAGE |
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64 | * |
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65 | * _CPU_ISR_install_vector |
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66 | * |
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67 | * This kernel routine installs the RTEMS handler for the |
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68 | * specified vector. |
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69 | * |
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70 | * Input parameters: |
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71 | * vector - interrupt vector number |
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72 | * new_handler - replacement ISR for this vector number |
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73 | * old_handler - former ISR for this vector number |
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74 | * |
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75 | * Output parameters: NONE |
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76 | */ |
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77 | |
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78 | void _CPU_ISR_install_vector( |
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79 | unsigned32 vector, |
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80 | proc_ptr new_handler, |
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81 | proc_ptr *old_handler |
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82 | ) |
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83 | { |
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84 | proc_ptr ignored; |
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85 | |
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86 | *old_handler = _ISR_Vector_table[ vector ]; |
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87 | |
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88 | _CPU_ISR_install_raw_handler( vector, _ISR_Handler, &ignored ); |
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89 | |
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90 | _ISR_Vector_table[ vector ] = new_handler; |
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91 | } |
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92 | |
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93 | |
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94 | /*PAGE |
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95 | * |
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96 | * _CPU_Install_interrupt_stack |
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97 | */ |
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98 | |
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99 | void _CPU_Install_interrupt_stack( void ) |
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100 | { |
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101 | #if ( M68K_HAS_SEPARATE_STACKS == 1 ) |
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102 | void *isp = _CPU_Interrupt_stack_high; |
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103 | |
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104 | asm volatile ( "movec %0,%%isp" : "=r" (isp) : "0" (isp) ); |
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105 | #else |
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106 | #warning "FIX ME... HOW DO I INSTALL THE INTERRUPT STACK!!!" |
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107 | #endif |
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108 | } |
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109 | |
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110 | #if ( M68K_HAS_BFFFO != 1 ) |
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111 | /* |
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112 | * Returns log2(x) 0<x<256 |
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113 | */ |
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114 | const unsigned char __log2table[256] = { |
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115 | 0, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, |
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116 | 4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, |
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117 | 5, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, |
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118 | 4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, |
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119 | 6, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, |
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120 | 4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, |
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121 | 5, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, |
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122 | 4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, |
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123 | 7, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, |
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124 | 4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, |
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125 | 5, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, |
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126 | 4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, |
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127 | 6, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, |
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128 | 4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, |
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129 | 5, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, |
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130 | 4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0 |
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131 | }; |
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132 | #endif |
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