source: rtems/c/src/exec/score/cpu/i386/cpu_asm.s @ 67a2288

4.104.114.84.95
Last change on this file since 67a2288 was 67a2288, checked in by Joel Sherrill <joel.sherrill@…>, on 07/23/98 at 22:02:34

Patch from Eric VALETTE <valette@…>:

Here is a enhanced version of my previous patch. This patch enables
to potentially share the new interrupt management code for all Intel targets
(pc386, go32 and force386) bsp.

Note : this patch is complete only for pc386. It still needs to

be completed for go32 and force386. I carrefully checked
that anything needed is in for force386 (only some function
name changes for IDT manipulation and GDT segment
manipulation). But anyway I will not be able to test any
of theses targets...

  • Property mode set to 100644
File size: 19.5 KB
Line 
1/*  cpu_asm.s
2 *
3 *  This file contains all assembly code for the Intel i386 implementation
4 *  of RTEMS.
5 *
6 *  COPYRIGHT (c) 1989-1998.
7 *  On-Line Applications Research Corporation (OAR).
8 *  Copyright assigned to U.S. Government, 1994.
9 *
10 *  The license and distribution terms for this file may be
11 *  found in the file LICENSE in this distribution or at
12 *  http://www.OARcorp.com/rtems/license.html.
13 *
14 *  $Id$
15 */
16
17#include <asm.h>
18
19/*
20 * Format of i386 Register structure
21 */
22
23.set REG_EFLAGS,  0
24.set REG_ESP,     REG_EFLAGS + 4
25.set REG_EBP,     REG_ESP + 4
26.set REG_EBX,     REG_EBP + 4
27.set REG_ESI,     REG_EBX + 4
28.set REG_EDI,     REG_ESI + 4
29.set SIZE_REGS,   REG_EDI + 4
30
31        BEGIN_CODE
32
33/*
34 *  void _CPU_Context_switch( run_context, heir_context )
35 *
36 *  This routine performs a normal non-FP context.
37 */
38
39        .p2align  1
40        PUBLIC (_CPU_Context_switch)
41
42.set RUNCONTEXT_ARG,   4                   # save context argument
43.set HEIRCONTEXT_ARG,  8                   # restore context argument
44
45SYM (_CPU_Context_switch):
46        movl      RUNCONTEXT_ARG(esp),eax  # eax = running threads context
47        pushf                              # push eflags
48        popl      REG_EFLAGS(eax)          # save eflags
49        movl      esp,REG_ESP(eax)         # save stack pointer
50        movl      ebp,REG_EBP(eax)         # save base pointer
51        movl      ebx,REG_EBX(eax)         # save ebx
52        movl      esi,REG_ESI(eax)         # save source register
53        movl      edi,REG_EDI(eax)         # save destination register
54
55        movl      HEIRCONTEXT_ARG(esp),eax # eax = heir threads context
56
57restore:
58        pushl     REG_EFLAGS(eax)          # push eflags
59        popf                               # restore eflags
60        movl      REG_ESP(eax),esp         # restore stack pointer
61        movl      REG_EBP(eax),ebp         # restore base pointer
62        movl      REG_EBX(eax),ebx         # restore ebx
63        movl      REG_ESI(eax),esi         # restore source register
64        movl      REG_EDI(eax),edi         # restore destination register
65        ret
66
67/*
68 *  NOTE: May be unnecessary to reload some registers.
69 */
70
71/*
72 *  void _CPU_Context_restore( new_context )
73 *
74 *  This routine performs a normal non-FP context.
75 */
76
77        PUBLIC (_CPU_Context_restore)
78
79.set NEWCONTEXT_ARG,   4                   # context to restore argument
80
81SYM (_CPU_Context_restore):
82
83        movl      NEWCONTEXT_ARG(esp),eax  # eax = running threads context
84        jmp       restore
85
86/*PAGE
87 *  void _CPU_Context_save_fp_context( &fp_context_ptr )
88 *  void _CPU_Context_restore_fp_context( &fp_context_ptr )
89 *
90 *  This section is used to context switch an i80287, i80387,
91 *  the built-in coprocessor or the i80486 or compatible.
92 */
93
94.set FPCONTEXT_ARG,   4                    # FP context argument
95
96        .p2align  1
97        PUBLIC (_CPU_Context_save_fp)
98SYM (_CPU_Context_save_fp):
99        movl      FPCONTEXT_ARG(esp),eax   # eax = &ptr to FP context area
100        movl      (eax),eax                # eax = FP context area
101        fsave     (eax)                    # save FP context
102        ret
103
104        .p2align  1
105        PUBLIC (_CPU_Context_restore_fp)
106SYM (_CPU_Context_restore_fp):
107        movl      FPCONTEXT_ARG(esp),eax   # eax = &ptr to FP context area
108        movl      (eax),eax                # eax = FP context area
109        frstor    (eax)                    # restore FP context
110        ret
111
112/*PAGE
113 *  void _ISR_Handler()
114 *
115 *  This routine provides the RTEMS interrupt management.
116 *
117 *  NOTE:
118 *    Upon entry, the stack will contain a stack frame back to the
119 *    interrupted task.  If dispatching is enabled, this is the
120 *    outer most interrupt, and (a context switch is necessary or
121 *    the current task has signals), then set up the stack to
122 *    transfer control to the interrupt dispatcher.
123 */
124
125.set SET_SEGMENT_REGISTERS_IN_INTERRUPT, 0
126
127.set SAVED_REGS     , 32                   # space consumed by saved regs
128.set EIP_OFFSET     , SAVED_REGS           # offset of tasks eip
129.set CS_OFFSET      , EIP_OFFSET+4         # offset of tasks code segment
130.set EFLAGS_OFFSET  , CS_OFFSET+4          # offset of tasks eflags
131
132        .p2align  1
133        PUBLIC (_ISR_Handler)
134
135SYM (_ISR_Handler):
136       /*
137        *  Before this was point is reached the vectors unique
138        *  entry point did the following:
139        *
140        *     1. saved all registers with a "pusha"
141        *     2. put the vector number in eax.
142        *
143        * BEGINNING OF ESTABLISH SEGMENTS
144        *
145        *  WARNING: If an interrupt can occur when the segments are
146        *           not correct, then this is where we should establish
147        *           the segments.  In addition to establishing the
148        *           segments, it may be necessary to establish a stack
149        *           in the current data area on the outermost interrupt.
150        *
151        *  NOTE:  If the previous values of the segment registers are
152        *         pushed, do not forget to adjust SAVED_REGS.
153        *
154        *  NOTE:  Make sure the exit code which restores these
155        *         when this type of code is needed.
156        */
157
158       /***** ESTABLISH SEGMENTS CODE GOES HERE  ******/
159
160       /*
161        * END OF ESTABLISH SEGMENTS
162        */
163
164        /*
165         *  Now switch stacks if necessary
166         */
167
168        movl      esp, edx                  # edx = previous stack pointer
169        cmpl      $0, SYM (_ISR_Nest_level) # is this the outermost interrupt?
170        jne       nested                    # No, then continue
171        movl      SYM (_CPU_Interrupt_stack_high), esp
172
173        /*
174         *  We want to insure that the old stack pointer is on the
175         *  stack we will be on at the end of the ISR when we restore it.
176         *  By saving it on every interrupt, all we have to do is pop it
177         *  near the end of every interrupt.
178         */
179
180nested:
181        pushl     edx                       # save the previous stack pointer
182        incl      SYM (_ISR_Nest_level)     # one nest level deeper
183        incl      SYM (_Thread_Dispatch_disable_level) # disable multitasking
184
185        # EAX is preloaded with the vector number.
186        push      eax                       # push vector number
187        mov       SYM (_ISR_Vector_table) (,eax,4),eax
188                                            # eax = Users handler
189        call      eax                       # invoke user ISR
190        pop       eax                       # eax = vector number
191
192        decl      SYM (_ISR_Nest_level)     # one less ISR nest level
193                                            # If interrupts are nested,
194                                            #   then dispatching is disabled
195
196        decl      SYM (_Thread_Dispatch_disable_level)
197                                            # unnest multitasking
198                                            # Is dispatch disabled
199        jne       exit                      # Yes, then exit
200
201        cmpl      $0, SYM (_Context_Switch_necessary)
202                                            # Is task switch necessary?
203        jne       bframe                    # Yes, then build stack
204
205        cmpl      $0, SYM (_ISR_Signals_to_thread_executing)
206                                            # signals sent to Run_thread
207                                            #   while in interrupt handler?
208        je        exit                      # No, exit
209
210bframe:
211        cli                                 # DISABLE INTERRUPTS!!
212        popl      esp                       # restore the stack pointer
213        movl      $0, SYM (_ISR_Signals_to_thread_executing)
214                                            # push the isf for Isr_dispatch
215        push      EFLAGS_OFFSET(esp)        # push tasks eflags
216        push      cs                        # cs of Isr_dispatch
217        push      $ SYM (_ISR_Dispatch)     # entry point
218        iret
219
220exit:
221        cli                                 # DISABLE INTERRUPTS!!
222        popl      esp                       # restore the stack pointer
223
224       /*
225        * BEGINNING OF DE-ESTABLISH SEGMENTS
226        *
227        *  NOTE:  Make sure there is code here if code is added to
228        *         load the segment registers.
229        *
230        */
231
232       /******* DE-ESTABLISH SEGMENTS CODE GOES HERE ********/
233
234       /*
235        * END OF DE-ESTABLISH SEGMENTS
236        */
237
238        popa                                # restore general registers
239        iret
240
241/*PAGE
242 *  Distinct Interrupt Entry Points
243 *
244 *  The following macro and the 256 instantiations of the macro
245 *  are necessary to determine which interrupt vector occurred.
246 *  The following macro allows a unique entry point to be defined
247 *  for each vector.
248 *
249 *  NOTE: There are not spaces around the vector number argument
250 *        to the DISTINCT_INTERRUPT_ENTRY macro because m4 will
251 *        undesirably generate the symbol "_Isr_handler_ N"
252 *        instead of "_Isr_handler_N" like we want.
253 */
254
255#define DISTINCT_INTERRUPT_ENTRY(_vector) \
256        .p2align 4                         ; \
257        PUBLIC (_ISR_Handler_ ## _vector ) ; \
258SYM (_ISR_Handler_ ## _vector ):             \
259        pusha                              ; \
260        xor   eax, eax                     ; \
261        movb  $ ## _vector, al             ; \
262        jmp   SYM (_ISR_Handler) ;
263
264DISTINCT_INTERRUPT_ENTRY(0)
265DISTINCT_INTERRUPT_ENTRY(1)
266DISTINCT_INTERRUPT_ENTRY(2)
267DISTINCT_INTERRUPT_ENTRY(3)
268DISTINCT_INTERRUPT_ENTRY(4)
269DISTINCT_INTERRUPT_ENTRY(5)
270DISTINCT_INTERRUPT_ENTRY(6)
271DISTINCT_INTERRUPT_ENTRY(7)
272DISTINCT_INTERRUPT_ENTRY(8)
273DISTINCT_INTERRUPT_ENTRY(9)
274DISTINCT_INTERRUPT_ENTRY(10)
275DISTINCT_INTERRUPT_ENTRY(11)
276DISTINCT_INTERRUPT_ENTRY(12)
277DISTINCT_INTERRUPT_ENTRY(13)
278DISTINCT_INTERRUPT_ENTRY(14)
279DISTINCT_INTERRUPT_ENTRY(15)
280DISTINCT_INTERRUPT_ENTRY(16)
281DISTINCT_INTERRUPT_ENTRY(17)
282DISTINCT_INTERRUPT_ENTRY(18)
283DISTINCT_INTERRUPT_ENTRY(19)
284DISTINCT_INTERRUPT_ENTRY(20)
285DISTINCT_INTERRUPT_ENTRY(21)
286DISTINCT_INTERRUPT_ENTRY(22)
287DISTINCT_INTERRUPT_ENTRY(23)
288DISTINCT_INTERRUPT_ENTRY(24)
289DISTINCT_INTERRUPT_ENTRY(25)
290DISTINCT_INTERRUPT_ENTRY(26)
291DISTINCT_INTERRUPT_ENTRY(27)
292DISTINCT_INTERRUPT_ENTRY(28)
293DISTINCT_INTERRUPT_ENTRY(29)
294DISTINCT_INTERRUPT_ENTRY(30)
295DISTINCT_INTERRUPT_ENTRY(31)
296DISTINCT_INTERRUPT_ENTRY(32)
297DISTINCT_INTERRUPT_ENTRY(33)
298DISTINCT_INTERRUPT_ENTRY(34)
299DISTINCT_INTERRUPT_ENTRY(35)
300DISTINCT_INTERRUPT_ENTRY(36)
301DISTINCT_INTERRUPT_ENTRY(37)
302DISTINCT_INTERRUPT_ENTRY(38)
303DISTINCT_INTERRUPT_ENTRY(39)
304DISTINCT_INTERRUPT_ENTRY(40)
305DISTINCT_INTERRUPT_ENTRY(41)
306DISTINCT_INTERRUPT_ENTRY(42)
307DISTINCT_INTERRUPT_ENTRY(43)
308DISTINCT_INTERRUPT_ENTRY(44)
309DISTINCT_INTERRUPT_ENTRY(45)
310DISTINCT_INTERRUPT_ENTRY(46)
311DISTINCT_INTERRUPT_ENTRY(47)
312DISTINCT_INTERRUPT_ENTRY(48)
313DISTINCT_INTERRUPT_ENTRY(49)
314DISTINCT_INTERRUPT_ENTRY(50)
315DISTINCT_INTERRUPT_ENTRY(51)
316DISTINCT_INTERRUPT_ENTRY(52)
317DISTINCT_INTERRUPT_ENTRY(53)
318DISTINCT_INTERRUPT_ENTRY(54)
319DISTINCT_INTERRUPT_ENTRY(55)
320DISTINCT_INTERRUPT_ENTRY(56)
321DISTINCT_INTERRUPT_ENTRY(57)
322DISTINCT_INTERRUPT_ENTRY(58)
323DISTINCT_INTERRUPT_ENTRY(59)
324DISTINCT_INTERRUPT_ENTRY(60)
325DISTINCT_INTERRUPT_ENTRY(61)
326DISTINCT_INTERRUPT_ENTRY(62)
327DISTINCT_INTERRUPT_ENTRY(63)
328DISTINCT_INTERRUPT_ENTRY(64)
329DISTINCT_INTERRUPT_ENTRY(65)
330DISTINCT_INTERRUPT_ENTRY(66)
331DISTINCT_INTERRUPT_ENTRY(67)
332DISTINCT_INTERRUPT_ENTRY(68)
333DISTINCT_INTERRUPT_ENTRY(69)
334DISTINCT_INTERRUPT_ENTRY(70)
335DISTINCT_INTERRUPT_ENTRY(71)
336DISTINCT_INTERRUPT_ENTRY(72)
337DISTINCT_INTERRUPT_ENTRY(73)
338DISTINCT_INTERRUPT_ENTRY(74)
339DISTINCT_INTERRUPT_ENTRY(75)
340DISTINCT_INTERRUPT_ENTRY(76)
341DISTINCT_INTERRUPT_ENTRY(77)
342DISTINCT_INTERRUPT_ENTRY(78)
343DISTINCT_INTERRUPT_ENTRY(79)
344DISTINCT_INTERRUPT_ENTRY(80)
345DISTINCT_INTERRUPT_ENTRY(81)
346DISTINCT_INTERRUPT_ENTRY(82)
347DISTINCT_INTERRUPT_ENTRY(83)
348DISTINCT_INTERRUPT_ENTRY(84)
349DISTINCT_INTERRUPT_ENTRY(85)
350DISTINCT_INTERRUPT_ENTRY(86)
351DISTINCT_INTERRUPT_ENTRY(87)
352DISTINCT_INTERRUPT_ENTRY(88)
353DISTINCT_INTERRUPT_ENTRY(89)
354DISTINCT_INTERRUPT_ENTRY(90)
355DISTINCT_INTERRUPT_ENTRY(91)
356DISTINCT_INTERRUPT_ENTRY(92)
357DISTINCT_INTERRUPT_ENTRY(93)
358DISTINCT_INTERRUPT_ENTRY(94)
359DISTINCT_INTERRUPT_ENTRY(95)
360DISTINCT_INTERRUPT_ENTRY(96)
361DISTINCT_INTERRUPT_ENTRY(97)
362DISTINCT_INTERRUPT_ENTRY(98)
363DISTINCT_INTERRUPT_ENTRY(99)
364DISTINCT_INTERRUPT_ENTRY(100)
365DISTINCT_INTERRUPT_ENTRY(101)
366DISTINCT_INTERRUPT_ENTRY(102)
367DISTINCT_INTERRUPT_ENTRY(103)
368DISTINCT_INTERRUPT_ENTRY(104)
369DISTINCT_INTERRUPT_ENTRY(105)
370DISTINCT_INTERRUPT_ENTRY(106)
371DISTINCT_INTERRUPT_ENTRY(107)
372DISTINCT_INTERRUPT_ENTRY(108)
373DISTINCT_INTERRUPT_ENTRY(109)
374DISTINCT_INTERRUPT_ENTRY(110)
375DISTINCT_INTERRUPT_ENTRY(111)
376DISTINCT_INTERRUPT_ENTRY(112)
377DISTINCT_INTERRUPT_ENTRY(113)
378DISTINCT_INTERRUPT_ENTRY(114)
379DISTINCT_INTERRUPT_ENTRY(115)
380DISTINCT_INTERRUPT_ENTRY(116)
381DISTINCT_INTERRUPT_ENTRY(117)
382DISTINCT_INTERRUPT_ENTRY(118)
383DISTINCT_INTERRUPT_ENTRY(119)
384DISTINCT_INTERRUPT_ENTRY(120)
385DISTINCT_INTERRUPT_ENTRY(121)
386DISTINCT_INTERRUPT_ENTRY(122)
387DISTINCT_INTERRUPT_ENTRY(123)
388DISTINCT_INTERRUPT_ENTRY(124)
389DISTINCT_INTERRUPT_ENTRY(125)
390DISTINCT_INTERRUPT_ENTRY(126)
391DISTINCT_INTERRUPT_ENTRY(127)
392DISTINCT_INTERRUPT_ENTRY(128)
393DISTINCT_INTERRUPT_ENTRY(129)
394DISTINCT_INTERRUPT_ENTRY(130)
395DISTINCT_INTERRUPT_ENTRY(131)
396DISTINCT_INTERRUPT_ENTRY(132)
397DISTINCT_INTERRUPT_ENTRY(133)
398DISTINCT_INTERRUPT_ENTRY(134)
399DISTINCT_INTERRUPT_ENTRY(135)
400DISTINCT_INTERRUPT_ENTRY(136)
401DISTINCT_INTERRUPT_ENTRY(137)
402DISTINCT_INTERRUPT_ENTRY(138)
403DISTINCT_INTERRUPT_ENTRY(139)
404DISTINCT_INTERRUPT_ENTRY(140)
405DISTINCT_INTERRUPT_ENTRY(141)
406DISTINCT_INTERRUPT_ENTRY(142)
407DISTINCT_INTERRUPT_ENTRY(143)
408DISTINCT_INTERRUPT_ENTRY(144)
409DISTINCT_INTERRUPT_ENTRY(145)
410DISTINCT_INTERRUPT_ENTRY(146)
411DISTINCT_INTERRUPT_ENTRY(147)
412DISTINCT_INTERRUPT_ENTRY(148)
413DISTINCT_INTERRUPT_ENTRY(149)
414DISTINCT_INTERRUPT_ENTRY(150)
415DISTINCT_INTERRUPT_ENTRY(151)
416DISTINCT_INTERRUPT_ENTRY(152)
417DISTINCT_INTERRUPT_ENTRY(153)
418DISTINCT_INTERRUPT_ENTRY(154)
419DISTINCT_INTERRUPT_ENTRY(155)
420DISTINCT_INTERRUPT_ENTRY(156)
421DISTINCT_INTERRUPT_ENTRY(157)
422DISTINCT_INTERRUPT_ENTRY(158)
423DISTINCT_INTERRUPT_ENTRY(159)
424DISTINCT_INTERRUPT_ENTRY(160)
425DISTINCT_INTERRUPT_ENTRY(161)
426DISTINCT_INTERRUPT_ENTRY(162)
427DISTINCT_INTERRUPT_ENTRY(163)
428DISTINCT_INTERRUPT_ENTRY(164)
429DISTINCT_INTERRUPT_ENTRY(165)
430DISTINCT_INTERRUPT_ENTRY(166)
431DISTINCT_INTERRUPT_ENTRY(167)
432DISTINCT_INTERRUPT_ENTRY(168)
433DISTINCT_INTERRUPT_ENTRY(169)
434DISTINCT_INTERRUPT_ENTRY(170)
435DISTINCT_INTERRUPT_ENTRY(171)
436DISTINCT_INTERRUPT_ENTRY(172)
437DISTINCT_INTERRUPT_ENTRY(173)
438DISTINCT_INTERRUPT_ENTRY(174)
439DISTINCT_INTERRUPT_ENTRY(175)
440DISTINCT_INTERRUPT_ENTRY(176)
441DISTINCT_INTERRUPT_ENTRY(177)
442DISTINCT_INTERRUPT_ENTRY(178)
443DISTINCT_INTERRUPT_ENTRY(179)
444DISTINCT_INTERRUPT_ENTRY(180)
445DISTINCT_INTERRUPT_ENTRY(181)
446DISTINCT_INTERRUPT_ENTRY(182)
447DISTINCT_INTERRUPT_ENTRY(183)
448DISTINCT_INTERRUPT_ENTRY(184)
449DISTINCT_INTERRUPT_ENTRY(185)
450DISTINCT_INTERRUPT_ENTRY(186)
451DISTINCT_INTERRUPT_ENTRY(187)
452DISTINCT_INTERRUPT_ENTRY(188)
453DISTINCT_INTERRUPT_ENTRY(189)
454DISTINCT_INTERRUPT_ENTRY(190)
455DISTINCT_INTERRUPT_ENTRY(191)
456DISTINCT_INTERRUPT_ENTRY(192)
457DISTINCT_INTERRUPT_ENTRY(193)
458DISTINCT_INTERRUPT_ENTRY(194)
459DISTINCT_INTERRUPT_ENTRY(195)
460DISTINCT_INTERRUPT_ENTRY(196)
461DISTINCT_INTERRUPT_ENTRY(197)
462DISTINCT_INTERRUPT_ENTRY(198)
463DISTINCT_INTERRUPT_ENTRY(199)
464DISTINCT_INTERRUPT_ENTRY(200)
465DISTINCT_INTERRUPT_ENTRY(201)
466DISTINCT_INTERRUPT_ENTRY(202)
467DISTINCT_INTERRUPT_ENTRY(203)
468DISTINCT_INTERRUPT_ENTRY(204)
469DISTINCT_INTERRUPT_ENTRY(205)
470DISTINCT_INTERRUPT_ENTRY(206)
471DISTINCT_INTERRUPT_ENTRY(207)
472DISTINCT_INTERRUPT_ENTRY(208)
473DISTINCT_INTERRUPT_ENTRY(209)
474DISTINCT_INTERRUPT_ENTRY(210)
475DISTINCT_INTERRUPT_ENTRY(211)
476DISTINCT_INTERRUPT_ENTRY(212)
477DISTINCT_INTERRUPT_ENTRY(213)
478DISTINCT_INTERRUPT_ENTRY(214)
479DISTINCT_INTERRUPT_ENTRY(215)
480DISTINCT_INTERRUPT_ENTRY(216)
481DISTINCT_INTERRUPT_ENTRY(217)
482DISTINCT_INTERRUPT_ENTRY(218)
483DISTINCT_INTERRUPT_ENTRY(219)
484DISTINCT_INTERRUPT_ENTRY(220)
485DISTINCT_INTERRUPT_ENTRY(221)
486DISTINCT_INTERRUPT_ENTRY(222)
487DISTINCT_INTERRUPT_ENTRY(223)
488DISTINCT_INTERRUPT_ENTRY(224)
489DISTINCT_INTERRUPT_ENTRY(225)
490DISTINCT_INTERRUPT_ENTRY(226)
491DISTINCT_INTERRUPT_ENTRY(227)
492DISTINCT_INTERRUPT_ENTRY(228)
493DISTINCT_INTERRUPT_ENTRY(229)
494DISTINCT_INTERRUPT_ENTRY(230)
495DISTINCT_INTERRUPT_ENTRY(231)
496DISTINCT_INTERRUPT_ENTRY(232)
497DISTINCT_INTERRUPT_ENTRY(233)
498DISTINCT_INTERRUPT_ENTRY(234)
499DISTINCT_INTERRUPT_ENTRY(235)
500DISTINCT_INTERRUPT_ENTRY(236)
501DISTINCT_INTERRUPT_ENTRY(237)
502DISTINCT_INTERRUPT_ENTRY(238)
503DISTINCT_INTERRUPT_ENTRY(239)
504DISTINCT_INTERRUPT_ENTRY(240)
505DISTINCT_INTERRUPT_ENTRY(241)
506DISTINCT_INTERRUPT_ENTRY(242)
507DISTINCT_INTERRUPT_ENTRY(243)
508DISTINCT_INTERRUPT_ENTRY(244)
509DISTINCT_INTERRUPT_ENTRY(245)
510DISTINCT_INTERRUPT_ENTRY(246)
511DISTINCT_INTERRUPT_ENTRY(247)
512DISTINCT_INTERRUPT_ENTRY(248)
513DISTINCT_INTERRUPT_ENTRY(249)
514DISTINCT_INTERRUPT_ENTRY(250)
515DISTINCT_INTERRUPT_ENTRY(251)
516DISTINCT_INTERRUPT_ENTRY(252)
517DISTINCT_INTERRUPT_ENTRY(253)
518DISTINCT_INTERRUPT_ENTRY(254)
519DISTINCT_INTERRUPT_ENTRY(255)
520
521/*PAGE
522 *  void _ISR_Dispatch()
523 *
524 *  Entry point from the outermost interrupt service routine exit.
525 *  The current stack is the supervisor mode stack.
526 */
527
528        PUBLIC (_ISR_Dispatch)
529SYM (_ISR_Dispatch):
530
531        call      SYM (_Thread_Dispatch)   # invoke Dispatcher
532
533       /*
534        * BEGINNING OF DE-ESTABLISH SEGMENTS
535        *
536        *  NOTE:  Make sure there is code here if code is added to
537        *         load the segment registers.
538        *
539        */
540
541       /***** DE-ESTABLISH SEGMENTS CODE GOES HERE ****/
542
543       /*
544        * END OF DE-ESTABLISH SEGMENTS
545        */
546
547        popa                                # restore general registers
548        iret                                # return to interrupted thread
549
550/*
551 *  GO32 does not require these segment related routines.
552 */
553
554#ifndef __GO32__
555
556/*
557 *  void *i386_Logical_to_physical(
558 *     rtems_unsigned16  segment,
559 *     void             *address
560 *  );
561 *
562 *  Returns thirty-two bit physical address for segment:address.
563 */
564
565.set SEGMENT_ARG, 4
566.set ADDRESS_ARG, 8
567
568             PUBLIC (i386_Logical_to_physical)
569
570SYM (i386_Logical_to_physical):
571
572        xorl    eax,eax                # clear eax
573        movzwl  SEGMENT_ARG(esp),ecx   # ecx = segment value
574        movl    $ SYM (_Global_descriptor_table),edx
575                                       # edx = address of our GDT
576        addl    ecx,edx                # edx = address of desired entry
577        movb    7(edx),ah              # ah = base 31:24
578        movb    4(edx),al              # al = base 23:16
579        shll    $16,eax                # move ax into correct bits
580        movw    2(edx),ax              # ax = base 0:15
581        movl    ADDRESS_ARG(esp),ecx   # ecx = address to convert
582        addl    eax,ecx                # ecx = physical address equivalent
583        movl    ecx,eax                # eax = ecx
584        ret
585
586/*
587 *  void *i386_Physical_to_logical(
588 *     rtems_unsigned16  segment,
589 *     void             *address
590 *  );
591 *
592 *  Returns thirty-two bit physical address for segment:address.
593 */
594
595/*
596 *.set SEGMENT_ARG, 4
597 *.set ADDRESS_ARG, 8   -- use sets from above
598 */
599
600       PUBLIC (i386_Physical_to_logical)
601
602SYM (i386_Physical_to_logical):
603        xorl    eax,eax                # clear eax
604        movzwl  SEGMENT_ARG(esp),ecx   # ecx = segment value
605        movl    $ SYM (_Global_descriptor_table),edx
606                                       # edx = address of our GDT
607        addl    ecx,edx                # edx = address of desired entry
608        movb    7(edx),ah              # ah = base 31:24
609        movb    4(edx),al              # al = base 23:16
610        shll    $16,eax                # move ax into correct bits
611        movw    2(edx),ax              # ax = base 0:15
612        movl    ADDRESS_ARG(esp),ecx   # ecx = address to convert
613        subl    eax,ecx                # ecx = logical address equivalent
614        movl    ecx,eax                # eax = ecx
615        ret
616#endif /* __GO32__ */
617
618END_CODE
619
620END
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