source: rtems/c/src/exec/score/cpu/i386/cpu.h @ 9700578

4.104.114.84.95
Last change on this file since 9700578 was 9700578, checked in by Joel Sherrill <joel.sherrill@…>, on 10/30/95 at 21:54:45

SPARC port passes all tests

  • Property mode set to 100644
File size: 9.3 KB
Line 
1/*  cpu.h
2 *
3 *  This include file contains information pertaining to the Intel
4 *  i386 processor.
5 *
6 *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
7 *  On-Line Applications Research Corporation (OAR).
8 *  All rights assigned to U.S. Government, 1994.
9 *
10 *  This material may be reproduced by or for the U.S. Government pursuant
11 *  to the copyright license under the clause at DFARS 252.227-7013.  This
12 *  notice must appear in all copies of this file and its derivatives.
13 *
14 *  $Id$
15 */
16
17#ifndef __CPU_h
18#define __CPU_h
19
20#ifdef __cplusplus
21extern "C" {
22#endif
23
24#ifndef ASM
25#include <rtems/score/i386types.h>
26#endif
27#include <rtems/score/i386.h>
28
29/* conditional compilation parameters */
30
31#define CPU_INLINE_ENABLE_DISPATCH       TRUE
32#define CPU_UNROLL_ENQUEUE_PRIORITY      FALSE
33
34/*
35 *  i386 has an RTEMS allocated and managed interrupt stack.
36 */
37
38#define CPU_HAS_SOFTWARE_INTERRUPT_STACK TRUE
39#define CPU_HAS_HARDWARE_INTERRUPT_STACK FALSE
40#define CPU_ALLOCATE_INTERRUPT_STACK     TRUE
41
42/*
43 *  Some family members have no FP, some have an FPU such as the i387
44 *  for the i386, others have it built in (i486DX, Pentium).
45 */
46
47#if ( I386_HAS_FPU == 1 )
48#define CPU_HARDWARE_FP     TRUE    /* i387 for i386 */
49#else
50#define CPU_HARDWARE_FP     FALSE
51#endif
52
53#define CPU_ALL_TASKS_ARE_FP             FALSE
54#define CPU_IDLE_TASK_IS_FP              FALSE
55#define CPU_USE_DEFERRED_FP_SWITCH       TRUE
56
57#define CPU_PROVIDES_IDLE_THREAD_BODY    FALSE
58#define CPU_STACK_GROWS_UP               FALSE
59#define CPU_STRUCTURE_ALIGNMENT
60
61/* structures */
62
63/*
64 *  Basic integer context for the i386 family.
65 */
66
67typedef struct {
68  unsigned32  eflags;   /* extended flags register                   */
69  void       *esp;      /* extended stack pointer register           */
70  void       *ebp;      /* extended base pointer register            */
71  unsigned32  ebx;      /* extended bx register                      */
72  unsigned32  esi;      /* extended source index register            */
73  unsigned32  edi;      /* extended destination index flags register */
74}   Context_Control;
75
76/*
77 *  FP context save area for the i387 numeric coprocessors.
78 */
79
80typedef struct {
81  unsigned8   fp_save_area[108];    /* context size area for I80387 */
82                                    /*  28 bytes for environment    */
83} Context_Control_fp;
84
85/*
86 *  The following structure defines the set of information saved
87 *  on the current stack by RTEMS upon receipt of each interrupt.
88 */
89
90typedef struct {
91  unsigned32   TBD;   /* XXX Fix for this CPU */
92} CPU_Interrupt_frame;
93
94/*
95 *  The following table contains the information required to configure
96 *  the i386 specific parameters.
97 */
98
99typedef struct {
100  void       (*pretasking_hook)( void );
101  void       (*predriver_hook)( void );
102  void       (*postdriver_hook)( void );
103  void       (*idle_task)( void );
104  boolean      do_zero_of_workspace;
105  unsigned32   interrupt_stack_size;
106  unsigned32   extra_system_initialization_stack;
107
108  unsigned32   interrupt_table_segment;
109  void        *interrupt_table_offset;
110}   rtems_cpu_table;
111
112/*
113 *  context size area for floating point
114 *
115 *  NOTE:  This is out of place on the i386 to avoid a forward reference.
116 */
117
118#define CPU_CONTEXT_FP_SIZE sizeof( Context_Control_fp )
119
120/* variables */
121
122EXTERN Context_Control_fp  _CPU_Null_fp_context;
123EXTERN void               *_CPU_Interrupt_stack_low;
124EXTERN void               *_CPU_Interrupt_stack_high;
125
126/* constants */
127
128/*
129 *  This defines the number of levels and the mask used to pick those
130 *  bits out of a thread mode.
131 */
132
133#define CPU_MODES_INTERRUPT_LEVEL  0x00000001 /* interrupt level in mode */
134#define CPU_MODES_INTERRUPT_MASK   0x00000001 /* interrupt level in mode */
135
136/*
137 *  extra stack required by system initialization thread
138 */
139
140#define CPU_SYSTEM_INITIALIZATION_THREAD_EXTRA_STACK 1024
141
142/*
143 *  i386 family supports 256 distinct vectors.
144 */
145
146#define CPU_INTERRUPT_NUMBER_OF_VECTORS      256
147#define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER  (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
148
149/*
150 *  Minimum size of a thread's stack.
151 */
152
153#define CPU_STACK_MINIMUM_SIZE          1024
154
155/*
156 *  i386 is pretty tolerant of alignment.  Just put things on 4 byte boundaries.
157 */
158
159#define CPU_ALIGNMENT                    4
160#define CPU_HEAP_ALIGNMENT               CPU_ALIGNMENT
161#define CPU_PARTITION_ALIGNMENT          CPU_ALIGNMENT
162
163/*
164 *  On i386 thread stacks require no further alignment after allocation
165 *  from the Workspace.
166 */
167
168#define CPU_STACK_ALIGNMENT             0
169
170/* macros */
171
172/*
173 *  ISR handler macros
174 *
175 *  These macros perform the following functions:
176 *     + disable all maskable CPU interrupts
177 *     + restore previous interrupt level (enable)
178 *     + temporarily restore interrupts (flash)
179 *     + set a particular level
180 */
181
182#define _CPU_ISR_Disable( _level ) i386_disable_interrupts( _level )
183
184#define _CPU_ISR_Enable( _level )  i386_enable_interrupts( _level )
185
186#define _CPU_ISR_Flash( _level )   i386_flash_interrupts( _level )
187
188#define _CPU_ISR_Set_level( _new_level ) \
189  { \
190    if ( _new_level ) asm volatile ( "cli" ); \
191    else              asm volatile ( "sti" ); \
192  }
193
194unsigned32 _CPU_ISR_Get_level( void );
195
196/* end of ISR handler macros */
197
198/*
199 *  Context handler macros
200 *
201 *  These macros perform the following functions:
202 *     + initialize a context area
203 *     + restart the current thread
204 *     + calculate the initial pointer into a FP context area
205 *     + initialize an FP context area
206 */
207
208#define CPU_EFLAGS_INTERRUPTS_ON  0x00003202
209#define CPU_EFLAGS_INTERRUPTS_OFF 0x00003002
210
211#define _CPU_Context_Initialize( _the_context, _stack_base, _size, \
212                                   _isr, _entry_point, _is_fp ) \
213  do { \
214    unsigned32 _stack; \
215    \
216    if ( (_isr) ) (_the_context)->eflags = CPU_EFLAGS_INTERRUPTS_OFF; \
217    else          (_the_context)->eflags = CPU_EFLAGS_INTERRUPTS_ON; \
218    \
219    _stack = ((unsigned32)(_stack_base)) + (_size) - 4; \
220    \
221    *((proc_ptr *)(_stack)) = (_entry_point); \
222    (_the_context)->ebp     = (void *) _stack; \
223    (_the_context)->esp     = (void *) _stack; \
224  } while (0)
225
226#define _CPU_Context_Restart_self( _the_context ) \
227   _CPU_Context_restore( (_the_context) );
228
229#define _CPU_Context_Fp_start( _base, _offset ) \
230   ( (void *) _Addresses_Add_offset( (_base), (_offset) ) )
231
232#define _CPU_Context_Initialize_fp( _fp_area ) \
233  { \
234    unsigned32 *_source      = (unsigned32 *) &_CPU_Null_fp_context; \
235    unsigned32 *_destination = *(_fp_area); \
236    unsigned32  _index; \
237    \
238    for ( _index=0 ; _index < CPU_CONTEXT_FP_SIZE/4 ; _index++ ) \
239      *_destination++ = *_source++; \
240  }
241
242/* end of Context handler macros */
243
244/*
245 *  Fatal Error manager macros
246 *
247 *  These macros perform the following functions:
248 *    + disable interrupts and halt the CPU
249 */
250
251#define _CPU_Fatal_halt( _error ) \
252  { \
253    asm volatile ( "cli ; \
254                    movl %0,%%eax ; \
255                    hlt" \
256                    : "=r" ((_error)) : "0" ((_error)) \
257    ); \
258  }
259
260/* end of Fatal Error manager macros */
261
262/*
263 *  Bitfield handler macros
264 *
265 *  These macros perform the following functions:
266 *     + scan for the highest numbered (MSB) set in a 16 bit bitfield
267 */
268
269#define CPU_USE_GENERIC_BITFIELD_CODE FALSE
270#define CPU_USE_GENERIC_BITFIELD_DATA FALSE
271
272#define _CPU_Bitfield_Find_first_bit( _value, _output ) \
273  { \
274    register unsigned16 __value_in_register = (_value); \
275    \
276    _output = 0; \
277    \
278    asm volatile ( "bsfw    %0,%1 " \
279                    : "=r" (__value_in_register), "=r" (_output) \
280                    : "0"  (__value_in_register), "1"  (_output) \
281    ); \
282  }
283
284/* end of Bitfield handler macros */
285
286/*
287 *  Priority handler macros
288 *
289 *  These macros perform the following functions:
290 *    + return a mask with the bit for this major/minor portion of
291 *      of thread priority set.
292 *    + translate the bit number returned by "Bitfield_find_first_bit"
293 *      into an index into the thread ready chain bit maps
294 */
295
296#define _CPU_Priority_Mask( _bit_number ) \
297  ( 1 << (_bit_number) )
298
299#define _CPU_Priority_bits_index( _priority ) \
300  (_priority)
301
302/* functions */
303
304/*
305 *  _CPU_Initialize
306 *
307 *  This routine performs CPU dependent initialization.
308 */
309
310void _CPU_Initialize(
311  rtems_cpu_table  *cpu_table,
312  void      (*thread_dispatch)
313);
314
315/*
316 *  _CPU_ISR_install_raw_handler
317 *
318 *  This routine installs a "raw" interrupt handler directly into the
319 *  processor's vector table.
320 */
321 
322void _CPU_ISR_install_raw_handler(
323  unsigned32  vector,
324  proc_ptr    new_handler,
325  proc_ptr   *old_handler
326);
327
328/*
329 *  _CPU_ISR_install_vector
330 *
331 *  This routine installs an interrupt vector.
332 */
333
334void _CPU_ISR_install_vector(
335  unsigned32  vector,
336  proc_ptr    new_handler,
337  proc_ptr   *old_handler
338);
339
340/*
341 *  _CPU_Context_switch
342 *
343 *  This routine switches from the run context to the heir context.
344 */
345
346void _CPU_Context_switch(
347  Context_Control  *run,
348  Context_Control  *heir
349);
350
351/*
352 *  _CPU_Context_restore
353 *
354 *  This routine is generallu used only to restart self in an
355 *  efficient manner and avoid stack conflicts.
356 */
357
358void _CPU_Context_restore(
359  Context_Control *new_context
360);
361
362/*
363 *  _CPU_Context_save_fp
364 *
365 *  This routine saves the floating point context passed to it.
366 */
367
368void _CPU_Context_save_fp(
369  void **fp_context_ptr
370);
371
372/*
373 *  _CPU_Context_restore_fp
374 *
375 *  This routine restores the floating point context passed to it.
376 */
377
378void _CPU_Context_restore_fp(
379  void **fp_context_ptr
380);
381
382#ifdef __cplusplus
383}
384#endif
385
386#endif
387/* end of include file */
Note: See TracBrowser for help on using the repository browser.