source: rtems/c/src/exec/score/cpu/hppa1.1/cpu.c @ 7fe12f6

4.104.114.84.95
Last change on this file since 7fe12f6 was 7fe12f6, checked in by Joel Sherrill <joel.sherrill@…>, on 09/22/95 at 17:27:14

Removed unneeded referenced to rtems/fatal.h

  • Property mode set to 100644
File size: 8.0 KB
Line 
1/*
2 *  HP PA-RISC Dependent Source
3 *
4 *  COPYRIGHT (c) 1994 by Division Incorporated
5 *
6 *  To anyone who acknowledges that this file is provided "AS IS"
7 *  without any express or implied warranty:
8 *      permission to use, copy, modify, and distribute this file
9 *      for any purpose is hereby granted without fee, provided that
10 *      the above copyright notice and this notice appears in all
11 *      copies, and that the name of Division Incorporated not be
12 *      used in advertising or publicity pertaining to distribution
13 *      of the software without specific, written prior permission.
14 *      Division Incorporated makes no representations about the
15 *      suitability of this software for any purpose.
16 *
17 *  $Id$
18 */
19
20#include <rtems/system.h>
21#include <rtems/core/isr.h>
22#include <rtems/core/wkspace.h>
23
24void hppa_external_interrupt_initialize(void);
25void hppa_external_interrupt_enable(unsigned32);
26void hppa_external_interrupt_disable(unsigned32);
27void hppa_external_interrupt(unsigned32, CPU_Interrupt_frame *);
28
29/*
30 * Our interrupt handlers take a 2nd argument:
31 *   a pointer to a CPU_Interrupt_frame
32 * So we use our own prototype instead of rtems_isr_entry
33 */
34
35typedef void ( *hppa_rtems_isr_entry )(
36    ISR_Vector_number,
37    CPU_Interrupt_frame *
38 );
39
40
41/*
42 * who are we?  cpu number
43 * Not used by executive proper, just kept (or not) as a convenience
44 * for libcpu and libbsp stuff that wants it.
45 *
46 * Defaults to 0.  If the BSP doesn't like it, it can change it.
47 */
48
49int cpu_number;                 /* from 0; cpu number in a multi cpu system */
50
51
52/*  _CPU_Initialize
53 *
54 *  This routine performs processor dependent initialization.
55 *
56 *  INPUT PARAMETERS:
57 *    cpu_table       - CPU table to initialize
58 *    thread_dispatch - address of disptaching routine
59 *
60 */
61
62void _CPU_Initialize(
63  rtems_cpu_table  *cpu_table,
64  void      (*thread_dispatch)      /* ignored on this CPU */
65)
66{
67    register unsigned8  *fp_context;
68    unsigned32 iva;
69    unsigned32 iva_table;
70    int i;
71
72    extern void IVA_Table(void);
73
74    /*
75     * XXX; need to setup fpsr smarter perhaps
76     */
77
78    fp_context = (unsigned8*) &_CPU_Null_fp_context;
79    for (i=0 ; i<sizeof(Context_Control_fp); i++)
80        *fp_context++ = 0;
81
82    /*
83     *  Set _CPU_Default_gr27 here so it will hopefully be the correct
84     *  global data pointer for the entire system.
85     */
86
87    asm volatile( "stw   %%r27,%0" : "=m" (_CPU_Default_gr27): );
88
89    /*
90     * Stabilize the interrupt stuff
91     */
92
93    (void) hppa_external_interrupt_initialize();
94
95    /*
96     * Set the IVA to point to physical address of the IVA_Table
97     */
98
99    iva_table = (unsigned32) IVA_Table;
100    HPPA_ASM_LPA(0, iva_table, iva);
101    set_iva(iva);
102
103    _CPU_Table = *cpu_table;
104}
105
106/*PAGE
107 *
108 *  _CPU_ISR_install_raw_handler
109 */
110 
111void _CPU_ISR_install_raw_handler(
112  unsigned32  vector,
113  proc_ptr    new_handler,
114  proc_ptr   *old_handler
115)
116{
117  /*
118   *  This is unsupported.
119   */
120
121  _CPU_Fatal_halt( 0xdeaddead );
122}
123
124/*PAGE
125 *
126 *  _CPU_ISR_install_vector
127 *
128 *  This kernel routine installs the RTEMS handler for the
129 *  specified vector.
130 *
131 *  Input parameters:
132 *    vector      - interrupt vector number
133 *    old_handler - former ISR for this vector number
134 *    new_handler - replacement ISR for this vector number
135 *
136 *  Output parameters:  NONE
137 *
138 */
139
140/*
141 * HPPA has 8w for each vector instead of an address to jump to.
142 * We put the actual ISR address in '_ISR_vector_table'.  This will
143 * be pulled by the code in the vector.
144 */
145
146void _CPU_ISR_install_vector(
147  unsigned32  vector,
148  proc_ptr    new_handler,
149  proc_ptr   *old_handler
150)
151{
152    *old_handler = _ISR_Vector_table[vector];
153
154    _ISR_Vector_table[vector] = new_handler;
155
156    if (vector >= HPPA_INTERRUPT_EXTERNAL_BASE)
157    {
158        unsigned32 external_vector;
159
160        external_vector = vector - HPPA_INTERRUPT_EXTERNAL_BASE;
161        if (new_handler)
162            hppa_external_interrupt_enable(external_vector);
163        else
164            /* XXX this can never happen due to _ISR_Is_valid_user_handler */
165            hppa_external_interrupt_disable(external_vector);
166    }
167}
168
169
170/*
171 * Support for external and spurious interrupts on HPPA
172 *
173 *  TODO:
174 *    delete interrupt.c etc.
175 *    Count interrupts
176 *    make sure interrupts disabled properly
177 *    should handler check again for more interrupts before exit?
178 *    How to enable interrupts from an interrupt handler?
179 *    Make sure there is an entry for everything in ISR_Vector_Table
180 */
181
182#define DISMISS(mask)           set_eirr(mask)
183#define DISABLE(mask)           set_eiem(get_eiem() & ~(mask))
184#define ENABLE(mask)            set_eiem(get_eiem() | (mask))
185#define VECTOR_TO_MASK(v)       (1 << (31 - (v)))
186
187/*
188 * Init the external interrupt scheme
189 * called by bsp_start()
190 */
191
192void
193hppa_external_interrupt_initialize(void)
194{
195    hppa_rtems_isr_entry ignore = 0;
196
197    /* mark them all unused */
198
199    DISABLE(~0);
200    DISMISS(~0);
201
202    /* install the external interrupt handler */
203  _CPU_ISR_install_vector(
204    HPPA_INTERRUPT_EXTERNAL_INTERRUPT,
205    (proc_ptr)hppa_external_interrupt,
206    (proc_ptr *)ignore
207  );
208}
209
210/*
211 * Enable a specific external interrupt
212 */
213
214void
215hppa_external_interrupt_enable(unsigned32 v)
216{
217    unsigned32 isrlevel;
218
219    _CPU_ISR_Disable(isrlevel);
220    ENABLE(VECTOR_TO_MASK(v));
221    _CPU_ISR_Enable(isrlevel);
222}
223
224/*
225 * Does not clear or otherwise affect any pending requests
226 */
227
228void
229hppa_external_interrupt_disable(unsigned32 v)
230{
231    unsigned32 isrlevel;
232
233    _CPU_ISR_Disable(isrlevel);
234    DISABLE(VECTOR_TO_MASK(v));
235    _CPU_ISR_Enable(isrlevel);
236}
237
238void
239hppa_external_interrupt_spurious_handler(unsigned32           vector,
240                                         CPU_Interrupt_frame *iframe)
241{
242/* XXX should not be printing :)
243    printf("spurious external interrupt: %d at pc 0x%x; disabling\n",
244       vector, iframe->Interrupt.pcoqfront);
245*/
246    DISMISS(VECTOR_TO_MASK(vector));
247    DISABLE(VECTOR_TO_MASK(vector));
248}
249
250void
251hppa_external_interrupt_report_spurious(unsigned32           spurious,
252                                        CPU_Interrupt_frame *iframe)
253{
254    int v;
255    for (v=0; v < HPPA_EXTERNAL_INTERRUPTS; v++)
256        if (VECTOR_TO_MASK(v) & spurious)
257            hppa_external_interrupt_spurious_handler(v, iframe);
258    DISMISS(spurious);
259}
260
261
262/*
263 * External interrupt handler.
264 * This is installed as cpu interrupt handler for
265 * HPPA_INTERRUPT_EXTERNAL_INTERRUPT. It vectors out to
266 * specific external interrupt handlers.
267 */
268
269void
270hppa_external_interrupt(unsigned32           vector,
271                        CPU_Interrupt_frame *iframe)
272{
273    unsigned32   mask;
274    unsigned32  *vp, *max_vp;
275    unsigned32   external_vector;
276    unsigned32   global_vector;
277    hppa_rtems_isr_entry handler;
278
279    max_vp = &_CPU_Table.external_interrupt[_CPU_Table.external_interrupts];
280    while ( (mask = (get_eirr() & get_eiem())) )
281    {
282        for (vp = _CPU_Table.external_interrupt; (vp < max_vp) && mask; vp++)
283        {
284            unsigned32 m;
285
286            external_vector = *vp;
287            global_vector = external_vector + HPPA_INTERRUPT_EXTERNAL_BASE;
288            m = VECTOR_TO_MASK(external_vector);
289            handler = (hppa_rtems_isr_entry) _ISR_Vector_table[global_vector];
290            if ((m & mask) && handler)
291            {
292                DISMISS(m);
293                mask &= ~m;
294                (*handler)(global_vector, iframe);
295            }
296        }
297
298        if (mask != 0) {
299            if ( _CPU_Table.spurious_handler )
300              (*((hppa_rtems_isr_entry) _CPU_Table.spurious_handler))(
301                  mask,
302                  iframe
303                );
304            else
305              hppa_external_interrupt_report_spurious(mask, iframe);
306        }
307    }
308}
309
310/*
311 * Halt the system.
312 * Called by the _CPU_Fatal_halt macro
313 *
314 * XXX
315 * Later on, this will allow us to return to the prom.
316 * For now, we just ignore 'type_of_halt'
317 */
318
319void
320hppa_cpu_halt(unsigned32 type_of_halt,
321              unsigned32 the_error)
322{
323    unsigned32 isrlevel;
324
325    _CPU_ISR_Disable(isrlevel);
326
327    asm volatile( "copy %0,%%r1" : : "r" (the_error) );
328    HPPA_ASM_BREAK(1, 0);
329}
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