1 | /* |
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2 | * ARM CPU Dependent Source |
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3 | * |
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4 | * |
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5 | * COPYRIGHT (c) 2000 Canon Research Centre France SA. |
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6 | * Emmanuel Raguet, mailto:raguet@crf.canon.fr |
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7 | * |
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8 | * The license and distribution terms for this file may be |
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9 | * found in the file LICENSE in this distribution or at |
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10 | * http://www.OARcorp.com/rtems/license.html. |
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11 | * |
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12 | */ |
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13 | |
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14 | #include <rtems/system.h> |
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15 | #include <rtems.h> |
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16 | #include <bspIo.h> |
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17 | #include <rtems/score/isr.h> |
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18 | #include <rtems/score/wkspace.h> |
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19 | #include <rtems/score/thread.h> |
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20 | #include <rtems/score/cpu.h> |
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21 | |
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22 | /* _CPU_Initialize |
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23 | * |
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24 | * This routine performs processor dependent initialization. |
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25 | * |
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26 | * INPUT PARAMETERS: |
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27 | * cpu_table - CPU table to initialize |
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28 | * thread_dispatch - address of disptaching routine |
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29 | */ |
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30 | |
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31 | |
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32 | void _CPU_Initialize( |
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33 | rtems_cpu_table *cpu_table, |
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34 | void (*thread_dispatch) /* ignored on this CPU */ |
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35 | ) |
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36 | { |
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37 | _CPU_Table = *cpu_table; |
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38 | } |
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39 | |
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40 | /*PAGE |
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41 | * |
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42 | * _CPU_ISR_Get_level |
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43 | */ |
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44 | |
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45 | unsigned32 _CPU_ISR_Get_level( void ) |
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46 | { |
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47 | /* |
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48 | * This routine returns the current interrupt level. |
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49 | */ |
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50 | |
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51 | return 0; |
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52 | } |
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53 | |
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54 | /* |
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55 | * _CPU_ISR_install_vector |
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56 | * |
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57 | * This kernel routine installs the RTEMS handler for the |
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58 | * specified vector. |
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59 | * |
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60 | * Input parameters: |
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61 | * vector - interrupt vector number |
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62 | * old_handler - former ISR for this vector number |
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63 | * new_handler - replacement ISR for this vector number |
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64 | * |
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65 | * Output parameters: NONE |
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66 | * |
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67 | */ |
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68 | |
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69 | void _CPU_ISR_install_vector( |
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70 | unsigned32 vector, |
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71 | proc_ptr new_handler, |
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72 | proc_ptr *old_handler |
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73 | ) |
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74 | { |
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75 | /* pointer on the redirection table in RAM */ |
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76 | long *VectorTable = (long *)(MAX_EXCEPTIONS * 4); |
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77 | |
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78 | if (old_handler != NULL) |
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79 | old_handler = *(proc_ptr *)(VectorTable + vector); |
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80 | *(VectorTable + vector) = (long)new_handler ; |
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81 | |
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82 | } |
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83 | |
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84 | /*PAGE |
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85 | * |
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86 | * _CPU_Install_interrupt_stack |
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87 | */ |
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88 | |
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89 | void _CPU_Install_interrupt_stack( void ) |
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90 | { |
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91 | } |
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92 | |
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93 | /*PAGE |
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94 | * |
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95 | * _CPU_Thread_Idle_body |
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96 | * |
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97 | * NOTES: |
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98 | * |
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99 | * 1. This is the same as the regular CPU independent algorithm. |
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100 | * |
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101 | * 2. If you implement this using a "halt", "idle", or "shutdown" |
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102 | * instruction, then don't forget to put it in an infinite loop. |
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103 | * |
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104 | * 3. Be warned. Some processors with onboard DMA have been known |
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105 | * to stop the DMA if the CPU were put in IDLE mode. This might |
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106 | * also be a problem with other on-chip peripherals. So use this |
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107 | * hook with caution. |
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108 | */ |
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109 | |
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110 | void _CPU_Thread_Idle_body( void ) |
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111 | { |
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112 | |
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113 | while(1); |
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114 | /* insert your "halt" instruction here */ ; |
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115 | } |
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116 | |
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117 | void _defaultExcHandler (CPU_Exception_frame *ctx) |
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118 | { |
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119 | printk("----------------------------------------------------------\n"); |
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120 | printk("Exception %d caught at PC %x by thread %d\n", |
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121 | ctx->register_pc, ctx->register_lr - 4, |
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122 | _Thread_Executing->Object.id); |
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123 | printk("----------------------------------------------------------\n"); |
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124 | printk("Processor execution context at time of the fault was :\n"); |
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125 | printk("----------------------------------------------------------\n"); |
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126 | printk(" r0 = %x r1 = %x r2 = %x r3 = %x\n", |
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127 | ctx->register_r0, ctx->register_r1, ctx->register_r2, ctx->register_r3); |
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128 | printk(" r4 = %x r5 = %x r6 = %x r7 = %x\n", |
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129 | ctx->register_r4, ctx->register_r5, ctx->register_r6, ctx->register_r7); |
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130 | printk(" r8 = %x r9 = %x r10 = %x\n", |
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131 | ctx->register_r8, ctx->register_r9, ctx->register_r10); |
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132 | printk(" fp = %x ip = %x sp = %x pc = %x\n", |
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133 | ctx->register_fp, ctx->register_ip, ctx->register_sp, ctx->register_lr - 4); |
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134 | printk("----------------------------------------------------------\n"); |
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135 | |
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136 | if (_ISR_Nest_level > 0) { |
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137 | /* |
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138 | * In this case we shall not delete the task interrupted as |
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139 | * it has nothing to do with the fault. We cannot return either |
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140 | * because the eip points to the faulty instruction so... |
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141 | */ |
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142 | printk("Exception while executing ISR!!!. System locked\n"); |
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143 | while(1); |
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144 | } |
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145 | else { |
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146 | printk(" ************ FAULTY THREAD WILL BE DELETED **************\n"); |
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147 | rtems_task_delete(_Thread_Executing->Object.id); |
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148 | } |
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149 | } |
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150 | |
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151 | cpuExcHandlerType _currentExcHandler = _defaultExcHandler; |
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152 | |
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153 | extern void _Exception_Handler_Undef_Swi(); |
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154 | extern void _Exception_Handler_Abort(); |
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155 | |
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156 | void rtems_exception_init_mngt() |
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157 | { |
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158 | ISR_Level level; |
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159 | |
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160 | _CPU_ISR_Disable(level); |
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161 | _CPU_ISR_install_vector(ARM_EXCEPTION_UNDEF, _Exception_Handler_Undef_Swi, NULL); |
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162 | _CPU_ISR_install_vector(ARM_EXCEPTION_SWI, _Exception_Handler_Undef_Swi, NULL); |
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163 | _CPU_ISR_install_vector(ARM_EXCEPTION_PREF_ABORT, _Exception_Handler_Abort , NULL); |
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164 | _CPU_ISR_install_vector(ARM_EXCEPTION_DATA_ABORT, _Exception_Handler_Abort , NULL); |
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165 | _CPU_ISR_install_vector(ARM_EXCEPTION_FIQ, _Exception_Handler_Abort , NULL); |
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166 | _CPU_ISR_install_vector(ARM_EXCEPTION_IRQ, _Exception_Handler_Abort , NULL); |
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167 | _CPU_ISR_Enable(level); |
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168 | } |
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169 | |
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170 | |
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